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@ataradov
Created April 4, 2025 15:00
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Example Python description of a peripheral
itm = {
'name': 'ITM',
'description': 'Instrumentation Trace Macrocell',
'base': 0xe0000000,
'source': '',
'registers': [
('PORT', 0x000, 'RW', 'ITM Stimulus Port', (32, 4)),
('TER', 0xe00, 'RW', 'ITM Trace Enable Register'),
('TPR', 0xe40, 'RW', 'ITM Trace Privilege Register'),
('TCR', 0xe80, 'RW', 'ITM Trace Control Register', [
('BUSY', 23, 1),
('TraceBusID', 16, 7),
('GTSFREQ', 10, 2),
('TSPrescale', 8, 2),
('SWOENA', 4, 1),
('DWTENA', 3, 1),
('SYNCENA', 2, 1),
('TSENA', 1, 1),
('ITMENA', 0, 1),
]),
('IWR', 0xef8, 'W', 'ITM Integration Write Register', [
('ATVALIDM', 0, 1),
]),
('IRR', 0xefc, 'R', 'ITM Integration Read Register', [
('ATREADYM', 0, 1),
]),
('IMCR', 0xf00, 'RW', 'ITM Integration Mode Control Register', [
('INTEGRATION', 0, 1),
]),
('LAR', 0xfb0, 'W', 'ITM Lock Access Register'),
('LSR', 0xfb4, 'R', 'ITM Lock Status Register', [
('ByteAcc', 2, 1),
('Access', 1, 1),
('Present', 0, 1),
]),
],
'defines': [
('ITM_LAR_KEY_UNLOCK', 0xc5acce55),
]
}
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