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May 25, 2018 13:00
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RockPro64 PCIE
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| $ lspci -vvv | |
| 00:00.0 PCI bridge: Rockchip Inc. RK3399 PCI Express Root Port Device 0100 (prog-if 00 [Normal decode]) | |
| Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ | |
| Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort+ <TAbort+ <MAbort+ >SERR+ <PERR+ INTx- | |
| Latency: 0 | |
| Interrupt: pin A routed to IRQ 228 | |
| Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 | |
| I/O behind bridge: 00000000-00000fff | |
| Memory behind bridge: fa000000-fa0fffff | |
| Prefetchable memory behind bridge: 00000000-000fffff | |
| Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- | |
| BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- | |
| PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- | |
| Capabilities: [80] Power Management version 3 | |
| Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0+,D1+,D2-,D3hot+,D3cold-) | |
| Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME+ | |
| Capabilities: [90] MSI: Enable+ Count=1/1 Maskable+ 64bit+ | |
| Address: 00000000fee30040 Data: 0000 | |
| Masking: 00000000 Pending: 00000000 | |
| Capabilities: [b0] MSI-X: Enable- Count=1 Masked- | |
| Vector table: BAR=0 offset=00000000 | |
| PBA: BAR=0 offset=00000008 | |
| Capabilities: [c0] Express (v2) Root Port (Slot+), MSI 00 | |
| DevCap: MaxPayload 256 bytes, PhantFunc 0 | |
| ExtTag- RBE+ | |
| DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ | |
| RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ | |
| MaxPayload 128 bytes, MaxReadReq 512 bytes | |
| DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend- | |
| LnkCap: Port #0, Speed 5GT/s, Width x4, ASPM L1, Exit Latency L0s <256ns, L1 <8us | |
| ClockPM- Surprise- LLActRep- BwNot+ ASPMOptComp+ | |
| LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk- | |
| ExtSynch- ClockPM- AutWidDis- BWInt+ AutBWInt+ | |
| LnkSta: Speed 5GT/s, Width x2, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt- | |
| SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug- Surprise- | |
| Slot #0, PowerLimit 0.000W; Interlock- NoCompl- | |
| SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg- | |
| Control: AttnInd Off, PwrInd Off, Power+ Interlock- | |
| SltSta: Status: AttnBtn- PowerFlt- MRL+ CmdCplt- PresDet- Interlock- | |
| Changed: MRL- PresDet- LinkState- | |
| RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna+ CRSVisible- | |
| RootCap: CRSVisible- | |
| RootSta: PME ReqID 0000, PMEStatus- PMEPending- | |
| DevCap2: Completion Timeout: Range B, TimeoutDis+, LTR+, OBFF Via message ARIFwd+ | |
| DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd- | |
| LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis- | |
| Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- | |
| Compliance De-emphasis: -6dB | |
| LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
| EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
| Capabilities: [100 v2] Advanced Error Reporting | |
| UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- | |
| UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- | |
| UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- | |
| CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- | |
| CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ | |
| AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn- | |
| Capabilities: [274 v1] Transaction Processing Hints | |
| Interrupt vector mode supported | |
| Device specific mode supported | |
| Steering table in TPH capability structure | |
| Kernel driver in use: pcieport | |
| 01:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961 (prog-if 02 [NVM Express]) | |
| Subsystem: Samsung Electronics Co Ltd NVMe SSD Controller SM961/PM961 | |
| Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ | |
| Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- | |
| Latency: 0 | |
| Interrupt: pin A routed to IRQ 227 | |
| Region 0: Memory at fa000000 (64-bit, non-prefetchable) [size=16K] | |
| Capabilities: [40] Power Management version 3 | |
| Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) | |
| Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME- | |
| Capabilities: [50] MSI: Enable- Count=1/32 Maskable- 64bit+ | |
| Address: 0000000000000000 Data: 0000 | |
| Capabilities: [70] Express (v2) Endpoint, MSI 00 | |
| DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited | |
| ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ SlotPowerLimit 0.000W | |
| DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- | |
| RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset- | |
| MaxPayload 128 bytes, MaxReadReq 512 bytes | |
| DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- | |
| LnkCap: Port #0, Speed 8GT/s, Width x4, ASPM L1, Exit Latency L0s unlimited, L1 <64us | |
| ClockPM+ Surprise- LLActRep- BwNot- ASPMOptComp+ | |
| LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- CommClk- | |
| ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt- | |
| LnkSta: Speed 5GT/s, Width x2, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- | |
| DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR+, OBFF Not Supported | |
| DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled | |
| LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis- | |
| Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS- | |
| Compliance De-emphasis: -6dB | |
| LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1- | |
| EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest- | |
| Capabilities: [b0] MSI-X: Enable+ Count=8 Masked- | |
| Vector table: BAR=0 offset=00003000 | |
| PBA: BAR=0 offset=00002000 | |
| Capabilities: [100 v2] Advanced Error Reporting | |
| UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- | |
| UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- | |
| UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- | |
| CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- | |
| CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+ | |
| AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn- | |
| Capabilities: [148 v1] Device Serial Number 00-00-00-00-00-00-00-00 | |
| Capabilities: [158 v1] Power Budgeting <?> | |
| Capabilities: [168 v1] #19 | |
| Capabilities: [188 v1] Latency Tolerance Reporting | |
| Max snoop latency: 0ns | |
| Max no snoop latency: 0ns | |
| Capabilities: [190 v1] L1 PM Substates | |
| L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+ L1_PM_Substates+ | |
| PortCommonModeRestoreTime=10us PortTPowerOnTime=10us | |
| L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1- | |
| T_CommonMode=0us LTR1.2_Threshold=0ns | |
| L1SubCtl2: T_PwrOn=10us | |
| Kernel driver in use: nvme | |
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