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benaadams/ViaStruct5_JitDump.txt

Created June 20, 2018 19:29
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ViaStruct5_JitDump.txt
****** START compiling Program:ViaStruct5() (MethodHash=900a8869)
Generating code for Windows x64
OPTIONS: compCodeOpt = BLENDED_CODE
OPTIONS: compDbgCode = false
OPTIONS: compDbgInfo = true
OPTIONS: compDbgEnC = false
OPTIONS: compProcedureSplitting = false
OPTIONS: compProcedureSplittingEH = false
OPTIONS: Stack probing is DISABLED
IL to import:
IL_0000 12 00 ldloca.s 0x0
IL_0002 73 0f 00 00 06 newobj 0x600000F
IL_0007 73 10 00 00 06 newobj 0x6000010
IL_000c 73 12 00 00 06 newobj 0x6000012
IL_0011 73 14 00 00 06 newobj 0x6000014
IL_0016 73 16 00 00 06 newobj 0x6000016
IL_001b 28 18 00 00 06 call 0x6000018
IL_0020 12 00 ldloca.s 0x0
IL_0022 28 19 00 00 06 call 0x6000019
IL_0027 2a ret
lvaGrabTemp returning 1 (V01 tmp0) (a long lifetime temp) called for OutgoingArgSpace.
; Initial local variable assignments
;
; V00 loc0 struct ( 8)
; V01 OutArgs lclBlk (na)
*************** In compInitDebuggingInfo() for Program:ViaStruct5()
getVars() returned cVars = 0, extendOthers = true
info.compVarScopesCount = 1
VarNum LVNum Name Beg End
0: 00h 00h V00 loc0 000h 028h
info.compStmtOffsetsCount = 0
info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE )
*************** In fgFindBasicBlocks() for Program:ViaStruct5()
Jump targets:
none
New Basic Block BB01 [0000] created.
BB01 [000..028)
IL Code Size,Instr 40, 10, Basic Block count 1, Local Variable Num,Ref count 2, 2 for method Program:ViaStruct5()
OPTIONS: opts.MinOpts() == false
Basic block list for 'Program:ViaStruct5()'
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return)
--------------------------------------------------------------------------------------------------------------------------------------
*************** In impImport() for Program:ViaStruct5()
impImportBlockPending for BB01
Importing BB01 (PC=000) of 'Program:ViaStruct5()'
[ 0] 0 (0x000) ldloca.s 0
[ 1] 2 (0x002) newobj
lvaGrabTemp returning 2 (V02 tmp1) called for NewObj constructor temp.
[000007] ------------ * STMT void (IL 0x000... ???)
[000004] ------------ | /--* ALLOCOBJ ref
[000003] ------------ | | \--* CNS_INT(h) long 0x7ffc12345508 method
[000006] -A---------- \--* ASG ref
[000005] D------N---- \--* LCL_VAR ref V02 tmp1
lvaSetClass: setting class for V02 to (00007FFC12345508) C [exact]
0600000F
In Compiler::impImportCall: opcode is newobj, kind=0, callRetType is void, structSize is 0
[000010] ------------ * STMT void (IL ???... ???)
[000009] I-C-G------- \--* CALL void C..ctor (exactContextHnd=0x00007FFC12345509)
[000008] ------------ this in rcx \--* LCL_VAR ref V02 tmp1
[ 2] 7 (0x007) newobj
lvaGrabTemp returning 3 (V03 tmp2) called for NewObj constructor temp.
06000010
In Compiler::impImportCall: opcode is newobj, kind=0, callRetType is void, structSize is 0
[000016] ------------ * STMT void (IL 0x007... ???)
[000014] I-C-G------- \--* CALL void S1..ctor (exactContextHnd=0x00007FFC123455E9)
[000013] L----------- this in rcx +--* ADDR byref
[000012] ------------ | \--* LCL_VAR struct V03 tmp2
[000011] ------------ arg1 \--* LCL_VAR ref V02 tmp1
[ 2] 12 (0x00c) newobj
lvaGrabTemp returning 4 (V04 tmp3) called for NewObj constructor temp.
06000012
In Compiler::impImportCall: opcode is newobj, kind=0, callRetType is void, structSize is 0
Calling impNormStructVal on:
[000017] ------------ * LCL_VAR struct V03 tmp2
resulting tree:
[000022] x----------- * OBJ(8) struct
[000021] L----------- \--* ADDR byref
[000017] ------------ \--* LCL_VAR struct V03 tmp2
[000024] ------------ * STMT void (IL 0x00C... ???)
[000020] I-C-G------- \--* CALL void S2..ctor (exactContextHnd=0x00007FFC123456C9)
[000019] L----------- this in rcx +--* ADDR byref
[000018] ------------ | \--* LCL_VAR struct V04 tmp3
[000022] x----------- arg1 \--* OBJ(8) struct
[000021] L----------- \--* ADDR byref
[000017] ------------ \--* LCL_VAR struct V03 tmp2
[ 2] 17 (0x011) newobj
lvaGrabTemp returning 5 (V05 tmp4) called for NewObj constructor temp.
06000014
In Compiler::impImportCall: opcode is newobj, kind=0, callRetType is void, structSize is 0
Calling impNormStructVal on:
[000025] ------------ * LCL_VAR struct V04 tmp3
resulting tree:
[000030] x----------- * OBJ(8) struct
[000029] L----------- \--* ADDR byref
[000025] ------------ \--* LCL_VAR struct V04 tmp3
[000032] ------------ * STMT void (IL 0x011... ???)
[000028] I-C-G------- \--* CALL void S3..ctor (exactContextHnd=0x00007FFC123457A9)
[000027] L----------- this in rcx +--* ADDR byref
[000026] ------------ | \--* LCL_VAR struct V05 tmp4
[000030] x----------- arg1 \--* OBJ(8) struct
[000029] L----------- \--* ADDR byref
[000025] ------------ \--* LCL_VAR struct V04 tmp3
[ 2] 22 (0x016) newobj
lvaGrabTemp returning 6 (V06 tmp5) called for NewObj constructor temp.
06000016
In Compiler::impImportCall: opcode is newobj, kind=0, callRetType is void, structSize is 0
Calling impNormStructVal on:
[000033] ------------ * LCL_VAR struct V05 tmp4
resulting tree:
[000038] x----------- * OBJ(8) struct
[000037] L----------- \--* ADDR byref
[000033] ------------ \--* LCL_VAR struct V05 tmp4
[000040] ------------ * STMT void (IL 0x016... ???)
[000036] I-C-G------- \--* CALL void S4..ctor (exactContextHnd=0x00007FFC12345889)
[000035] L----------- this in rcx +--* ADDR byref
[000034] ------------ | \--* LCL_VAR struct V06 tmp5
[000038] x----------- arg1 \--* OBJ(8) struct
[000037] L----------- \--* ADDR byref
[000033] ------------ \--* LCL_VAR struct V05 tmp4
[ 2] 27 (0x01b) call 06000018
In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0
Calling impNormStructVal on:
[000041] ------------ * LCL_VAR struct V06 tmp5
resulting tree:
[000044] x----------- * OBJ(8) struct
[000043] L----------- \--* ADDR byref
[000041] ------------ \--* LCL_VAR struct V06 tmp5
[000046] ------------ * STMT void (IL 0x01B... ???)
[000042] I-C-G------- \--* CALL void S5..ctor (exactContextHnd=0x00007FFC12345969)
[000002] L----------- this in rcx +--* ADDR byref
[000001] ------------ | \--* LCL_VAR struct V00 loc0
[000044] x----------- arg1 \--* OBJ(8) struct
[000043] L----------- \--* ADDR byref
[000041] ------------ \--* LCL_VAR struct V06 tmp5
[ 0] 32 (0x020) ldloca.s 0
[ 1] 34 (0x022) call 06000019 (Implicit Tail call: prefixFlags |= PREFIX_TAILCALL_IMPLICIT)
In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0
info.compCompHnd->canTailCall returned false for call [000049]
[000050] ------------ * STMT void (IL 0x020... ???)
[000049] I-C-G------- \--* CALL void S5.M (exactContextHnd=0x00007FFC12345969)
[000048] L----------- this in rcx \--* ADDR byref
[000047] ------------ \--* LCL_VAR struct V00 loc0
[ 0] 39 (0x027) ret
[000052] ------------ * STMT void (IL 0x027... ???)
[000051] ------------ \--* RETURN void
New BlockSet epoch 1, # of blocks (including unused BB00): 2, bitset array size: 1 (short)
*************** In fgMorph()
*************** In fgDebugCheckBBlist
*************** In fgInline()
Expanding INLINE_CANDIDATE in statement [000010] in BB01:
[000010] ------------ * STMT void (IL ???... ???)
[000009] I-C-G------- \--* CALL void C..ctor (exactContextHnd=0x00007FFC12345509)
[000008] ------------ this in rcx \--* LCL_VAR ref V02 tmp1
thisArg: is a local var
[000008] ------------ * LCL_VAR ref V02 tmp1
INLINER: inlineInfo.tokenLookupContextHandle for C:.ctor():this set to 0x00007FFC12345509:
Invoking compiler for the inlinee method C:.ctor():this :
IL to import:
IL_0000 02 ldarg.0
IL_0001 28 0b 00 00 0a call 0xA00000B
IL_0006 2a ret
INLINER impTokenLookupContextHandle for C:.ctor():this is 0x00007FFC12345509.
*************** In fgFindBasicBlocks() for C:.ctor():this
Jump targets:
none
New Basic Block BB02 [0001] created.
BB02 [000..007)
Basic block list for 'C:.ctor():this'
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB02 [0001] 1 1 [000..007) (return)
--------------------------------------------------------------------------------------------------------------------------------------
*************** In impImport() for C:.ctor():this
impImportBlockPending for BB02
Importing BB02 (PC=000) of 'C:.ctor():this'
[ 0] 0 (0x000) ldarg.0
[ 1] 1 (0x001) call 0A00000B
In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0
[000055] ------------ * STMT void
[000054] I-C-G------- \--* CALL void Object..ctor (exactContextHnd=0x00007FFC69E17DB9)
[000008] ------------ this in rcx \--* LCL_VAR ref V02 tmp1
[ 0] 6 (0x006) ret
----------- Statements (and blocks) added due to the inlining of call [000009] -----------
Arguments setup:
Inlinee method body:
[000055] ------------ * STMT void (IL ???... ???)
[000054] I-C-G------- \--* CALL void Object..ctor (exactContextHnd=0x00007FFC69E17DB9)
[000008] ------------ this in rcx \--* LCL_VAR ref V02 tmp1
fgInlineAppendStatements: no gc ref inline locals.
Successfully inlined C:.ctor():this (7 IL bytes) (depth 1) [below ALWAYS_INLINE size]
--------------------------------------------------------------------------------------------
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'Program:ViaStruct5()' calling 'C:.ctor():this'
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size'
Expanding INLINE_CANDIDATE in statement [000055] in BB01:
[000055] ------------ * STMT void (IL ???... ???)
[000054] I-C-G------- \--* CALL void Object..ctor (exactContextHnd=0x00007FFC69E17DB9)
[000008] ------------ this in rcx \--* LCL_VAR ref V02 tmp1
thisArg: is a local var
[000008] ------------ * LCL_VAR ref V02 tmp1
INLINER: inlineInfo.tokenLookupContextHandle for Object:.ctor():this set to 0x00007FFC69E17DB9:
Invoking compiler for the inlinee method Object:.ctor():this :
IL to import:
IL_0000 2a ret
INLINER impTokenLookupContextHandle for Object:.ctor():this is 0x00007FFC69E17DB9.
*************** In fgFindBasicBlocks() for Object:.ctor():this
Jump targets:
none
New Basic Block BB03 [0002] created.
BB03 [000..001)
Basic block list for 'Object:.ctor():this'
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB03 [0002] 1 1 [000..001) (return)
--------------------------------------------------------------------------------------------------------------------------------------
*************** In impImport() for Object:.ctor():this
impImportBlockPending for BB03
Importing BB03 (PC=000) of 'Object:.ctor():this'
[ 0] 0 (0x000) ret
----------- Statements (and blocks) added due to the inlining of call [000054] -----------
Arguments setup:
Inlinee method body:fgInlineAppendStatements: no gc ref inline locals.
Successfully inlined Object:.ctor():this (1 IL bytes) (depth 2) [below ALWAYS_INLINE size]
--------------------------------------------------------------------------------------------
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'Program:ViaStruct5()' calling 'Object:.ctor():this'
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size'
Expanding INLINE_CANDIDATE in statement [000016] in BB01:
[000016] ------------ * STMT void (IL 0x007... ???)
[000014] I-C-G------- \--* CALL void S1..ctor (exactContextHnd=0x00007FFC123455E9)
[000013] L----------- this in rcx +--* ADDR byref
[000012] ------------ | \--* LCL_VAR struct V03 tmp2
[000011] ------------ arg1 \--* LCL_VAR ref V02 tmp1
thisArg: is a constant is byref to a struct local
[000013] L----------- * ADDR byref
[000012] ------------ \--* LCL_VAR struct V03 tmp2
Argument #1: is a local var
[000011] ------------ * LCL_VAR ref V02 tmp1
INLINER: inlineInfo.tokenLookupContextHandle for S1:.ctor(ref):this set to 0x00007FFC123455E9:
Invoking compiler for the inlinee method S1:.ctor(ref):this :
IL to import:
IL_0000 02 ldarg.0
IL_0001 03 ldarg.1
IL_0002 7d 01 00 00 04 stfld 0x4000001
IL_0007 2a ret
INLINER impTokenLookupContextHandle for S1:.ctor(ref):this is 0x00007FFC123455E9.
*************** In fgFindBasicBlocks() for S1:.ctor(ref):this
Jump targets:
none
New Basic Block BB04 [0003] created.
BB04 [000..008)
Basic block list for 'S1:.ctor(ref):this'
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB04 [0003] 1 1 [000..008) (return)
--------------------------------------------------------------------------------------------------------------------------------------
*************** In impImport() for S1:.ctor(ref):this
impImportBlockPending for BB04
Importing BB04 (PC=000) of 'S1:.ctor(ref):this'
[ 0] 0 (0x000) ldarg.0
[ 1] 1 (0x001) ldarg.1
[ 2] 2 (0x002) stfld 04000001
[000064] ------------ * STMT void
[000011] ------------ | /--* LCL_VAR ref V02 tmp1
[000063] -A---------- \--* ASG ref
[000062] -------N---- \--* FIELD ref _c
[000060] L----------- \--* ADDR byref
[000061] ------------ \--* LCL_VAR struct V03 tmp2
[ 0] 7 (0x007) ret
----------- Statements (and blocks) added due to the inlining of call [000014] -----------
Arguments setup:
Inlinee method body:
[000064] ------------ * STMT void (IL 0x007... ???)
[000011] ------------ | /--* LCL_VAR ref V02 tmp1
[000063] -A---------- \--* ASG ref
[000062] -------N---- \--* FIELD ref _c
[000060] L----------- \--* ADDR byref
[000061] ------------ \--* LCL_VAR struct V03 tmp2
fgInlineAppendStatements: no gc ref inline locals.
Successfully inlined S1:.ctor(ref):this (8 IL bytes) (depth 1) [below ALWAYS_INLINE size]
--------------------------------------------------------------------------------------------
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'Program:ViaStruct5()' calling 'S1:.ctor(ref):this'
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size'
Expanding INLINE_CANDIDATE in statement [000024] in BB01:
[000024] ------------ * STMT void (IL 0x00C... ???)
[000020] I-C-G------- \--* CALL void S2..ctor (exactContextHnd=0x00007FFC123456C9)
[000019] L----------- this in rcx +--* ADDR byref
[000018] ------------ | \--* LCL_VAR struct V04 tmp3
[000022] x----------- arg1 \--* OBJ(8) struct
[000021] L----------- \--* ADDR byref
[000017] ------------ \--* LCL_VAR struct V03 tmp2
thisArg: is a constant is byref to a struct local
[000019] L----------- * ADDR byref
[000018] ------------ \--* LCL_VAR struct V04 tmp3
Argument #1:
[000022] x----------- * OBJ(8) struct
[000021] L----------- \--* ADDR byref
[000017] ------------ \--* LCL_VAR struct V03 tmp2
INLINER: inlineInfo.tokenLookupContextHandle for S2:.ctor(struct):this set to 0x00007FFC123456C9:
Invoking compiler for the inlinee method S2:.ctor(struct):this :
IL to import:
IL_0000 02 ldarg.0
IL_0001 03 ldarg.1
IL_0002 7d 02 00 00 04 stfld 0x4000002
IL_0007 2a ret
INLINER impTokenLookupContextHandle for S2:.ctor(struct):this is 0x00007FFC123456C9.
*************** In fgFindBasicBlocks() for S2:.ctor(struct):this
Jump targets:
none
New Basic Block BB05 [0004] created.
BB05 [000..008)
Basic block list for 'S2:.ctor(struct):this'
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB05 [0004] 1 1 [000..008) (return)
--------------------------------------------------------------------------------------------------------------------------------------
*************** In impImport() for S2:.ctor(struct):this
impImportBlockPending for BB05
Importing BB05 (PC=000) of 'S2:.ctor(struct):this'
[ 0] 0 (0x000) ldarg.0
[ 1] 1 (0x001) ldarg.1
lvaGrabTemp returning 7 (V07 tmp6) called for Inlining Arg.
[ 2] 2 (0x002) stfld 04000002
[000074] ------------ * STMT void
[000069] ------------ | /--* LCL_VAR struct V07 tmp6
[000073] -A------R--- \--* ASG struct (copy)
[000072] ------------ \--* OBJ(8) struct
[000071] ------------ \--* ADDR byref
[000070] ------------ \--* FIELD struct _s
[000067] L----------- \--* ADDR byref
[000068] ------------ \--* LCL_VAR struct V04 tmp3
[ 0] 7 (0x007) ret
----------- Statements (and blocks) added due to the inlining of call [000020] -----------
Arguments setup:
[000078] ------------ * STMT void (IL 0x00C... ???)
[000022] x----------- | /--* OBJ(8) struct
[000021] L----------- | | \--* ADDR byref
[000017] ------------ | | \--* LCL_VAR struct V03 tmp2
[000077] -A------R--- \--* ASG struct (copy)
[000075] D----------- \--* LCL_VAR struct V07 tmp6
Inlinee method body:
[000074] ------------ * STMT void (IL 0x00C... ???)
[000069] ------------ | /--* LCL_VAR struct V07 tmp6
[000073] -A------R--- \--* ASG struct (copy)
[000072] ------------ \--* OBJ(8) struct
[000071] ------------ \--* ADDR byref
[000070] ------------ \--* FIELD struct _s
[000067] L----------- \--* ADDR byref
[000068] ------------ \--* LCL_VAR struct V04 tmp3
fgInlineAppendStatements: no gc ref inline locals.
Successfully inlined S2:.ctor(struct):this (8 IL bytes) (depth 1) [below ALWAYS_INLINE size]
--------------------------------------------------------------------------------------------
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'Program:ViaStruct5()' calling 'S2:.ctor(struct):this'
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size'
Expanding INLINE_CANDIDATE in statement [000032] in BB01:
[000032] ------------ * STMT void (IL 0x011... ???)
[000028] I-C-G------- \--* CALL void S3..ctor (exactContextHnd=0x00007FFC123457A9)
[000027] L----------- this in rcx +--* ADDR byref
[000026] ------------ | \--* LCL_VAR struct V05 tmp4
[000030] x----------- arg1 \--* OBJ(8) struct
[000029] L----------- \--* ADDR byref
[000025] ------------ \--* LCL_VAR struct V04 tmp3
thisArg: is a constant is byref to a struct local
[000027] L----------- * ADDR byref
[000026] ------------ \--* LCL_VAR struct V05 tmp4
Argument #1:
[000030] x----------- * OBJ(8) struct
[000029] L----------- \--* ADDR byref
[000025] ------------ \--* LCL_VAR struct V04 tmp3
INLINER: inlineInfo.tokenLookupContextHandle for S3:.ctor(struct):this set to 0x00007FFC123457A9:
Invoking compiler for the inlinee method S3:.ctor(struct):this :
IL to import:
IL_0000 02 ldarg.0
IL_0001 03 ldarg.1
IL_0002 7d 03 00 00 04 stfld 0x4000003
IL_0007 2a ret
INLINER impTokenLookupContextHandle for S3:.ctor(struct):this is 0x00007FFC123457A9.
*************** In fgFindBasicBlocks() for S3:.ctor(struct):this
Jump targets:
none
New Basic Block BB06 [0005] created.
BB06 [000..008)
Basic block list for 'S3:.ctor(struct):this'
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB06 [0005] 1 1 [000..008) (return)
--------------------------------------------------------------------------------------------------------------------------------------
*************** In impImport() for S3:.ctor(struct):this
impImportBlockPending for BB06
Importing BB06 (PC=000) of 'S3:.ctor(struct):this'
[ 0] 0 (0x000) ldarg.0
[ 1] 1 (0x001) ldarg.1
lvaGrabTemp returning 8 (V08 tmp7) called for Inlining Arg.
[ 2] 2 (0x002) stfld 04000003
[000088] ------------ * STMT void
[000083] ------------ | /--* LCL_VAR struct V08 tmp7
[000087] -A------R--- \--* ASG struct (copy)
[000086] ------------ \--* OBJ(8) struct
[000085] ------------ \--* ADDR byref
[000084] ------------ \--* FIELD struct _s
[000081] L----------- \--* ADDR byref
[000082] ------------ \--* LCL_VAR struct V05 tmp4
[ 0] 7 (0x007) ret
----------- Statements (and blocks) added due to the inlining of call [000028] -----------
Arguments setup:
[000092] ------------ * STMT void (IL 0x011... ???)
[000030] x----------- | /--* OBJ(8) struct
[000029] L----------- | | \--* ADDR byref
[000025] ------------ | | \--* LCL_VAR struct V04 tmp3
[000091] -A------R--- \--* ASG struct (copy)
[000089] D----------- \--* LCL_VAR struct V08 tmp7
Inlinee method body:
[000088] ------------ * STMT void (IL 0x011... ???)
[000083] ------------ | /--* LCL_VAR struct V08 tmp7
[000087] -A------R--- \--* ASG struct (copy)
[000086] ------------ \--* OBJ(8) struct
[000085] ------------ \--* ADDR byref
[000084] ------------ \--* FIELD struct _s
[000081] L----------- \--* ADDR byref
[000082] ------------ \--* LCL_VAR struct V05 tmp4
fgInlineAppendStatements: no gc ref inline locals.
Successfully inlined S3:.ctor(struct):this (8 IL bytes) (depth 1) [below ALWAYS_INLINE size]
--------------------------------------------------------------------------------------------
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'Program:ViaStruct5()' calling 'S3:.ctor(struct):this'
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size'
Expanding INLINE_CANDIDATE in statement [000040] in BB01:
[000040] ------------ * STMT void (IL 0x016... ???)
[000036] I-C-G------- \--* CALL void S4..ctor (exactContextHnd=0x00007FFC12345889)
[000035] L----------- this in rcx +--* ADDR byref
[000034] ------------ | \--* LCL_VAR struct V06 tmp5
[000038] x----------- arg1 \--* OBJ(8) struct
[000037] L----------- \--* ADDR byref
[000033] ------------ \--* LCL_VAR struct V05 tmp4
thisArg: is a constant is byref to a struct local
[000035] L----------- * ADDR byref
[000034] ------------ \--* LCL_VAR struct V06 tmp5
Argument #1:
[000038] x----------- * OBJ(8) struct
[000037] L----------- \--* ADDR byref
[000033] ------------ \--* LCL_VAR struct V05 tmp4
INLINER: inlineInfo.tokenLookupContextHandle for S4:.ctor(struct):this set to 0x00007FFC12345889:
Invoking compiler for the inlinee method S4:.ctor(struct):this :
IL to import:
IL_0000 02 ldarg.0
IL_0001 03 ldarg.1
IL_0002 7d 04 00 00 04 stfld 0x4000004
IL_0007 2a ret
INLINER impTokenLookupContextHandle for S4:.ctor(struct):this is 0x00007FFC12345889.
*************** In fgFindBasicBlocks() for S4:.ctor(struct):this
Jump targets:
none
New Basic Block BB07 [0006] created.
BB07 [000..008)
Basic block list for 'S4:.ctor(struct):this'
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB07 [0006] 1 1 [000..008) (return)
--------------------------------------------------------------------------------------------------------------------------------------
*************** In impImport() for S4:.ctor(struct):this
impImportBlockPending for BB07
Importing BB07 (PC=000) of 'S4:.ctor(struct):this'
[ 0] 0 (0x000) ldarg.0
[ 1] 1 (0x001) ldarg.1
lvaGrabTemp returning 9 (V09 tmp8) called for Inlining Arg.
[ 2] 2 (0x002) stfld 04000004
[000102] ------------ * STMT void
[000097] ------------ | /--* LCL_VAR struct V09 tmp8
[000101] -A------R--- \--* ASG struct (copy)
[000100] ------------ \--* OBJ(8) struct
[000099] ------------ \--* ADDR byref
[000098] ------------ \--* FIELD struct _s
[000095] L----------- \--* ADDR byref
[000096] ------------ \--* LCL_VAR struct V06 tmp5
[ 0] 7 (0x007) ret
----------- Statements (and blocks) added due to the inlining of call [000036] -----------
Arguments setup:
[000106] ------------ * STMT void (IL 0x016... ???)
[000038] x----------- | /--* OBJ(8) struct
[000037] L----------- | | \--* ADDR byref
[000033] ------------ | | \--* LCL_VAR struct V05 tmp4
[000105] -A------R--- \--* ASG struct (copy)
[000103] D----------- \--* LCL_VAR struct V09 tmp8
Inlinee method body:
[000102] ------------ * STMT void (IL 0x016... ???)
[000097] ------------ | /--* LCL_VAR struct V09 tmp8
[000101] -A------R--- \--* ASG struct (copy)
[000100] ------------ \--* OBJ(8) struct
[000099] ------------ \--* ADDR byref
[000098] ------------ \--* FIELD struct _s
[000095] L----------- \--* ADDR byref
[000096] ------------ \--* LCL_VAR struct V06 tmp5
fgInlineAppendStatements: no gc ref inline locals.
Successfully inlined S4:.ctor(struct):this (8 IL bytes) (depth 1) [below ALWAYS_INLINE size]
--------------------------------------------------------------------------------------------
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'Program:ViaStruct5()' calling 'S4:.ctor(struct):this'
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size'
Expanding INLINE_CANDIDATE in statement [000046] in BB01:
[000046] ------------ * STMT void (IL 0x01B... ???)
[000042] I-C-G------- \--* CALL void S5..ctor (exactContextHnd=0x00007FFC12345969)
[000002] L----------- this in rcx +--* ADDR byref
[000001] ------------ | \--* LCL_VAR struct V00 loc0
[000044] x----------- arg1 \--* OBJ(8) struct
[000043] L----------- \--* ADDR byref
[000041] ------------ \--* LCL_VAR struct V06 tmp5
thisArg: is a constant is byref to a struct local
[000002] L----------- * ADDR byref
[000001] ------------ \--* LCL_VAR struct V00 loc0
Argument #1:
[000044] x----------- * OBJ(8) struct
[000043] L----------- \--* ADDR byref
[000041] ------------ \--* LCL_VAR struct V06 tmp5
INLINER: inlineInfo.tokenLookupContextHandle for S5:.ctor(struct):this set to 0x00007FFC12345969:
Invoking compiler for the inlinee method S5:.ctor(struct):this :
IL to import:
IL_0000 02 ldarg.0
IL_0001 03 ldarg.1
IL_0002 7d 05 00 00 04 stfld 0x4000005
IL_0007 2a ret
INLINER impTokenLookupContextHandle for S5:.ctor(struct):this is 0x00007FFC12345969.
*************** In fgFindBasicBlocks() for S5:.ctor(struct):this
Jump targets:
none
New Basic Block BB08 [0007] created.
BB08 [000..008)
Basic block list for 'S5:.ctor(struct):this'
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB08 [0007] 1 1 [000..008) (return)
--------------------------------------------------------------------------------------------------------------------------------------
*************** In impImport() for S5:.ctor(struct):this
impImportBlockPending for BB08
Importing BB08 (PC=000) of 'S5:.ctor(struct):this'
[ 0] 0 (0x000) ldarg.0
[ 1] 1 (0x001) ldarg.1
lvaGrabTemp returning 10 (V10 tmp9) called for Inlining Arg.
[ 2] 2 (0x002) stfld 04000005
[000116] ------------ * STMT void
[000111] ------------ | /--* LCL_VAR struct V10 tmp9
[000115] -A------R--- \--* ASG struct (copy)
[000114] ------------ \--* OBJ(8) struct
[000113] ------------ \--* ADDR byref
[000112] ------------ \--* FIELD struct _s
[000109] L----------- \--* ADDR byref
[000110] ------------ \--* LCL_VAR struct V00 loc0
[ 0] 7 (0x007) ret
----------- Statements (and blocks) added due to the inlining of call [000042] -----------
Arguments setup:
[000120] ------------ * STMT void (IL 0x01B... ???)
[000044] x----------- | /--* OBJ(8) struct
[000043] L----------- | | \--* ADDR byref
[000041] ------------ | | \--* LCL_VAR struct V06 tmp5
[000119] -A------R--- \--* ASG struct (copy)
[000117] D----------- \--* LCL_VAR struct V10 tmp9
Inlinee method body:
[000116] ------------ * STMT void (IL 0x01B... ???)
[000111] ------------ | /--* LCL_VAR struct V10 tmp9
[000115] -A------R--- \--* ASG struct (copy)
[000114] ------------ \--* OBJ(8) struct
[000113] ------------ \--* ADDR byref
[000112] ------------ \--* FIELD struct _s
[000109] L----------- \--* ADDR byref
[000110] ------------ \--* LCL_VAR struct V00 loc0
fgInlineAppendStatements: no gc ref inline locals.
Successfully inlined S5:.ctor(struct):this (8 IL bytes) (depth 1) [below ALWAYS_INLINE size]
--------------------------------------------------------------------------------------------
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'Program:ViaStruct5()' calling 'S5:.ctor(struct):this'
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size'
Expanding INLINE_CANDIDATE in statement [000050] in BB01:
[000050] ------------ * STMT void (IL 0x020... ???)
[000049] I-C-G------- \--* CALL void S5.M (exactContextHnd=0x00007FFC12345969)
[000048] L----------- this in rcx \--* ADDR byref
[000047] ------------ \--* LCL_VAR struct V00 loc0
thisArg: is a constant is byref to a struct local
[000048] L----------- * ADDR byref
[000047] ------------ \--* LCL_VAR struct V00 loc0
INLINER: inlineInfo.tokenLookupContextHandle for S5:M():this set to 0x00007FFC12345969:
Invoking compiler for the inlinee method S5:M():this :
IL to import:
IL_0000 02 ldarg.0
IL_0001 7c 05 00 00 04 ldflda 0x4000005
IL_0006 28 17 00 00 06 call 0x6000017
IL_000b 2a ret
INLINER impTokenLookupContextHandle for S5:M():this is 0x00007FFC12345969.
*************** In fgFindBasicBlocks() for S5:M():this
Jump targets:
none
New Basic Block BB09 [0008] created.
BB09 [000..00C)
Basic block list for 'S5:M():this'
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB09 [0008] 1 1 [000..00C) (return)
--------------------------------------------------------------------------------------------------------------------------------------
*************** In impImport() for S5:M():this
impImportBlockPending for BB09
Importing BB09 (PC=000) of 'S5:M():this'
[ 0] 0 (0x000) ldarg.0
[ 1] 1 (0x001) ldflda 04000005
[ 1] 6 (0x006) call 06000017
In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0
[000128] ------------ * STMT void
[000127] I-C-G------- \--* CALL void S4.M (exactContextHnd=0x00007FFC12345889)
[000126] ------------ this in rcx \--* ADDR byref
[000125] ------------ \--* FIELD struct _s
[000123] L----------- \--* ADDR byref
[000124] ------------ \--* LCL_VAR struct V00 loc0
[ 0] 11 (0x00b) ret
----------- Statements (and blocks) added due to the inlining of call [000049] -----------
Arguments setup:
Inlinee method body:
[000128] ------------ * STMT void (IL 0x020... ???)
[000127] I-C-G------- \--* CALL void S4.M (exactContextHnd=0x00007FFC12345889)
[000126] ------------ this in rcx \--* ADDR byref
[000125] ------------ \--* FIELD struct _s
[000123] L----------- \--* ADDR byref
[000124] ------------ \--* LCL_VAR struct V00 loc0
fgInlineAppendStatements: no gc ref inline locals.
Successfully inlined S5:M():this (12 IL bytes) (depth 1) [below ALWAYS_INLINE size]
--------------------------------------------------------------------------------------------
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'Program:ViaStruct5()' calling 'S5:M():this'
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size'
Expanding INLINE_CANDIDATE in statement [000128] in BB01:
[000128] ------------ * STMT void (IL 0x020... ???)
[000127] I-C-G------- \--* CALL void S4.M (exactContextHnd=0x00007FFC12345889)
[000126] ------------ this in rcx \--* ADDR byref
[000125] ------------ \--* FIELD struct _s
[000123] L----------- \--* ADDR byref
[000124] ------------ \--* LCL_VAR struct V00 loc0
thisArg: has caller local ref is byref to a struct local
[000126] ------------ * ADDR byref
[000125] ------------ \--* FIELD struct _s
[000123] L----------- \--* ADDR byref
[000124] ------------ \--* LCL_VAR struct V00 loc0
INLINER: inlineInfo.tokenLookupContextHandle for S4:M():this set to 0x00007FFC12345889:
Invoking compiler for the inlinee method S4:M():this :
IL to import:
IL_0000 02 ldarg.0
IL_0001 7c 04 00 00 04 ldflda 0x4000004
IL_0006 28 15 00 00 06 call 0x6000015
IL_000b 2a ret
INLINER impTokenLookupContextHandle for S4:M():this is 0x00007FFC12345889.
*************** In fgFindBasicBlocks() for S4:M():this
Jump targets:
none
New Basic Block BB10 [0009] created.
BB10 [000..00C)
Basic block list for 'S4:M():this'
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB10 [0009] 1 1 [000..00C) (return)
--------------------------------------------------------------------------------------------------------------------------------------
*************** In impImport() for S4:M():this
impImportBlockPending for BB10
Importing BB10 (PC=000) of 'S4:M():this'
[ 0] 0 (0x000) ldarg.0
[ 1] 1 (0x001) ldflda 04000004
[ 1] 6 (0x006) call 06000015
In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0
[000138] ------------ * STMT void
[000137] I-C-G------- \--* CALL void S3.M (exactContextHnd=0x00007FFC123457A9)
[000136] ----G------- this in rcx \--* ADDR byref
[000135] ----G------- \--* FIELD struct _s
[000131] ----G------- \--* ADDR byref
[000132] ----G------- \--* FIELD struct _s
[000133] L----------- \--* ADDR byref
[000134] ------------ \--* LCL_VAR struct V00 loc0
[ 0] 11 (0x00b) ret
----------- Statements (and blocks) added due to the inlining of call [000127] -----------
Arguments setup:
Inlinee method body:
[000138] ------------ * STMT void (IL 0x020... ???)
[000137] I-C-G------- \--* CALL void S3.M (exactContextHnd=0x00007FFC123457A9)
[000136] ----G------- this in rcx \--* ADDR byref
[000135] ----G------- \--* FIELD struct _s
[000131] ----G------- \--* ADDR byref
[000132] ----G------- \--* FIELD struct _s
[000133] L----------- \--* ADDR byref
[000134] ------------ \--* LCL_VAR struct V00 loc0
fgInlineAppendStatements: no gc ref inline locals.
Successfully inlined S4:M():this (12 IL bytes) (depth 2) [below ALWAYS_INLINE size]
--------------------------------------------------------------------------------------------
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'Program:ViaStruct5()' calling 'S4:M():this'
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size'
Expanding INLINE_CANDIDATE in statement [000138] in BB01:
[000138] ------------ * STMT void (IL 0x020... ???)
[000137] I-C-G------- \--* CALL void S3.M (exactContextHnd=0x00007FFC123457A9)
[000136] ----G------- this in rcx \--* ADDR byref
[000135] ----G------- \--* FIELD struct _s
[000131] ----G------- \--* ADDR byref
[000132] ----G------- \--* FIELD struct _s
[000133] L----------- \--* ADDR byref
[000134] ------------ \--* LCL_VAR struct V00 loc0
thisArg: has global refs has caller local ref is byref to a struct local
[000136] ----G------- * ADDR byref
[000135] ----G------- \--* FIELD struct _s
[000131] ----G------- \--* ADDR byref
[000132] ----G------- \--* FIELD struct _s
[000133] L----------- \--* ADDR byref
[000134] ------------ \--* LCL_VAR struct V00 loc0
INLINER: inlineInfo.tokenLookupContextHandle for S3:M():this set to 0x00007FFC123457A9:
Invoking compiler for the inlinee method S3:M():this :
IL to import:
IL_0000 02 ldarg.0
IL_0001 7c 03 00 00 04 ldflda 0x4000003
IL_0006 28 13 00 00 06 call 0x6000013
IL_000b 2a ret
INLINER impTokenLookupContextHandle for S3:M():this is 0x00007FFC123457A9.
*************** In fgFindBasicBlocks() for S3:M():this
Jump targets:
none
New Basic Block BB11 [0010] created.
BB11 [000..00C)
Basic block list for 'S3:M():this'
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB11 [0010] 1 1 [000..00C) (return)
--------------------------------------------------------------------------------------------------------------------------------------
*************** In impImport() for S3:M():this
impImportBlockPending for BB11
Importing BB11 (PC=000) of 'S3:M():this'
[ 0] 0 (0x000) ldarg.0
[ 1] 1 (0x001) ldflda 04000003
[ 1] 6 (0x006) call 06000013
In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0
[000150] ------------ * STMT void
[000149] I-C-G------- \--* CALL void S2.M (exactContextHnd=0x00007FFC123456C9)
[000148] ----G------- this in rcx \--* ADDR byref
[000147] ----G------- \--* FIELD struct _s
[000141] ----G------- \--* ADDR byref
[000142] ----G------- \--* FIELD struct _s
[000143] ----G------- \--* ADDR byref
[000144] ----G------- \--* FIELD struct _s
[000145] L----------- \--* ADDR byref
[000146] ------------ \--* LCL_VAR struct V00 loc0
[ 0] 11 (0x00b) ret
----------- Statements (and blocks) added due to the inlining of call [000137] -----------
Arguments setup:
Inlinee method body:
[000150] ------------ * STMT void (IL 0x020... ???)
[000149] I-C-G------- \--* CALL void S2.M (exactContextHnd=0x00007FFC123456C9)
[000148] ----G------- this in rcx \--* ADDR byref
[000147] ----G------- \--* FIELD struct _s
[000141] ----G------- \--* ADDR byref
[000142] ----G------- \--* FIELD struct _s
[000143] ----G------- \--* ADDR byref
[000144] ----G------- \--* FIELD struct _s
[000145] L----------- \--* ADDR byref
[000146] ------------ \--* LCL_VAR struct V00 loc0
fgInlineAppendStatements: no gc ref inline locals.
Successfully inlined S3:M():this (12 IL bytes) (depth 3) [below ALWAYS_INLINE size]
--------------------------------------------------------------------------------------------
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'Program:ViaStruct5()' calling 'S3:M():this'
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size'
Expanding INLINE_CANDIDATE in statement [000150] in BB01:
[000150] ------------ * STMT void (IL 0x020... ???)
[000149] I-C-G------- \--* CALL void S2.M (exactContextHnd=0x00007FFC123456C9)
[000148] ----G------- this in rcx \--* ADDR byref
[000147] ----G------- \--* FIELD struct _s
[000141] ----G------- \--* ADDR byref
[000142] ----G------- \--* FIELD struct _s
[000143] ----G------- \--* ADDR byref
[000144] ----G------- \--* FIELD struct _s
[000145] L----------- \--* ADDR byref
[000146] ------------ \--* LCL_VAR struct V00 loc0
thisArg: has global refs has caller local ref is byref to a struct local
[000148] ----G------- * ADDR byref
[000147] ----G------- \--* FIELD struct _s
[000141] ----G------- \--* ADDR byref
[000142] ----G------- \--* FIELD struct _s
[000143] ----G------- \--* ADDR byref
[000144] ----G------- \--* FIELD struct _s
[000145] L----------- \--* ADDR byref
[000146] ------------ \--* LCL_VAR struct V00 loc0
INLINER: inlineInfo.tokenLookupContextHandle for S2:M():this set to 0x00007FFC123456C9:
Invoking compiler for the inlinee method S2:M():this :
IL to import:
IL_0000 02 ldarg.0
IL_0001 7c 02 00 00 04 ldflda 0x4000002
IL_0006 28 11 00 00 06 call 0x6000011
IL_000b 2a ret
INLINER impTokenLookupContextHandle for S2:M():this is 0x00007FFC123456C9.
*************** In fgFindBasicBlocks() for S2:M():this
Jump targets:
none
New Basic Block BB12 [0011] created.
BB12 [000..00C)
Basic block list for 'S2:M():this'
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB12 [0011] 1 1 [000..00C) (return)
--------------------------------------------------------------------------------------------------------------------------------------
*************** In impImport() for S2:M():this
impImportBlockPending for BB12
Importing BB12 (PC=000) of 'S2:M():this'
[ 0] 0 (0x000) ldarg.0
[ 1] 1 (0x001) ldflda 04000002
[ 1] 6 (0x006) call 06000011
In Compiler::impImportCall: opcode is call, kind=0, callRetType is void, structSize is 0
[000164] ------------ * STMT void
[000163] I-C-G------- \--* CALL void S1.M (exactContextHnd=0x00007FFC123455E9)
[000162] ----G------- this in rcx \--* ADDR byref
[000161] ----G------- \--* FIELD struct _s
[000153] ----G------- \--* ADDR byref
[000154] ----G------- \--* FIELD struct _s
[000155] ----G------- \--* ADDR byref
[000156] ----G------- \--* FIELD struct _s
[000157] ----G------- \--* ADDR byref
[000158] ----G------- \--* FIELD struct _s
[000159] L----------- \--* ADDR byref
[000160] ------------ \--* LCL_VAR struct V00 loc0
[ 0] 11 (0x00b) ret
----------- Statements (and blocks) added due to the inlining of call [000149] -----------
Arguments setup:
Inlinee method body:
[000164] ------------ * STMT void (IL 0x020... ???)
[000163] I-C-G------- \--* CALL void S1.M (exactContextHnd=0x00007FFC123455E9)
[000162] ----G------- this in rcx \--* ADDR byref
[000161] ----G------- \--* FIELD struct _s
[000153] ----G------- \--* ADDR byref
[000154] ----G------- \--* FIELD struct _s
[000155] ----G------- \--* ADDR byref
[000156] ----G------- \--* FIELD struct _s
[000157] ----G------- \--* ADDR byref
[000158] ----G------- \--* FIELD struct _s
[000159] L----------- \--* ADDR byref
[000160] ------------ \--* LCL_VAR struct V00 loc0
fgInlineAppendStatements: no gc ref inline locals.
Successfully inlined S2:M():this (12 IL bytes) (depth 4) [below ALWAYS_INLINE size]
--------------------------------------------------------------------------------------------
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'Program:ViaStruct5()' calling 'S2:M():this'
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size'
Expanding INLINE_CANDIDATE in statement [000164] in BB01:
[000164] ------------ * STMT void (IL 0x020... ???)
[000163] I-C-G------- \--* CALL void S1.M (exactContextHnd=0x00007FFC123455E9)
[000162] ----G------- this in rcx \--* ADDR byref
[000161] ----G------- \--* FIELD struct _s
[000153] ----G------- \--* ADDR byref
[000154] ----G------- \--* FIELD struct _s
[000155] ----G------- \--* ADDR byref
[000156] ----G------- \--* FIELD struct _s
[000157] ----G------- \--* ADDR byref
[000158] ----G------- \--* FIELD struct _s
[000159] L----------- \--* ADDR byref
[000160] ------------ \--* LCL_VAR struct V00 loc0
thisArg: has global refs has caller local ref is byref to a struct local
[000162] ----G------- * ADDR byref
[000161] ----G------- \--* FIELD struct _s
[000153] ----G------- \--* ADDR byref
[000154] ----G------- \--* FIELD struct _s
[000155] ----G------- \--* ADDR byref
[000156] ----G------- \--* FIELD struct _s
[000157] ----G------- \--* ADDR byref
[000158] ----G------- \--* FIELD struct _s
[000159] L----------- \--* ADDR byref
[000160] ------------ \--* LCL_VAR struct V00 loc0
INLINER: inlineInfo.tokenLookupContextHandle for S1:M():this set to 0x00007FFC123455E9:
Invoking compiler for the inlinee method S1:M():this :
IL to import:
IL_0000 02 ldarg.0
IL_0001 7b 01 00 00 04 ldfld 0x4000001
IL_0006 6f 0e 00 00 06 callvirt 0x600000E
IL_000b 2a ret
INLINER impTokenLookupContextHandle for S1:M():this is 0x00007FFC123455E9.
*************** In fgFindBasicBlocks() for S1:M():this
Jump targets:
none
New Basic Block BB13 [0012] created.
BB13 [000..00C)
Basic block list for 'S1:M():this'
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB13 [0012] 1 1 [000..00C) (return)
--------------------------------------------------------------------------------------------------------------------------------------
*************** In impImport() for S1:M():this
impImportBlockPending for BB13
Importing BB13 (PC=000) of 'S1:M():this'
[ 0] 0 (0x000) ldarg.0
[ 1] 1 (0x001) ldfld 04000001
[ 1] 6 (0x006) callvirt 0600000E
In Compiler::impImportCall: opcode is callvirt, kind=0, callRetType is void, structSize is 0
INLINER: during 'impMarkInlineCandidate' result 'failed this callee' reason 'noinline per IL/cached result' for 'S1:M():this' calling 'C:M():this'
INLINER: during 'impMarkInlineCandidate' result 'failed this callee' reason 'noinline per IL/cached result'
[000179] ------------ * STMT void
[000178] --C-G------- \--* CALL nullcheck void C.M
[000177] ----G------- this in rcx \--* FIELD ref _c
[000167] ----G------- \--* ADDR byref
[000168] ----G------- \--* FIELD struct _s
[000169] ----G------- \--* ADDR byref
[000170] ----G------- \--* FIELD struct _s
[000171] ----G------- \--* ADDR byref
[000172] ----G------- \--* FIELD struct _s
[000173] ----G------- \--* ADDR byref
[000174] ----G------- \--* FIELD struct _s
[000175] L----------- \--* ADDR byref
[000176] ------------ \--* LCL_VAR struct V00 loc0
[ 0] 11 (0x00b) ret
----------- Statements (and blocks) added due to the inlining of call [000163] -----------
Arguments setup:
Inlinee method body:
[000179] ------------ * STMT void (IL 0x020... ???)
[000178] --C-G------- \--* CALL nullcheck void C.M
[000177] ----G------- this in rcx \--* FIELD ref _c
[000167] ----G------- \--* ADDR byref
[000168] ----G------- \--* FIELD struct _s
[000169] ----G------- \--* ADDR byref
[000170] ----G------- \--* FIELD struct _s
[000171] ----G------- \--* ADDR byref
[000172] ----G------- \--* FIELD struct _s
[000173] ----G------- \--* ADDR byref
[000174] ----G------- \--* FIELD struct _s
[000175] L----------- \--* ADDR byref
[000176] ------------ \--* LCL_VAR struct V00 loc0
fgInlineAppendStatements: no gc ref inline locals.
Successfully inlined S1:M():this (12 IL bytes) (depth 5) [below ALWAYS_INLINE size]
--------------------------------------------------------------------------------------------
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for 'Program:ViaStruct5()' calling 'S1:M():this'
INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size'
*************** After fgInline()
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i newobj
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
***** BB01, stmt 1
[000007] ------------ * STMT void (IL 0x000...0x027)
[000004] ------------ | /--* ALLOCOBJ ref
[000003] ------------ | | \--* CNS_INT(h) long 0x7ffc12345508 method
[000006] -A---------- \--* ASG ref
[000005] D------N---- \--* LCL_VAR ref V02 tmp1
***** BB01, stmt 2
[000064] ------------ * STMT void (IL 0x007... ???)
[000011] ------------ | /--* LCL_VAR ref V02 tmp1
[000063] -A---------- \--* ASG ref
[000062] -------N---- \--* FIELD ref _c
[000060] L----------- \--* ADDR byref
[000061] ------------ \--* LCL_VAR struct V03 tmp2
***** BB01, stmt 3
[000078] ------------ * STMT void (IL 0x00C... ???)
[000022] x----------- | /--* OBJ(8) struct
[000021] L----------- | | \--* ADDR byref
[000017] ------------ | | \--* LCL_VAR struct V03 tmp2
[000077] -A------R--- \--* ASG struct (copy)
[000075] D----------- \--* LCL_VAR struct V07 tmp6
***** BB01, stmt 4
[000074] ------------ * STMT void (IL 0x00C... ???)
[000069] ------------ | /--* LCL_VAR struct V07 tmp6
[000073] -A------R--- \--* ASG struct (copy)
[000072] ------------ \--* OBJ(8) struct
[000071] ------------ \--* ADDR byref
[000070] ------------ \--* FIELD struct _s
[000067] L----------- \--* ADDR byref
[000068] ------------ \--* LCL_VAR struct V04 tmp3
***** BB01, stmt 5
[000092] ------------ * STMT void (IL 0x011... ???)
[000030] x----------- | /--* OBJ(8) struct
[000029] L----------- | | \--* ADDR byref
[000025] ------------ | | \--* LCL_VAR struct V04 tmp3
[000091] -A------R--- \--* ASG struct (copy)
[000089] D----------- \--* LCL_VAR struct V08 tmp7
***** BB01, stmt 6
[000088] ------------ * STMT void (IL 0x011... ???)
[000083] ------------ | /--* LCL_VAR struct V08 tmp7
[000087] -A------R--- \--* ASG struct (copy)
[000086] ------------ \--* OBJ(8) struct
[000085] ------------ \--* ADDR byref
[000084] ------------ \--* FIELD struct _s
[000081] L----------- \--* ADDR byref
[000082] ------------ \--* LCL_VAR struct V05 tmp4
***** BB01, stmt 7
[000106] ------------ * STMT void (IL 0x016... ???)
[000038] x----------- | /--* OBJ(8) struct
[000037] L----------- | | \--* ADDR byref
[000033] ------------ | | \--* LCL_VAR struct V05 tmp4
[000105] -A------R--- \--* ASG struct (copy)
[000103] D----------- \--* LCL_VAR struct V09 tmp8
***** BB01, stmt 8
[000102] ------------ * STMT void (IL 0x016... ???)
[000097] ------------ | /--* LCL_VAR struct V09 tmp8
[000101] -A------R--- \--* ASG struct (copy)
[000100] ------------ \--* OBJ(8) struct
[000099] ------------ \--* ADDR byref
[000098] ------------ \--* FIELD struct _s
[000095] L----------- \--* ADDR byref
[000096] ------------ \--* LCL_VAR struct V06 tmp5
***** BB01, stmt 9
[000120] ------------ * STMT void (IL 0x01B... ???)
[000044] x----------- | /--* OBJ(8) struct
[000043] L----------- | | \--* ADDR byref
[000041] ------------ | | \--* LCL_VAR struct V06 tmp5
[000119] -A------R--- \--* ASG struct (copy)
[000117] D----------- \--* LCL_VAR struct V10 tmp9
***** BB01, stmt 10
[000116] ------------ * STMT void (IL 0x01B... ???)
[000111] ------------ | /--* LCL_VAR struct V10 tmp9
[000115] -A------R--- \--* ASG struct (copy)
[000114] ------------ \--* OBJ(8) struct
[000113] ------------ \--* ADDR byref
[000112] ------------ \--* FIELD struct _s
[000109] L----------- \--* ADDR byref
[000110] ------------ \--* LCL_VAR struct V00 loc0
***** BB01, stmt 11
[000179] ------------ * STMT void (IL 0x020... ???)
[000178] --C-G------- \--* CALL nullcheck void C.M
[000177] ----G------- this in rcx \--* FIELD ref _c
[000167] ----G------- \--* ADDR byref
[000168] ----G------- \--* FIELD struct _s
[000169] ----G------- \--* ADDR byref
[000170] ----G------- \--* FIELD struct _s
[000171] ----G------- \--* ADDR byref
[000172] ----G------- \--* FIELD struct _s
[000173] ----G------- \--* ADDR byref
[000174] ----G------- \--* FIELD struct _s
[000175] L----------- \--* ADDR byref
[000176] ------------ \--* LCL_VAR struct V00 loc0
***** BB01, stmt 12
[000052] ------------ * STMT void (IL 0x027... ???)
[000051] ------------ \--* RETURN void
-------------------------------------------------------------------------------------------------------------------
*************** Exception Handling table is empty
**************** Inline Tree
Inlines into 06000007 Program:ViaStruct5()
[1 IL=0002 TR=000009 0600000F] [below ALWAYS_INLINE size] C:.ctor():this
[2 IL=0001 TR=000054 06000198] [below ALWAYS_INLINE size] Object:.ctor():this
[3 IL=0007 TR=000014 06000010] [below ALWAYS_INLINE size] S1:.ctor(ref):this
[4 IL=0012 TR=000020 06000012] [below ALWAYS_INLINE size] S2:.ctor(struct):this
[5 IL=0017 TR=000028 06000014] [below ALWAYS_INLINE size] S3:.ctor(struct):this
[6 IL=0022 TR=000036 06000016] [below ALWAYS_INLINE size] S4:.ctor(struct):this
[7 IL=0027 TR=000042 06000018] [below ALWAYS_INLINE size] S5:.ctor(struct):this
[8 IL=0034 TR=000049 06000019] [below ALWAYS_INLINE size] S5:M():this
[9 IL=0006 TR=000127 06000017] [below ALWAYS_INLINE size] S4:M():this
[10 IL=0006 TR=000137 06000015] [below ALWAYS_INLINE size] S3:M():this
[11 IL=0006 TR=000149 06000013] [below ALWAYS_INLINE size] S2:M():this
[12 IL=0006 TR=000163 06000011] [below ALWAYS_INLINE size] S1:M():this
[0 IL=0006 TR=000178 0600000E] [FAILED: noinline per IL/cached result] C:M():this
Budget: initialTime=180, finalTime=228, initialBudget=1800, currentBudget=1800
Budget: initialSize=1043, finalSize=1043
*************** After fgAddInternal()
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i newobj
--------------------------------------------------------------------------------------------------------------------------------------
*************** Exception Handling table is empty
*************** In fgDebugCheckBBlist
*************** In fgRemoveEmptyTry()
No EH in this method, nothing to remove.
*************** In fgRemoveEmptyFinally()
No EH in this method, nothing to remove.
*************** In fgMergeFinallyChains()
No EH in this method, nothing to merge.
*************** In fgCloneFinally()
No EH in this method, no cloning.
*************** In fgMarkImplicitByRefs()
*************** In fgPromoteStructs()
lvaTable before fgPromoteStructs
; Initial local variable assignments
;
; V00 loc0 struct ( 8) ld-addr-op
; V01 OutArgs lclBlk (na)
; V02 tmp1 ref class-hnd exact
; V03 tmp2 struct ( 8)
; V04 tmp3 struct ( 8)
; V05 tmp4 struct ( 8)
; V06 tmp5 struct ( 8)
; V07 tmp6 struct ( 8)
; V08 tmp7 struct ( 8)
; V09 tmp8 struct ( 8)
; V10 tmp9 struct ( 8)
Promoting struct local V03 (S1):
lvaGrabTemp returning 11 (V11 tmp10) (a long lifetime temp) called for field V03._c (fldOffset=0x0).
Promoting struct local V04 (S2):
lvaGrabTemp returning 12 (V12 tmp11) (a long lifetime temp) called for field V04._s (fldOffset=0x0).
Promoting struct local V07 (S1):
lvaGrabTemp returning 13 (V13 tmp12) (a long lifetime temp) called for field V07._c (fldOffset=0x0).
Promoting struct local V08 (S2):
lvaGrabTemp returning 14 (V14 tmp13) (a long lifetime temp) called for field V08._s (fldOffset=0x0).
lvaTable after fgPromoteStructs
; Initial local variable assignments
;
; V00 loc0 struct ( 8) ld-addr-op
; V01 OutArgs lclBlk (na)
; V02 tmp1 ref class-hnd exact
; V03 tmp2 struct ( 8)
; V04 tmp3 struct ( 8)
; V05 tmp4 struct ( 8)
; V06 tmp5 struct ( 8)
; V07 tmp6 struct ( 8)
; V08 tmp7 struct ( 8)
; V09 tmp8 struct ( 8)
; V10 tmp9 struct ( 8)
; V11 tmp10 ref V03._c(offs=0x00) P-INDEP
; V12 tmp11 ref V04._s(offs=0x00) P-INDEP
; V13 tmp12 ref V07._c(offs=0x00) P-INDEP
; V14 tmp13 ref V08._s(offs=0x00) P-INDEP
*************** In fgMarkAddressExposedLocals()
Replacing the field in promoted struct with a local var:
[000011] ------------ /--* LCL_VAR ref V02 tmp1
[000063] -A---------- * ASG ref
[000062] D------N---- \--* LCL_VAR ref V11 tmp10
Replacing the field in promoted struct with a local var:
[000069] ------------ /--* LCL_VAR struct(P) V07 tmp6
/--* ref V07._c (offs=0x00) -> V13 tmp12
[000073] -A------R--- * ASG struct (copy)
[000072] ------------ \--* OBJ(8) struct
[000071] ------------ \--* ADDR byref
[000070] ------------ \--* LCL_VAR ref V12 tmp11
*************** In fgRetypeImplicitByRefArgs()
*************** In fgMorphBlocks()
Morphing BB01 of 'Program:ViaStruct5()'
fgMorphTree BB01, stmt 1 (before)
[000004] ------------ /--* ALLOCOBJ ref
[000003] ------------ | \--* CNS_INT(h) long 0x7ffc12345508 method
[000006] -A---------- * ASG ref
[000005] D------N---- \--* LCL_VAR ref V02 tmp1
fgMorphTree BB01, stmt 2 (before)
[000011] ------------ /--* LCL_VAR ref V02 tmp1
[000063] -A---------- * ASG ref
[000062] D------N---- \--* LCL_VAR ref V11 tmp10
GenTreeNode creates assertion:
[000063] -A---------- * ASG ref
In BB01 New Local Copy Assertion: V11 == V02 index=#01, mask=0000000000000001
fgMorphTree BB01, stmt 3 (before)
[000022] x----------- /--* OBJ(8) struct
[000021] L----------- | \--* ADDR byref
[000017] ------------ | \--* LCL_VAR struct(P) V03 tmp2
| \--* ref V03._c (offs=0x00) -> V11 tmp10
[000077] -A------R--- * ASG struct (copy)
[000075] D----------- \--* LCL_VAR struct(P) V07 tmp6
\--* ref V07._c (offs=0x00) -> V13 tmp12
The assignment [000022] using V11 removes: Copy Assertion: V11 == V02
fgMorphCopyBlock:block assignment to morph:
[000022] x----+------ /--* OBJ(8) struct
[000021] L----+------ | \--* ADDR byref
[000017] -----+-N---- | \--* LCL_VAR struct(P) V03 tmp2
| \--* ref V03._c (offs=0x00) -> V11 tmp10
[000077] -A------R--- * ASG struct (copy)
[000075] D----+-N---- \--* LCL_VAR struct(P) V07 tmp6
\--* ref V07._c (offs=0x00) -> V13 tmp12
(destDoFldAsg=true) (srcDoFldAsg=true) using field by field assignments.
GenTreeNode creates assertion:
[000183] -A---------- * ASG ref
In BB01 New Local Copy Assertion: V13 == V11 index=#01, mask=0000000000000001
fgMorphCopyBlock (after):
[000182] -------N---- /--* LCL_VAR ref V11 tmp10
[000183] -A---+------ * ASG ref
[000181] D------N---- \--* LCL_VAR ref V13 tmp12
The assignment [000183] using V13 removes: Copy Assertion: V13 == V11
GenTreeNode creates assertion:
[000183] -A---+------ * ASG ref
In BB01 New Local Copy Assertion: V13 == V11 index=#01, mask=0000000000000001
fgMorphTree BB01, stmt 3 (after)
[000182] -------N---- /--* LCL_VAR ref V11 tmp10
[000183] -A---+------ * ASG ref
[000181] D------N---- \--* LCL_VAR ref V13 tmp12
fgMorphTree BB01, stmt 4 (before)
[000069] ------------ /--* LCL_VAR struct(P) V07 tmp6
/--* ref V07._c (offs=0x00) -> V13 tmp12
[000073] -A------R--- * ASG struct (copy)
[000072] ------------ \--* OBJ(8) struct
[000071] ------------ \--* ADDR byref
[000070] ------------ \--* LCL_VAR ref V12 tmp11
fgMorphCopyBlock:block assignment to morph:
[000069] -----+------ /--* LCL_VAR struct(P) V07 tmp6
/--* ref V07._c (offs=0x00) -> V13 tmp12
[000073] -A------R--- * ASG struct (copy)
[000072] x----+------ \--* OBJ(8) struct
[000071] -----+------ \--* ADDR byref
[000070] D----+-N---- \--* LCL_VAR ref V12 tmp11
(srcDoFldAsg=true) using field by field assignments.
GenTreeNode creates assertion:
[000186] -A---------- * ASG ref
In BB01 New Local Copy Assertion: V12 == V13 index=#02, mask=0000000000000002
fgMorphCopyBlock (after):
[000185] -------N---- /--* LCL_VAR ref V13 tmp12
[000186] -A---+------ * ASG ref
[000184] D------N---- \--* LCL_VAR ref V12 tmp11
The assignment [000186] using V12 removes: Copy Assertion: V12 == V13
GenTreeNode creates assertion:
[000186] -A---+------ * ASG ref
In BB01 New Local Copy Assertion: V12 == V13 index=#02, mask=0000000000000002
fgMorphTree BB01, stmt 4 (after)
[000185] -------N---- /--* LCL_VAR ref V13 tmp12
[000186] -A---+------ * ASG ref
[000184] D------N---- \--* LCL_VAR ref V12 tmp11
fgMorphTree BB01, stmt 5 (before)
[000030] x----------- /--* OBJ(8) struct
[000029] L----------- | \--* ADDR byref
[000025] ------------ | \--* LCL_VAR struct(P) V04 tmp3
| \--* ref V04._s (offs=0x00) -> V12 tmp11
[000091] -A------R--- * ASG struct (copy)
[000089] D----------- \--* LCL_VAR struct(P) V08 tmp7
\--* ref V08._s (offs=0x00) -> V14 tmp13
The assignment [000030] using V12 removes: Copy Assertion: V12 == V13
fgMorphCopyBlock:block assignment to morph:
[000030] x----+------ /--* OBJ(8) struct
[000029] L----+------ | \--* ADDR byref
[000025] -----+-N---- | \--* LCL_VAR struct(P) V04 tmp3
| \--* ref V04._s (offs=0x00) -> V12 tmp11
[000091] -A------R--- * ASG struct (copy)
[000089] D----+-N---- \--* LCL_VAR struct(P) V08 tmp7
\--* ref V08._s (offs=0x00) -> V14 tmp13
(destDoFldAsg=true) (srcDoFldAsg=true) using field by field assignments.
GenTreeNode creates assertion:
[000189] -A---------- * ASG ref
In BB01 New Local Copy Assertion: V14 == V12 index=#02, mask=0000000000000002
fgMorphCopyBlock (after):
[000188] -------N---- /--* LCL_VAR ref V12 tmp11
[000189] -A---+------ * ASG ref
[000187] D------N---- \--* LCL_VAR ref V14 tmp13
The assignment [000189] using V14 removes: Copy Assertion: V14 == V12
GenTreeNode creates assertion:
[000189] -A---+------ * ASG ref
In BB01 New Local Copy Assertion: V14 == V12 index=#02, mask=0000000000000002
fgMorphTree BB01, stmt 5 (after)
[000188] -------N---- /--* LCL_VAR ref V12 tmp11
[000189] -A---+------ * ASG ref
[000187] D------N---- \--* LCL_VAR ref V14 tmp13
fgMorphTree BB01, stmt 6 (before)
[000083] ------------ /--* LCL_VAR struct(P) V08 tmp7
/--* ref V08._s (offs=0x00) -> V14 tmp13
[000087] -A------R--- * ASG struct (copy)
[000086] ------------ \--* OBJ(8) struct
[000085] ------------ \--* ADDR byref
[000084] ------------ \--* FIELD struct _s
[000081] L----------- \--* ADDR byref
[000082] ------------ \--* LCL_VAR struct V05 tmp4
Local V05 should not be enregistered because: was accessed as a local field
fgMorphCopyBlock:block assignment to morph:
[000083] -----+------ /--* LCL_VAR struct(P) V08 tmp7
/--* ref V08._s (offs=0x00) -> V14 tmp13
[000087] -A--G---R--- * ASG struct (copy)
[000086] *---G+------ \--* OBJ(8) struct
[000085] -----+------ \--* ADDR byref
[000082] D----+-N---- \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s]
(srcDoFldAsg=true) using field by field assignments.
Local V05 should not be enregistered because: written in a block op
fgMorphCopyBlock (after):
[000195] -------N---- /--* LCL_VAR ref V14 tmp13
[000196] -A---+------ * ASG ref
[000194] *------N---- \--* IND ref
[000192] ------------ | /--* CNS_INT long 0 Fseq[_s]
[000193] ------------ \--* ADD byref
[000190] ------------ \--* ADDR byref
[000191] D------N---- \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s]
fgMorphTree BB01, stmt 6 (after)
[000195] -------N---- /--* LCL_VAR ref V14 tmp13
[000196] -A---+------ * ASG ref
[000194] *------N---- \--* IND ref
[000192] ------------ | /--* CNS_INT long 0 Fseq[_s]
[000193] ------------ \--* ADD byref
[000190] ------------ \--* ADDR byref
[000191] D------N---- \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s]
fgMorphTree BB01, stmt 7 (before)
[000038] x----------- /--* OBJ(8) struct
[000037] L----------- | \--* ADDR byref
[000033] ------------ | \--* LCL_VAR struct V05 tmp4
[000105] -A------R--- * ASG struct (copy)
[000103] D----------- \--* LCL_VAR struct V09 tmp8
fgMorphCopyBlock:
Local V09 should not be enregistered because: was accessed as a local field
Local V05 should not be enregistered because: it is address exposed
fgMorphOneAsgBlock (after):
[000038] x----+------ /--* IND ref
[000037] L----+------ | \--* ADDR byref
[000033] -----+-N---- | \--* LCL_VAR struct(AX) V05 tmp4
[000105] -A---------- * ASG ref
[000198] x------N---- \--* IND ref
[000197] L----------- \--* ADDR byref
[000103] D----+-N---- \--* LCL_VAR struct V09 tmp8
using oneAsgTree.
fgMorphCopyBlock (after):
[000038] x----+------ /--* IND ref
[000037] L----+------ | \--* ADDR byref
[000033] -----+-N---- | \--* LCL_VAR struct(AX) V05 tmp4
[000105] -A---------- * ASG ref
[000198] x------N---- \--* IND ref
[000197] L----------- \--* ADDR byref
[000103] D----+-N---- \--* LCL_VAR struct V09 tmp8
fgMorphTree BB01, stmt 7 (after)
[000038] x----+------ /--* IND ref
[000037] L----+------ | \--* ADDR byref
[000033] -----+-N---- | \--* LCL_VAR struct(AX) V05 tmp4
[000105] -A---+------ * ASG ref
[000198] x------N---- \--* IND ref
[000197] L----------- \--* ADDR byref
[000103] D----+-N---- \--* LCL_VAR struct V09 tmp8
fgMorphTree BB01, stmt 8 (before)
[000097] ------------ /--* LCL_VAR struct V09 tmp8
[000101] -A------R--- * ASG struct (copy)
[000100] ------------ \--* OBJ(8) struct
[000099] ------------ \--* ADDR byref
[000098] ------------ \--* FIELD struct _s
[000095] L----------- \--* ADDR byref
[000096] ------------ \--* LCL_VAR struct V06 tmp5
Local V06 should not be enregistered because: was accessed as a local field
fgMorphCopyBlock:
Local V09 should not be enregistered because: it is address exposed
fgMorphOneAsgBlock (after):
[000200] x----------- /--* IND ref
[000199] L----------- | \--* ADDR byref
[000097] -----+------ | \--* LCL_VAR struct(AX) V09 tmp8
[000101] -A--G------- * ASG ref
[000100] *---G+-N---- \--* IND ref
[000099] -----+------ \--* ADDR byref
[000096] D----+-N---- \--* LCL_FLD struct V06 tmp5 [+0] Fseq[_s]
using oneAsgTree.
fgMorphCopyBlock (after):
[000200] x----------- /--* IND ref
[000199] L----------- | \--* ADDR byref
[000097] -----+------ | \--* LCL_VAR struct(AX) V09 tmp8
[000101] -A--G------- * ASG ref
[000100] *---G+-N---- \--* IND ref
[000099] -----+------ \--* ADDR byref
[000096] D----+-N---- \--* LCL_FLD struct V06 tmp5 [+0] Fseq[_s]
fgMorphTree BB01, stmt 8 (after)
[000200] x----------- /--* IND ref
[000199] L----------- | \--* ADDR byref
[000097] -----+------ | \--* LCL_VAR struct(AX) V09 tmp8
[000101] -A--G+------ * ASG ref
[000100] *---G+-N---- \--* IND ref
[000099] -----+------ \--* ADDR byref
[000096] D----+-N---- \--* LCL_FLD struct V06 tmp5 [+0] Fseq[_s]
fgMorphTree BB01, stmt 9 (before)
[000044] x----------- /--* OBJ(8) struct
[000043] L----------- | \--* ADDR byref
[000041] ------------ | \--* LCL_VAR struct V06 tmp5
[000119] -A------R--- * ASG struct (copy)
[000117] D----------- \--* LCL_VAR struct V10 tmp9
fgMorphCopyBlock:
Local V10 should not be enregistered because: was accessed as a local field
Local V06 should not be enregistered because: it is address exposed
fgMorphOneAsgBlock (after):
[000044] x----+------ /--* IND ref
[000043] L----+------ | \--* ADDR byref
[000041] -----+-N---- | \--* LCL_VAR struct(AX) V06 tmp5
[000119] -A---------- * ASG ref
[000202] x------N---- \--* IND ref
[000201] L----------- \--* ADDR byref
[000117] D----+-N---- \--* LCL_VAR struct V10 tmp9
using oneAsgTree.
fgMorphCopyBlock (after):
[000044] x----+------ /--* IND ref
[000043] L----+------ | \--* ADDR byref
[000041] -----+-N---- | \--* LCL_VAR struct(AX) V06 tmp5
[000119] -A---------- * ASG ref
[000202] x------N---- \--* IND ref
[000201] L----------- \--* ADDR byref
[000117] D----+-N---- \--* LCL_VAR struct V10 tmp9
fgMorphTree BB01, stmt 9 (after)
[000044] x----+------ /--* IND ref
[000043] L----+------ | \--* ADDR byref
[000041] -----+-N---- | \--* LCL_VAR struct(AX) V06 tmp5
[000119] -A---+------ * ASG ref
[000202] x------N---- \--* IND ref
[000201] L----------- \--* ADDR byref
[000117] D----+-N---- \--* LCL_VAR struct V10 tmp9
fgMorphTree BB01, stmt 10 (before)
[000111] ------------ /--* LCL_VAR struct V10 tmp9
[000115] -A------R--- * ASG struct (copy)
[000114] ------------ \--* OBJ(8) struct
[000113] ------------ \--* ADDR byref
[000112] ------------ \--* FIELD struct _s
[000109] L----------- \--* ADDR byref
[000110] ------------ \--* LCL_VAR struct V00 loc0
Local V00 should not be enregistered because: was accessed as a local field
fgMorphCopyBlock:
Local V10 should not be enregistered because: it is address exposed
fgMorphOneAsgBlock (after):
[000204] x----------- /--* IND ref
[000203] L----------- | \--* ADDR byref
[000111] -----+------ | \--* LCL_VAR struct(AX) V10 tmp9
[000115] -A--G------- * ASG ref
[000114] *---G+-N---- \--* IND ref
[000113] -----+------ \--* ADDR byref
[000110] D----+-N---- \--* LCL_FLD struct V00 loc0 [+0] Fseq[_s]
using oneAsgTree.
fgMorphCopyBlock (after):
[000204] x----------- /--* IND ref
[000203] L----------- | \--* ADDR byref
[000111] -----+------ | \--* LCL_VAR struct(AX) V10 tmp9
[000115] -A--G------- * ASG ref
[000114] *---G+-N---- \--* IND ref
[000113] -----+------ \--* ADDR byref
[000110] D----+-N---- \--* LCL_FLD struct V00 loc0 [+0] Fseq[_s]
fgMorphTree BB01, stmt 10 (after)
[000204] x----------- /--* IND ref
[000203] L----------- | \--* ADDR byref
[000111] -----+------ | \--* LCL_VAR struct(AX) V10 tmp9
[000115] -A--G+------ * ASG ref
[000114] *---G+-N---- \--* IND ref
[000113] -----+------ \--* ADDR byref
[000110] D----+-N---- \--* LCL_FLD struct V00 loc0 [+0] Fseq[_s]
fgMorphTree BB01, stmt 11 (before)
[000178] --C-G------- * CALL nullcheck void C.M
[000177] ----G------- this in rcx \--* FIELD ref _c
[000167] ----G------- \--* ADDR byref
[000168] ----G------- \--* FIELD struct _s
[000169] ----G------- \--* ADDR byref
[000170] ----G------- \--* FIELD struct _s
[000171] ----G------- \--* ADDR byref
[000172] ----G------- \--* FIELD struct _s
[000173] ----G------- \--* ADDR byref
[000174] ----G------- \--* FIELD struct _s
[000175] L----------- \--* ADDR byref
[000176] ------------ \--* LCL_VAR struct V00 loc0
Local V00 should not be enregistered because: was accessed as a local field
argSlots=1, preallocatedArgCount=4, nextSlotNum=4, outgoingArgSpaceSize=32
Sorting the arguments:
Deferred argument ('rcx'):
[000176] -----+------ * LCL_FLD ref V00 loc0 [+0] Fseq[_s, _s, _s, _s, _c]
Replaced with placeholder node:
[000205] ----------L- * ARGPLACE ref
Shuffled argument table: rcx
fgArgTabEntry[arg 0 176.LCL_FLD, 1 reg: rcx, align=1, lateArgInx=0, processed]
fgMorphTree BB01, stmt 11 (after)
[000178] --CXG+------ * CALL nullcheck void C.M
[000176] -----+------ this in rcx \--* LCL_FLD ref V00 loc0 [+0] Fseq[_s, _s, _s, _s, _c]
fgMorphTree BB01, stmt 12 (before)
[000051] ------------ * RETURN void
Renumbering the basic blocks for fgComputePred
*************** Before renumbering the basic blocks
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
*************** Exception Handling table is empty
*************** After renumbering the basic blocks
=============== No blocks renumbered!
New BlockSet epoch 2, # of blocks (including unused BB00): 2, bitset array size: 1 (short)
*************** In fgComputePreds()
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
*************** After fgComputePreds()
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
*************** In fgComputeEdgeWeights()
fgComputeEdgeWeights() we do not have any profile data so we are not using the edge weights
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
fgComputeEdgeWeights() was able to compute exact edge weights for all of the 0 edges, using 1 passes.
*************** In fgCreateFunclets()
After fgCreateFunclets()
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
*************** Exception Handling table is empty
*************** In fgDebugCheckBBlist
*************** In optOptimizeLayout()
*************** Exception Handling table is empty
*************** In fgDebugCheckBBlist
*************** In fgUpdateFlowGraph()
Before updating the flow graph:
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgUpdateFlowGraph()
Before updating the flow graph:
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgComputeReachability
*************** In fgDebugCheckBBlist
Renumbering the basic blocks for fgComputeReachability pass #1
*************** Before renumbering the basic blocks
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
*************** Exception Handling table is empty
*************** After renumbering the basic blocks
=============== No blocks renumbered!
Enter blocks: BB01
After computing reachability sets:
------------------------------------------------
BBnum Reachable by
------------------------------------------------
BB01 : BB01
After computing reachability:
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In fgComputeDoms
*************** In fgDebugCheckBBlist
Dominator computation start blocks (those blocks with no incoming edges):
BB01
------------------------------------------------
BBnum Dominated by
------------------------------------------------
BB01: BB01
Inside fgBuildDomTree
After computing the Dominance Tree:
*************** In Allocate Objects
Trees before Allocate Objects
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
***** BB01, stmt 1
[000007] ------------ * STMT void (IL 0x000...0x027)
[000004] -----+------ | /--* ALLOCOBJ ref
[000003] -----+------ | | \--* CNS_INT(h) long 0x7ffc12345508 method
[000006] -A---+------ \--* ASG ref
[000005] D----+-N---- \--* LCL_VAR ref V02 tmp1
***** BB01, stmt 2
[000064] ------------ * STMT void (IL 0x007... ???)
[000011] -----+------ | /--* LCL_VAR ref V02 tmp1
[000063] -A---+------ \--* ASG ref
[000062] D----+-N---- \--* LCL_VAR ref V11 tmp10
***** BB01, stmt 3
[000078] ------------ * STMT void (IL 0x00C... ???)
[000182] -------N---- | /--* LCL_VAR ref V11 tmp10
[000183] -A---+------ \--* ASG ref
[000181] D------N---- \--* LCL_VAR ref V13 tmp12
***** BB01, stmt 4
[000074] ------------ * STMT void (IL 0x00C... ???)
[000185] -------N---- | /--* LCL_VAR ref V13 tmp12
[000186] -A---+------ \--* ASG ref
[000184] D------N---- \--* LCL_VAR ref V12 tmp11
***** BB01, stmt 5
[000092] ------------ * STMT void (IL 0x011... ???)
[000188] -------N---- | /--* LCL_VAR ref V12 tmp11
[000189] -A---+------ \--* ASG ref
[000187] D------N---- \--* LCL_VAR ref V14 tmp13
***** BB01, stmt 6
[000088] ------------ * STMT void (IL 0x011... ???)
[000195] -------N---- | /--* LCL_VAR ref V14 tmp13
[000196] -A---+------ \--* ASG ref
[000194] *------N---- \--* IND ref
[000192] ------------ | /--* CNS_INT long 0 Fseq[_s]
[000193] ------------ \--* ADD byref
[000190] ------------ \--* ADDR byref
[000191] D------N---- \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s]
***** BB01, stmt 7
[000106] ------------ * STMT void (IL 0x016... ???)
[000038] x----+------ | /--* IND ref
[000037] L----+------ | | \--* ADDR byref
[000033] -----+-N---- | | \--* LCL_VAR struct(AX) V05 tmp4
[000105] -A---+------ \--* ASG ref
[000198] x------N---- \--* IND ref
[000197] L----------- \--* ADDR byref
[000103] D----+-N---- \--* LCL_VAR struct(AX) V09 tmp8
***** BB01, stmt 8
[000102] ------------ * STMT void (IL 0x016... ???)
[000200] x----------- | /--* IND ref
[000199] L----------- | | \--* ADDR byref
[000097] -----+------ | | \--* LCL_VAR struct(AX) V09 tmp8
[000101] -A--G+------ \--* ASG ref
[000100] *---G+-N---- \--* IND ref
[000099] -----+------ \--* ADDR byref
[000096] D----+-N---- \--* LCL_FLD struct V06 tmp5 [+0] Fseq[_s]
***** BB01, stmt 9
[000120] ------------ * STMT void (IL 0x01B... ???)
[000044] x----+------ | /--* IND ref
[000043] L----+------ | | \--* ADDR byref
[000041] -----+-N---- | | \--* LCL_VAR struct(AX) V06 tmp5
[000119] -A---+------ \--* ASG ref
[000202] x------N---- \--* IND ref
[000201] L----------- \--* ADDR byref
[000117] D----+-N---- \--* LCL_VAR struct(AX) V10 tmp9
***** BB01, stmt 10
[000116] ------------ * STMT void (IL 0x01B... ???)
[000204] x----------- | /--* IND ref
[000203] L----------- | | \--* ADDR byref
[000111] -----+------ | | \--* LCL_VAR struct(AX) V10 tmp9
[000115] -A--G+------ \--* ASG ref
[000114] *---G+-N---- \--* IND ref
[000113] -----+------ \--* ADDR byref
[000110] D----+-N---- \--* LCL_FLD struct V00 loc0 [+0] Fseq[_s]
***** BB01, stmt 11
[000179] ------------ * STMT void (IL 0x020... ???)
[000178] --CXG+------ \--* CALL nullcheck void C.M
[000176] -----+------ this in rcx \--* LCL_FLD ref V00 loc0 [+0] Fseq[_s, _s, _s, _s, _c]
***** BB01, stmt 12
[000052] ------------ * STMT void (IL 0x027... ???)
[000051] -----+------ \--* RETURN void
-------------------------------------------------------------------------------------------------------------------
argSlots=1, preallocatedArgCount=4, nextSlotNum=4, outgoingArgSpaceSize=32
Sorting the arguments:
Deferred argument ('rcx'):
[000003] -----+------ * CNS_INT(h) long 0x7ffc12345508 method
Replaced with placeholder node:
[000208] ----------L- * ARGPLACE long
Shuffled argument table: rcx
fgArgTabEntry[arg 0 3.CNS_INT, 1 reg: rcx, align=1, lateArgInx=0, processed]
*************** Exiting Allocate Objects
Trees after Allocate Objects
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
***** BB01, stmt 1
[000007] ------------ * STMT void (IL 0x000...0x027)
[000004] --C--+------ | /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST
[000003] -----+------ arg0 in rcx | | \--* CNS_INT(h) long 0x7ffc12345508 method
[000006] -AC--+------ \--* ASG ref
[000005] D----+-N---- \--* LCL_VAR ref V02 tmp1
***** BB01, stmt 2
[000064] ------------ * STMT void (IL 0x007... ???)
[000011] -----+------ | /--* LCL_VAR ref V02 tmp1
[000063] -A---+------ \--* ASG ref
[000062] D----+-N---- \--* LCL_VAR ref V11 tmp10
***** BB01, stmt 3
[000078] ------------ * STMT void (IL 0x00C... ???)
[000182] -------N---- | /--* LCL_VAR ref V11 tmp10
[000183] -A---+------ \--* ASG ref
[000181] D------N---- \--* LCL_VAR ref V13 tmp12
***** BB01, stmt 4
[000074] ------------ * STMT void (IL 0x00C... ???)
[000185] -------N---- | /--* LCL_VAR ref V13 tmp12
[000186] -A---+------ \--* ASG ref
[000184] D------N---- \--* LCL_VAR ref V12 tmp11
***** BB01, stmt 5
[000092] ------------ * STMT void (IL 0x011... ???)
[000188] -------N---- | /--* LCL_VAR ref V12 tmp11
[000189] -A---+------ \--* ASG ref
[000187] D------N---- \--* LCL_VAR ref V14 tmp13
***** BB01, stmt 6
[000088] ------------ * STMT void (IL 0x011... ???)
[000195] -------N---- | /--* LCL_VAR ref V14 tmp13
[000196] -A---+------ \--* ASG ref
[000194] *------N---- \--* IND ref
[000192] ------------ | /--* CNS_INT long 0 Fseq[_s]
[000193] ------------ \--* ADD byref
[000190] ------------ \--* ADDR byref
[000191] D------N---- \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s]
***** BB01, stmt 7
[000106] ------------ * STMT void (IL 0x016... ???)
[000038] x----+------ | /--* IND ref
[000037] L----+------ | | \--* ADDR byref
[000033] -----+-N---- | | \--* LCL_VAR struct(AX) V05 tmp4
[000105] -A---+------ \--* ASG ref
[000198] x------N---- \--* IND ref
[000197] L----------- \--* ADDR byref
[000103] D----+-N---- \--* LCL_VAR struct(AX) V09 tmp8
***** BB01, stmt 8
[000102] ------------ * STMT void (IL 0x016... ???)
[000200] x----------- | /--* IND ref
[000199] L----------- | | \--* ADDR byref
[000097] -----+------ | | \--* LCL_VAR struct(AX) V09 tmp8
[000101] -A--G+------ \--* ASG ref
[000100] *---G+-N---- \--* IND ref
[000099] -----+------ \--* ADDR byref
[000096] D----+-N---- \--* LCL_FLD struct V06 tmp5 [+0] Fseq[_s]
***** BB01, stmt 9
[000120] ------------ * STMT void (IL 0x01B... ???)
[000044] x----+------ | /--* IND ref
[000043] L----+------ | | \--* ADDR byref
[000041] -----+-N---- | | \--* LCL_VAR struct(AX) V06 tmp5
[000119] -A---+------ \--* ASG ref
[000202] x------N---- \--* IND ref
[000201] L----------- \--* ADDR byref
[000117] D----+-N---- \--* LCL_VAR struct(AX) V10 tmp9
***** BB01, stmt 10
[000116] ------------ * STMT void (IL 0x01B... ???)
[000204] x----------- | /--* IND ref
[000203] L----------- | | \--* ADDR byref
[000111] -----+------ | | \--* LCL_VAR struct(AX) V10 tmp9
[000115] -A--G+------ \--* ASG ref
[000114] *---G+-N---- \--* IND ref
[000113] -----+------ \--* ADDR byref
[000110] D----+-N---- \--* LCL_FLD struct V00 loc0 [+0] Fseq[_s]
***** BB01, stmt 11
[000179] ------------ * STMT void (IL 0x020... ???)
[000178] --CXG+------ \--* CALL nullcheck void C.M
[000176] -----+------ this in rcx \--* LCL_FLD ref V00 loc0 [+0] Fseq[_s, _s, _s, _s, _c]
***** BB01, stmt 12
[000052] ------------ * STMT void (IL 0x027... ???)
[000051] -----+------ \--* RETURN void
-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In optOptimizeLoops()
*************** In fgDebugCheckBBlist
*************** In optCloneLoops()
*************** In lvaMarkLocalVars()
*** marking local variables in block BB01 (weight=1 )
[000007] ------------ * STMT void (IL 0x000...0x027)
[000004] --C--+------ | /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST
[000003] -----+------ arg0 in rcx | | \--* CNS_INT(h) long 0x7ffc12345508 method
[000006] -AC--+------ \--* ASG ref
[000005] D----+-N---- \--* LCL_VAR ref V02 tmp1
New refCnts for V02: refCnt = 1, refCntWtd = 2
[000064] ------------ * STMT void (IL 0x007... ???)
[000011] -----+------ | /--* LCL_VAR ref V02 tmp1
[000063] -A---+------ \--* ASG ref
[000062] D----+-N---- \--* LCL_VAR ref V11 tmp10
New refCnts for V11: refCnt = 1, refCntWtd = 1
New refCnts for V02: refCnt = 2, refCntWtd = 4
[000078] ------------ * STMT void (IL 0x00C... ???)
[000182] -------N---- | /--* LCL_VAR ref V11 tmp10
[000183] -A---+------ \--* ASG ref
[000181] D------N---- \--* LCL_VAR ref V13 tmp12
New refCnts for V13: refCnt = 1, refCntWtd = 1
New refCnts for V11: refCnt = 2, refCntWtd = 2
[000074] ------------ * STMT void (IL 0x00C... ???)
[000185] -------N---- | /--* LCL_VAR ref V13 tmp12
[000186] -A---+------ \--* ASG ref
[000184] D------N---- \--* LCL_VAR ref V12 tmp11
New refCnts for V12: refCnt = 1, refCntWtd = 1
New refCnts for V13: refCnt = 2, refCntWtd = 2
[000092] ------------ * STMT void (IL 0x011... ???)
[000188] -------N---- | /--* LCL_VAR ref V12 tmp11
[000189] -A---+------ \--* ASG ref
[000187] D------N---- \--* LCL_VAR ref V14 tmp13
New refCnts for V14: refCnt = 1, refCntWtd = 1
New refCnts for V12: refCnt = 2, refCntWtd = 2
[000088] ------------ * STMT void (IL 0x011... ???)
[000195] -------N---- | /--* LCL_VAR ref V14 tmp13
[000196] -A---+------ \--* ASG ref
[000194] *------N---- \--* IND ref
[000192] ------------ | /--* CNS_INT long 0 Fseq[_s]
[000193] ------------ \--* ADD byref
[000190] ------------ \--* ADDR byref
[000191] D------N---- \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s]
New refCnts for V05: refCnt = 1, refCntWtd = 2
New refCnts for V14: refCnt = 2, refCntWtd = 2
[000106] ------------ * STMT void (IL 0x016... ???)
[000038] x----+------ | /--* IND ref
[000037] L----+------ | | \--* ADDR byref
[000033] -----+-N---- | | \--* LCL_VAR struct(AX) V05 tmp4
[000105] -A---+------ \--* ASG ref
[000198] x------N---- \--* IND ref
[000197] L----------- \--* ADDR byref
[000103] D----+-N---- \--* LCL_VAR struct(AX) V09 tmp8
New refCnts for V09: refCnt = 1, refCntWtd = 2
New refCnts for V05: refCnt = 2, refCntWtd = 4
[000102] ------------ * STMT void (IL 0x016... ???)
[000200] x----------- | /--* IND ref
[000199] L----------- | | \--* ADDR byref
[000097] -----+------ | | \--* LCL_VAR struct(AX) V09 tmp8
[000101] -A--G+------ \--* ASG ref
[000100] *---G+-N---- \--* IND ref
[000099] -----+------ \--* ADDR byref
[000096] D----+-N---- \--* LCL_FLD struct V06 tmp5 [+0] Fseq[_s]
New refCnts for V06: refCnt = 1, refCntWtd = 2
New refCnts for V09: refCnt = 2, refCntWtd = 4
[000120] ------------ * STMT void (IL 0x01B... ???)
[000044] x----+------ | /--* IND ref
[000043] L----+------ | | \--* ADDR byref
[000041] -----+-N---- | | \--* LCL_VAR struct(AX) V06 tmp5
[000119] -A---+------ \--* ASG ref
[000202] x------N---- \--* IND ref
[000201] L----------- \--* ADDR byref
[000117] D----+-N---- \--* LCL_VAR struct(AX) V10 tmp9
New refCnts for V10: refCnt = 1, refCntWtd = 2
New refCnts for V06: refCnt = 2, refCntWtd = 4
[000116] ------------ * STMT void (IL 0x01B... ???)
[000204] x----------- | /--* IND ref
[000203] L----------- | | \--* ADDR byref
[000111] -----+------ | | \--* LCL_VAR struct(AX) V10 tmp9
[000115] -A--G+------ \--* ASG ref
[000114] *---G+-N---- \--* IND ref
[000113] -----+------ \--* ADDR byref
[000110] D----+-N---- \--* LCL_FLD struct V00 loc0 [+0] Fseq[_s]
New refCnts for V00: refCnt = 1, refCntWtd = 1
New refCnts for V10: refCnt = 2, refCntWtd = 4
[000179] ------------ * STMT void (IL 0x020... ???)
[000178] --CXG+------ \--* CALL nullcheck void C.M
[000176] -----+------ this in rcx \--* LCL_FLD ref V00 loc0 [+0] Fseq[_s, _s, _s, _s, _c]
New refCnts for V00: refCnt = 2, refCntWtd = 2
[000052] ------------ * STMT void (IL 0x027... ???)
[000051] -----+------ \--* RETURN void
*************** In optAddCopies()
Local V00 should not be enregistered because: it is a struct
refCnt table for 'ViaStruct5':
V02 tmp1 [ ref]: refCnt = 2, refCntWtd = 4
V11 tmp10 [ ref]: refCnt = 2, refCntWtd = 2
V12 tmp11 [ ref]: refCnt = 2, refCntWtd = 2
V13 tmp12 [ ref]: refCnt = 2, refCntWtd = 2
V14 tmp13 [ ref]: refCnt = 2, refCntWtd = 2
V00 loc0 [struct]: refCnt = 2, refCntWtd = 2
V05 tmp4 [struct]: refCnt = 2, refCntWtd = 4
V06 tmp5 [struct]: refCnt = 2, refCntWtd = 4
V09 tmp8 [struct]: refCnt = 2, refCntWtd = 4
V10 tmp9 [struct]: refCnt = 2, refCntWtd = 4
V01 OutArgs [lclBlk]: refCnt = 1, refCntWtd = 1
*************** In optOptimizeBools()
*************** In fgDebugCheckBBlist
*************** In fgFindOperOrder()
*************** In fgSetBlockOrder()
The biggest BB has 7 tree nodes
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
***** BB01, stmt 1
( 17, 16) [000007] ------------ * STMT void (IL 0x000...0x027)
N005 ( 17, 16) [000004] --C--------- | /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST
N003 ( 3, 10) [000003] ------------ arg0 in rcx | | \--* CNS_INT(h) long 0x7ffc12345508 method
N007 ( 17, 16) [000006] -AC-----R--- \--* ASG ref
N006 ( 1, 1) [000005] D------N---- \--* LCL_VAR ref V02 tmp1
***** BB01, stmt 2
( 5, 4) [000064] ------------ * STMT void (IL 0x007... ???)
N001 ( 1, 1) [000011] ------------ | /--* LCL_VAR ref V02 tmp1
N003 ( 5, 4) [000063] -A------R--- \--* ASG ref
N002 ( 3, 2) [000062] D------N---- \--* LCL_VAR ref V11 tmp10
***** BB01, stmt 3
( 7, 5) [000078] ------------ * STMT void (IL 0x00C... ???)
N001 ( 3, 2) [000182] -------N---- | /--* LCL_VAR ref V11 tmp10
N003 ( 7, 5) [000183] -A------R--- \--* ASG ref
N002 ( 3, 2) [000181] D------N---- \--* LCL_VAR ref V13 tmp12
***** BB01, stmt 4
( 7, 5) [000074] ------------ * STMT void (IL 0x00C... ???)
N001 ( 3, 2) [000185] -------N---- | /--* LCL_VAR ref V13 tmp12
N003 ( 7, 5) [000186] -A------R--- \--* ASG ref
N002 ( 3, 2) [000184] D------N---- \--* LCL_VAR ref V12 tmp11
***** BB01, stmt 5
( 7, 5) [000092] ------------ * STMT void (IL 0x011... ???)
N001 ( 3, 2) [000188] -------N---- | /--* LCL_VAR ref V12 tmp11
N003 ( 7, 5) [000189] -A------R--- \--* ASG ref
N002 ( 3, 2) [000187] D------N---- \--* LCL_VAR ref V14 tmp13
***** BB01, stmt 6
( 10, 10) [000088] ------------ * STMT void (IL 0x011... ???)
N006 ( 3, 2) [000195] -------N---- | /--* LCL_VAR ref V14 tmp13
N007 ( 10, 10) [000196] -A---------- \--* ASG ref
N005 ( 6, 7) [000194] *------N---- \--* IND ref
N003 ( 1, 1) [000192] ------------ | /--* CNS_INT long 0 Fseq[_s]
N004 ( 5, 7) [000193] -------N---- \--* ADD byref
N002 ( 3, 5) [000190] ------------ \--* ADDR byref
N001 ( 3, 4) [000191] D------N---- \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s]
***** BB01, stmt 7
( 13, 11) [000106] ------------ * STMT void (IL 0x016... ???)
N003 ( 6, 5) [000038] x----------- | /--* IND ref
N002 ( 3, 3) [000037] L----------- | | \--* ADDR byref
N001 ( 3, 2) [000033] -------N---- | | \--* LCL_VAR struct(AX) V05 tmp4
N007 ( 13, 11) [000105] -A------R--- \--* ASG ref
N006 ( 6, 5) [000198] x------N---- \--* IND ref
N005 ( 3, 3) [000197] L----------- \--* ADDR byref
N004 ( 3, 2) [000103] D------N---- \--* LCL_VAR struct(AX) V09 tmp8
***** BB01, stmt 8
( 13, 13) [000102] ------------ * STMT void (IL 0x016... ???)
N003 ( 6, 5) [000200] x----------- | /--* IND ref
N002 ( 3, 3) [000199] L----------- | | \--* ADDR byref
N001 ( 3, 2) [000097] ------------ | | \--* LCL_VAR struct(AX) V09 tmp8
N007 ( 13, 13) [000101] -A--G---R--- \--* ASG ref
N006 ( 6, 7) [000100] *---G--N---- \--* IND ref
N005 ( 3, 5) [000099] ------------ \--* ADDR byref
N004 ( 3, 4) [000096] D------N---- \--* LCL_FLD struct V06 tmp5 [+0] Fseq[_s]
***** BB01, stmt 9
( 13, 11) [000120] ------------ * STMT void (IL 0x01B... ???)
N003 ( 6, 5) [000044] x----------- | /--* IND ref
N002 ( 3, 3) [000043] L----------- | | \--* ADDR byref
N001 ( 3, 2) [000041] -------N---- | | \--* LCL_VAR struct(AX) V06 tmp5
N007 ( 13, 11) [000119] -A------R--- \--* ASG ref
N006 ( 6, 5) [000202] x------N---- \--* IND ref
N005 ( 3, 3) [000201] L----------- \--* ADDR byref
N004 ( 3, 2) [000117] D------N---- \--* LCL_VAR struct(AX) V10 tmp9
***** BB01, stmt 10
( 13, 13) [000116] ------------ * STMT void (IL 0x01B... ???)
N003 ( 6, 5) [000204] x----------- | /--* IND ref
N002 ( 3, 3) [000203] L----------- | | \--* ADDR byref
N001 ( 3, 2) [000111] ------------ | | \--* LCL_VAR struct(AX) V10 tmp9
N007 ( 13, 13) [000115] -A--G---R--- \--* ASG ref
N006 ( 6, 7) [000114] *---G--N---- \--* IND ref
N005 ( 3, 5) [000113] ------------ \--* ADDR byref
N004 ( 3, 4) [000110] D------N---- \--* LCL_FLD struct V00 loc0 [+0] Fseq[_s]
***** BB01, stmt 11
( 17, 11) [000179] ------------ * STMT void (IL 0x020... ???)
N004 ( 17, 11) [000178] --CXG------- \--* CALL nullcheck void C.M
N002 ( 3, 4) [000176] ------------ this in rcx \--* LCL_FLD ref V00 loc0 [+0] Fseq[_s, _s, _s, _s, _c]
***** BB01, stmt 12
( 0, 0) [000052] ------------ * STMT void (IL 0x027... ???)
N001 ( 0, 0) [000051] ------------ \--* RETURN void
-------------------------------------------------------------------------------------------------------------------
*************** In SsaBuilder::Build()
[SsaBuilder] Max block count is 2.
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
*************** Exception Handling table is empty
[SsaBuilder] Topologically sorted the graph.
[SsaBuilder::ComputeImmediateDom]
*************** In SsaBuilder::ComputeDominators(BasicBlock** postOrder, int count, ...)
*************** In SsaBuilder::InsertPhiFunctions()
*************** In fgLocalVarLiveness()
*************** In fgPerBlockLocalVarLiveness()
BB01 USE(0)={ } + ByrefExposed + GcHeap
DEF(6)={V02 V11 V12 V13 V14 V00} + ByrefExposed* + GcHeap*
** Memory liveness computed, GcHeap states and ByrefExposed states diverge
*************** In fgInterBlockLocalVarLiveness()
BB liveness after fgLiveVarAnalysis():
BB01 IN (0)={} + ByrefExposed + GcHeap
OUT(0)={}
Inserting phi functions:
*************** In SsaBuilder::RenameVariables()
After fgSsaBuild:
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
***** BB01, stmt 1
( 17, 16) [000007] ------------ * STMT void (IL 0x000...0x027)
N005 ( 17, 16) [000004] --C--------- | /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST
N003 ( 3, 10) [000003] ------------ arg0 in rcx | | \--* CNS_INT(h) long 0x7ffc12345508 method
N007 ( 17, 16) [000006] -AC-----R--- \--* ASG ref
N006 ( 1, 1) [000005] D------N---- \--* LCL_VAR ref V02 tmp1 d:3
***** BB01, stmt 2
( 5, 4) [000064] ------------ * STMT void (IL 0x007... ???)
N001 ( 1, 1) [000011] ------------ | /--* LCL_VAR ref V02 tmp1 u:3 (last use)
N003 ( 5, 4) [000063] -A------R--- \--* ASG ref
N002 ( 3, 2) [000062] D------N---- \--* LCL_VAR ref V11 tmp10 d:3
***** BB01, stmt 3
( 7, 5) [000078] ------------ * STMT void (IL 0x00C... ???)
N001 ( 3, 2) [000182] -------N---- | /--* LCL_VAR ref V11 tmp10 u:3 (last use)
N003 ( 7, 5) [000183] -A------R--- \--* ASG ref
N002 ( 3, 2) [000181] D------N---- \--* LCL_VAR ref V13 tmp12 d:3
***** BB01, stmt 4
( 7, 5) [000074] ------------ * STMT void (IL 0x00C... ???)
N001 ( 3, 2) [000185] -------N---- | /--* LCL_VAR ref V13 tmp12 u:3 (last use)
N003 ( 7, 5) [000186] -A------R--- \--* ASG ref
N002 ( 3, 2) [000184] D------N---- \--* LCL_VAR ref V12 tmp11 d:3
***** BB01, stmt 5
( 7, 5) [000092] ------------ * STMT void (IL 0x011... ???)
N001 ( 3, 2) [000188] -------N---- | /--* LCL_VAR ref V12 tmp11 u:3 (last use)
N003 ( 7, 5) [000189] -A------R--- \--* ASG ref
N002 ( 3, 2) [000187] D------N---- \--* LCL_VAR ref V14 tmp13 d:3
***** BB01, stmt 6
( 10, 10) [000088] ------------ * STMT void (IL 0x011... ???)
N006 ( 3, 2) [000195] -------N---- | /--* LCL_VAR ref V14 tmp13 u:3 (last use)
N007 ( 10, 10) [000196] -A---------- \--* ASG ref
N005 ( 6, 7) [000194] *------N---- \--* IND ref
N003 ( 1, 1) [000192] ------------ | /--* CNS_INT long 0 Fseq[_s]
N004 ( 5, 7) [000193] -------N---- \--* ADD byref
N002 ( 3, 5) [000190] ------------ \--* ADDR byref
N001 ( 3, 4) [000191] D------N---- \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s]
***** BB01, stmt 7
( 13, 11) [000106] ------------ * STMT void (IL 0x016... ???)
N003 ( 6, 5) [000038] x----------- | /--* IND ref
N002 ( 3, 3) [000037] L----------- | | \--* ADDR byref
N001 ( 3, 2) [000033] -------N---- | | \--* LCL_VAR struct(AX) V05 tmp4
N007 ( 13, 11) [000105] -A------R--- \--* ASG ref
N006 ( 6, 5) [000198] x------N---- \--* IND ref
N005 ( 3, 3) [000197] L----------- \--* ADDR byref
N004 ( 3, 2) [000103] D------N---- \--* LCL_VAR struct(AX) V09 tmp8
***** BB01, stmt 8
( 13, 13) [000102] ------------ * STMT void (IL 0x016... ???)
N003 ( 6, 5) [000200] x----------- | /--* IND ref
N002 ( 3, 3) [000199] L----------- | | \--* ADDR byref
N001 ( 3, 2) [000097] ------------ | | \--* LCL_VAR struct(AX) V09 tmp8
N007 ( 13, 13) [000101] -A--G---R--- \--* ASG ref
N006 ( 6, 7) [000100] *---G--N---- \--* IND ref
N005 ( 3, 5) [000099] ------------ \--* ADDR byref
N004 ( 3, 4) [000096] D------N---- \--* LCL_FLD struct V06 tmp5 [+0] Fseq[_s]
***** BB01, stmt 9
( 13, 11) [000120] ------------ * STMT void (IL 0x01B... ???)
N003 ( 6, 5) [000044] x----------- | /--* IND ref
N002 ( 3, 3) [000043] L----------- | | \--* ADDR byref
N001 ( 3, 2) [000041] -------N---- | | \--* LCL_VAR struct(AX) V06 tmp5
N007 ( 13, 11) [000119] -A------R--- \--* ASG ref
N006 ( 6, 5) [000202] x------N---- \--* IND ref
N005 ( 3, 3) [000201] L----------- \--* ADDR byref
N004 ( 3, 2) [000117] D------N---- \--* LCL_VAR struct(AX) V10 tmp9
***** BB01, stmt 10
( 13, 13) [000116] ------------ * STMT void (IL 0x01B... ???)
N003 ( 6, 5) [000204] x----------- | /--* IND ref
N002 ( 3, 3) [000203] L----------- | | \--* ADDR byref
N001 ( 3, 2) [000111] ------------ | | \--* LCL_VAR struct(AX) V10 tmp9
N007 ( 13, 13) [000115] -A--G---R--- \--* ASG ref
N006 ( 6, 7) [000114] *---G--N---- \--* IND ref
N005 ( 3, 5) [000113] ------------ \--* ADDR byref
N004 ( 3, 4) [000110] D------N---- \--* LCL_FLD struct V00 loc0 d:3[+0] Fseq[_s]
***** BB01, stmt 11
( 17, 11) [000179] ------------ * STMT void (IL 0x020... ???)
N004 ( 17, 11) [000178] --CXG------- \--* CALL nullcheck void C.M
N002 ( 3, 4) [000176] ------------ this in rcx \--* LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use)
***** BB01, stmt 12
( 0, 0) [000052] ------------ * STMT void (IL 0x027... ???)
N001 ( 0, 0) [000051] ------------ \--* RETURN void
-------------------------------------------------------------------------------------------------------------------
*************** In optEarlyProp()
*************** In fgValueNumber()
Memory Initial Value in BB01 is: $c0
The SSA definition for ByrefExposed (#2) at start of BB01 is $c0 {InitVal($80)}
The SSA definition for GcHeap (#2) at start of BB01 is $c0 {InitVal($80)}
***** BB01, stmt 1 (before)
N005 ( 17, 16) [000004] --C--------- /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST
N003 ( 3, 10) [000003] ------------ arg0 in rcx | \--* CNS_INT(h) long 0x7ffc12345508 method
N007 ( 17, 16) [000006] -AC-----R--- * ASG ref
N006 ( 1, 1) [000005] D------N---- \--* LCL_VAR ref V02 tmp1 d:3
N001 [000208] ARGPLACE => $100 {100}
N002 [000207] LIST => $140 {LIST($100, $0)}
N003 [000003] CNS_INT(h) 0x7ffc12345508 method => $180 {Hnd const: 0x00007FFC12345508}
N004 [000209] LIST => $141 {LIST($180, $0)}
VN of ARGPLACE tree [000208] updated to $180 {Hnd const: 0x00007FFC12345508}
N002 [000207] LIST => $141 {LIST($180, $0)}
N005 [000004] CALL help => $200 {JitNew($180, $1c0)}
N006 [000005] LCL_VAR V02 tmp1 d:3 => $200 {JitNew($180, $1c0)}
N007 [000006] ASG => $200 {JitNew($180, $1c0)}
***** BB01, stmt 1 (after)
N005 ( 17, 16) [000004] --C--------- /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
N003 ( 3, 10) [000003] ------------ arg0 in rcx | \--* CNS_INT(h) long 0x7ffc12345508 method $180
N007 ( 17, 16) [000006] -AC-----R--- * ASG ref $200
N006 ( 1, 1) [000005] D------N---- \--* LCL_VAR ref V02 tmp1 d:3 $200
---------
***** BB01, stmt 2 (before)
N001 ( 1, 1) [000011] ------------ /--* LCL_VAR ref V02 tmp1 u:3 (last use)
N003 ( 5, 4) [000063] -A------R--- * ASG ref
N002 ( 3, 2) [000062] D------N---- \--* LCL_VAR ref V11 tmp10 d:3
N001 [000011] LCL_VAR V02 tmp1 u:3 (last use) => $200 {JitNew($180, $1c0)}
N002 [000062] LCL_VAR V11 tmp10 d:3 => $200 {JitNew($180, $1c0)}
N003 [000063] ASG => $200 {JitNew($180, $1c0)}
***** BB01, stmt 2 (after)
N001 ( 1, 1) [000011] ------------ /--* LCL_VAR ref V02 tmp1 u:3 (last use) $200
N003 ( 5, 4) [000063] -A------R--- * ASG ref $200
N002 ( 3, 2) [000062] D------N---- \--* LCL_VAR ref V11 tmp10 d:3 $200
---------
***** BB01, stmt 3 (before)
N001 ( 3, 2) [000182] -------N---- /--* LCL_VAR ref V11 tmp10 u:3 (last use)
N003 ( 7, 5) [000183] -A------R--- * ASG ref
N002 ( 3, 2) [000181] D------N---- \--* LCL_VAR ref V13 tmp12 d:3
N001 [000182] LCL_VAR V11 tmp10 u:3 (last use) => $200 {JitNew($180, $1c0)}
N002 [000181] LCL_VAR V13 tmp12 d:3 => $200 {JitNew($180, $1c0)}
N003 [000183] ASG => $200 {JitNew($180, $1c0)}
***** BB01, stmt 3 (after)
N001 ( 3, 2) [000182] -------N---- /--* LCL_VAR ref V11 tmp10 u:3 (last use) $200
N003 ( 7, 5) [000183] -A------R--- * ASG ref $200
N002 ( 3, 2) [000181] D------N---- \--* LCL_VAR ref V13 tmp12 d:3 $200
---------
***** BB01, stmt 4 (before)
N001 ( 3, 2) [000185] -------N---- /--* LCL_VAR ref V13 tmp12 u:3 (last use)
N003 ( 7, 5) [000186] -A------R--- * ASG ref
N002 ( 3, 2) [000184] D------N---- \--* LCL_VAR ref V12 tmp11 d:3
N001 [000185] LCL_VAR V13 tmp12 u:3 (last use) => $200 {JitNew($180, $1c0)}
N002 [000184] LCL_VAR V12 tmp11 d:3 => $200 {JitNew($180, $1c0)}
N003 [000186] ASG => $200 {JitNew($180, $1c0)}
***** BB01, stmt 4 (after)
N001 ( 3, 2) [000185] -------N---- /--* LCL_VAR ref V13 tmp12 u:3 (last use) $200
N003 ( 7, 5) [000186] -A------R--- * ASG ref $200
N002 ( 3, 2) [000184] D------N---- \--* LCL_VAR ref V12 tmp11 d:3 $200
---------
***** BB01, stmt 5 (before)
N001 ( 3, 2) [000188] -------N---- /--* LCL_VAR ref V12 tmp11 u:3 (last use)
N003 ( 7, 5) [000189] -A------R--- * ASG ref
N002 ( 3, 2) [000187] D------N---- \--* LCL_VAR ref V14 tmp13 d:3
N001 [000188] LCL_VAR V12 tmp11 u:3 (last use) => $200 {JitNew($180, $1c0)}
N002 [000187] LCL_VAR V14 tmp13 d:3 => $200 {JitNew($180, $1c0)}
N003 [000189] ASG => $200 {JitNew($180, $1c0)}
***** BB01, stmt 5 (after)
N001 ( 3, 2) [000188] -------N---- /--* LCL_VAR ref V12 tmp11 u:3 (last use) $200
N003 ( 7, 5) [000189] -A------R--- * ASG ref $200
N002 ( 3, 2) [000187] D------N---- \--* LCL_VAR ref V14 tmp13 d:3 $200
---------
***** BB01, stmt 6 (before)
N006 ( 3, 2) [000195] -------N---- /--* LCL_VAR ref V14 tmp13 u:3 (last use)
N007 ( 10, 10) [000196] -A---------- * ASG ref
N005 ( 6, 7) [000194] *------N---- \--* IND ref
N003 ( 1, 1) [000192] ------------ | /--* CNS_INT long 0 Fseq[_s]
N004 ( 5, 7) [000193] -------N---- \--* ADD byref
N002 ( 3, 5) [000190] ------------ \--* ADDR byref
N001 ( 3, 4) [000191] D------N---- \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s]
N002 [000190] ADDR => $240 {240}
N003 [000192] CNS_INT 0 Fseq[_s] => $280 {LngCns: 0}
N004 [000193] ADD => $2c0 {ADD($240, $280)}
N006 [000195] LCL_VAR V14 tmp13 u:3 (last use) => $200 {JitNew($180, $1c0)}
fgCurMemoryVN[ByrefExposed] assigned by PtrToLoc indir at [000196] to VN: $41.
N007 [000196] ASG => $VN.Void
***** BB01, stmt 6 (after)
N006 ( 3, 2) [000195] -------N---- /--* LCL_VAR ref V14 tmp13 u:3 (last use) $200
N007 ( 10, 10) [000196] -A---------- * ASG ref $VN.Void
N005 ( 6, 7) [000194] *------N---- \--* IND ref $200
N003 ( 1, 1) [000192] ------------ | /--* CNS_INT long 0 Fseq[_s] $280
N004 ( 5, 7) [000193] -------N---- \--* ADD byref $2c0
N002 ( 3, 5) [000190] ------------ \--* ADDR byref $240
N001 ( 3, 4) [000191] D------N---- \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s]
---------
***** BB01, stmt 7 (before)
N003 ( 6, 5) [000038] x----------- /--* IND ref
N002 ( 3, 3) [000037] L----------- | \--* ADDR byref
N001 ( 3, 2) [000033] -------N---- | \--* LCL_VAR struct(AX) V05 tmp4
N007 ( 13, 11) [000105] -A------R--- * ASG ref
N006 ( 6, 5) [000198] x------N---- \--* IND ref
N005 ( 3, 3) [000197] L----------- \--* ADDR byref
N004 ( 3, 2) [000103] D------N---- \--* LCL_VAR struct(AX) V09 tmp8
N001 [000033] LCL_VAR V05 tmp4 => $300 {ByrefExposedLoad($82, $2c1, $41)}
N002 [000037] ADDR => $241 {241}
N003 [000038] IND => <l:$340 {ByrefExposedLoad($83, $241, $41)}, c:$1c6 {1c6}>
N005 [000197] ADDR => $242 {242}
fgCurMemoryVN[ByrefExposed] assigned by PtrToLoc indir at [000105] to VN: $42.
N007 [000105] ASG => $VN.Void
***** BB01, stmt 7 (after)
N003 ( 6, 5) [000038] x----------- /--* IND ref <l:$340, c:$1c6>
N002 ( 3, 3) [000037] L----------- | \--* ADDR byref $241
N001 ( 3, 2) [000033] -------N---- | \--* LCL_VAR struct(AX) V05 tmp4 $300
N007 ( 13, 11) [000105] -A------R--- * ASG ref $VN.Void
N006 ( 6, 5) [000198] x------N---- \--* IND ref <l:$340, c:$1c6>
N005 ( 3, 3) [000197] L----------- \--* ADDR byref $242
N004 ( 3, 2) [000103] D------N---- \--* LCL_VAR struct(AX) V09 tmp8
---------
***** BB01, stmt 8 (before)
N003 ( 6, 5) [000200] x----------- /--* IND ref
N002 ( 3, 3) [000199] L----------- | \--* ADDR byref
N001 ( 3, 2) [000097] ------------ | \--* LCL_VAR struct(AX) V09 tmp8
N007 ( 13, 13) [000101] -A--G---R--- * ASG ref
N006 ( 6, 7) [000100] *---G--N---- \--* IND ref
N005 ( 3, 5) [000099] ------------ \--* ADDR byref
N004 ( 3, 4) [000096] D------N---- \--* LCL_FLD struct V06 tmp5 [+0] Fseq[_s]
N001 [000097] LCL_VAR V09 tmp8 => $301 {ByrefExposedLoad($82, $2c2, $42)}
N002 [000199] ADDR => $243 {243}
N003 [000200] IND => <l:$341 {ByrefExposedLoad($83, $243, $42)}, c:$1c7 {1c7}>
N005 [000099] ADDR => $244 {244}
fgCurMemoryVN[ByrefExposed] assigned by PtrToLoc indir at [000101] to VN: $43.
N007 [000101] ASG => $VN.Void
***** BB01, stmt 8 (after)
N003 ( 6, 5) [000200] x----------- /--* IND ref <l:$341, c:$1c7>
N002 ( 3, 3) [000199] L----------- | \--* ADDR byref $243
N001 ( 3, 2) [000097] ------------ | \--* LCL_VAR struct(AX) V09 tmp8 $301
N007 ( 13, 13) [000101] -A--G---R--- * ASG ref $VN.Void
N006 ( 6, 7) [000100] *---G--N---- \--* IND ref <l:$341, c:$1c7>
N005 ( 3, 5) [000099] ------------ \--* ADDR byref $244
N004 ( 3, 4) [000096] D------N---- \--* LCL_FLD struct V06 tmp5 [+0] Fseq[_s]
---------
***** BB01, stmt 9 (before)
N003 ( 6, 5) [000044] x----------- /--* IND ref
N002 ( 3, 3) [000043] L----------- | \--* ADDR byref
N001 ( 3, 2) [000041] -------N---- | \--* LCL_VAR struct(AX) V06 tmp5
N007 ( 13, 11) [000119] -A------R--- * ASG ref
N006 ( 6, 5) [000202] x------N---- \--* IND ref
N005 ( 3, 3) [000201] L----------- \--* ADDR byref
N004 ( 3, 2) [000117] D------N---- \--* LCL_VAR struct(AX) V10 tmp9
N001 [000041] LCL_VAR V06 tmp5 => $302 {ByrefExposedLoad($82, $2c3, $43)}
N002 [000043] ADDR => $245 {245}
N003 [000044] IND => <l:$342 {ByrefExposedLoad($83, $245, $43)}, c:$1c8 {1c8}>
N005 [000201] ADDR => $246 {246}
fgCurMemoryVN[ByrefExposed] assigned by PtrToLoc indir at [000119] to VN: $44.
N007 [000119] ASG => $VN.Void
***** BB01, stmt 9 (after)
N003 ( 6, 5) [000044] x----------- /--* IND ref <l:$342, c:$1c8>
N002 ( 3, 3) [000043] L----------- | \--* ADDR byref $245
N001 ( 3, 2) [000041] -------N---- | \--* LCL_VAR struct(AX) V06 tmp5 $302
N007 ( 13, 11) [000119] -A------R--- * ASG ref $VN.Void
N006 ( 6, 5) [000202] x------N---- \--* IND ref <l:$342, c:$1c8>
N005 ( 3, 3) [000201] L----------- \--* ADDR byref $246
N004 ( 3, 2) [000117] D------N---- \--* LCL_VAR struct(AX) V10 tmp9
---------
***** BB01, stmt 10 (before)
N003 ( 6, 5) [000204] x----------- /--* IND ref
N002 ( 3, 3) [000203] L----------- | \--* ADDR byref
N001 ( 3, 2) [000111] ------------ | \--* LCL_VAR struct(AX) V10 tmp9
N007 ( 13, 13) [000115] -A--G---R--- * ASG ref
N006 ( 6, 7) [000114] *---G--N---- \--* IND ref
N005 ( 3, 5) [000113] ------------ \--* ADDR byref
N004 ( 3, 4) [000110] D------N---- \--* LCL_FLD struct V00 loc0 d:3[+0] Fseq[_s]
N001 [000111] LCL_VAR V10 tmp9 => $303 {ByrefExposedLoad($82, $2c4, $44)}
N002 [000203] ADDR => $247 {247}
N003 [000204] IND => <l:$343 {ByrefExposedLoad($83, $247, $44)}, c:$1c9 {1c9}>
fieldHnd $181 is {Hnd const: 0x00007FFC12345900}
fieldSeq $201 is {_s}
N005 [000113] ADDR => $2c5 {PtrToLoc($87, $201)}
Tree [000115] assigned VN to local var V00/3: VN <l:$343 {ByrefExposedLoad($83, $247, $44)}, c:$1c9 {1c9}>
N007 [000115] ASG => $VN.Void
***** BB01, stmt 10 (after)
N003 ( 6, 5) [000204] x----------- /--* IND ref <l:$343, c:$1c9>
N002 ( 3, 3) [000203] L----------- | \--* ADDR byref $247
N001 ( 3, 2) [000111] ------------ | \--* LCL_VAR struct(AX) V10 tmp9 $303
N007 ( 13, 13) [000115] -A--G---R--- * ASG ref $VN.Void
N006 ( 6, 7) [000114] *---G--N---- \--* IND ref <l:$343, c:$1c9>
N005 ( 3, 5) [000113] ------------ \--* ADDR byref $2c5
N004 ( 3, 4) [000110] D------N---- \--* LCL_FLD struct V00 loc0 d:3[+0] Fseq[_s]
---------
***** BB01, stmt 11 (before)
N004 ( 17, 11) [000178] --CXG------- * CALL nullcheck void C.M
N002 ( 3, 4) [000176] ------------ this in rcx \--* LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use)
N001 [000205] ARGPLACE => $1ca {1ca}
VNApplySelectors:
VNForHandle(Fseq[_s]) is $181, fieldType is struct, size = 8
VNForMapSelect($343, $181):struct returns $380 {$343[$181]}
VNApplySelectors:
VNForHandle(Fseq[_s]) is $182, fieldType is struct, size = 8
VNForMapSelect($380, $182):struct returns $381 {$380[$182]}
VNApplySelectors:
VNForHandle(Fseq[_s]) is $183, fieldType is struct, size = 8
VNForMapSelect($381, $183):struct returns $382 {$381[$183]}
VNApplySelectors:
VNForHandle(Fseq[_s]) is $184, fieldType is struct, size = 8
VNForMapSelect($382, $184):struct returns $383 {$382[$184]}
VNApplySelectors:
VNForHandle(Fseq[_c]) is $185, fieldType is ref
VNForMapSelect($383, $185):ref returns $202 {$383[$185]}
VNApplySelectors:
VNForHandle(Fseq[_s]) is $181, fieldType is struct, size = 8
VNForMapSelect($1c9, $181):struct returns $384 {$1c9[$181]}
VNApplySelectors:
VNForHandle(Fseq[_s]) is $182, fieldType is struct, size = 8
VNForMapSelect($384, $182):struct returns $385 {$384[$182]}
VNApplySelectors:
VNForHandle(Fseq[_s]) is $183, fieldType is struct, size = 8
VNForMapSelect($385, $183):struct returns $386 {$385[$183]}
VNApplySelectors:
VNForHandle(Fseq[_s]) is $184, fieldType is struct, size = 8
VNForMapSelect($386, $184):struct returns $387 {$386[$184]}
VNApplySelectors:
VNForHandle(Fseq[_c]) is $185, fieldType is ref
VNForMapSelect($387, $185):ref returns $203 {$387[$185]}
N002 [000176] LCL_FLD V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) => <l:$202 {$383[$185]}, c:$203 {$387[$185]}>
N003 [000206] LIST => <l:$143 {LIST($202, $0)}, c:$142 {LIST($203, $0)}>
fgCurMemoryVN[GcHeap] assigned by CALL at [000178] to VN: $1cb.
N004 [000178] CALL nullcheck => $VN.Void
***** BB01, stmt 11 (after)
N004 ( 17, 11) [000178] --CXG------- * CALL nullcheck void C.M $VN.Void
N002 ( 3, 4) [000176] ------------ this in rcx \--* LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) <l:$202, c:$203>
---------
***** BB01, stmt 12 (before)
N001 ( 0, 0) [000051] ------------ * RETURN void
N001 [000051] RETURN => $3c0 {3c0}
***** BB01, stmt 12 (after)
N001 ( 0, 0) [000051] ------------ * RETURN void $3c0
finish(BB01).
*************** In optVnCopyProp()
*************** In SsaBuilder::ComputeDominators(Compiler*, ...)
Copy Assertion for BB01
curSsaName stack: { }
Live vars: {} => {V02}
Live vars: {V02} => {}
Live vars: {} => {V11}
Live vars: {V11} => {}
Live vars: {} => {V13}
Live vars: {V13} => {}
Live vars: {} => {V12}
Live vars: {V12} => {}
Live vars: {} => {V14}
Live vars: {V14} => {}
Live vars: {} => {V00}
Live vars: {V00} => {}
*************** In optOptimizeCSEs()
Blocks/Trees at start of optOptimizeCSE phase
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
***** BB01, stmt 1
( 17, 16) [000007] ------------ * STMT void (IL 0x000...0x027)
N005 ( 17, 16) [000004] --C--------- | /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
N003 ( 3, 10) [000003] ------------ arg0 in rcx | | \--* CNS_INT(h) long 0x7ffc12345508 method $180
N007 ( 17, 16) [000006] -AC-----R--- \--* ASG ref $200
N006 ( 1, 1) [000005] D------N---- \--* LCL_VAR ref V02 tmp1 d:3 $200
***** BB01, stmt 2
( 5, 4) [000064] ------------ * STMT void (IL 0x007... ???)
N001 ( 1, 1) [000011] ------------ | /--* LCL_VAR ref V02 tmp1 u:3 (last use) $200
N003 ( 5, 4) [000063] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000062] D------N---- \--* LCL_VAR ref V11 tmp10 d:3 $200
***** BB01, stmt 3
( 7, 5) [000078] ------------ * STMT void (IL 0x00C... ???)
N001 ( 3, 2) [000182] -------N---- | /--* LCL_VAR ref V11 tmp10 u:3 (last use) $200
N003 ( 7, 5) [000183] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000181] D------N---- \--* LCL_VAR ref V13 tmp12 d:3 $200
***** BB01, stmt 4
( 7, 5) [000074] ------------ * STMT void (IL 0x00C... ???)
N001 ( 3, 2) [000185] -------N---- | /--* LCL_VAR ref V13 tmp12 u:3 (last use) $200
N003 ( 7, 5) [000186] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000184] D------N---- \--* LCL_VAR ref V12 tmp11 d:3 $200
***** BB01, stmt 5
( 7, 5) [000092] ------------ * STMT void (IL 0x011... ???)
N001 ( 3, 2) [000188] -------N---- | /--* LCL_VAR ref V12 tmp11 u:3 (last use) $200
N003 ( 7, 5) [000189] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000187] D------N---- \--* LCL_VAR ref V14 tmp13 d:3 $200
***** BB01, stmt 6
( 10, 10) [000088] ------------ * STMT void (IL 0x011... ???)
N006 ( 3, 2) [000195] -------N---- | /--* LCL_VAR ref V14 tmp13 u:3 (last use) $200
N007 ( 10, 10) [000196] -A---------- \--* ASG ref $VN.Void
N005 ( 6, 7) [000194] *------N---- \--* IND ref $200
N003 ( 1, 1) [000192] ------------ | /--* CNS_INT long 0 Fseq[_s] $280
N004 ( 5, 7) [000193] -------N---- \--* ADD byref $2c0
N002 ( 3, 5) [000190] ------------ \--* ADDR byref $240
N001 ( 3, 4) [000191] D------N---- \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s]
***** BB01, stmt 7
( 13, 11) [000106] ------------ * STMT void (IL 0x016... ???)
N003 ( 6, 5) [000038] x----------- | /--* IND ref <l:$340, c:$1c6>
N002 ( 3, 3) [000037] L----------- | | \--* ADDR byref $241
N001 ( 3, 2) [000033] -------N---- | | \--* LCL_VAR struct(AX) V05 tmp4 $300
N007 ( 13, 11) [000105] -A------R--- \--* ASG ref $VN.Void
N006 ( 6, 5) [000198] x------N---- \--* IND ref <l:$340, c:$1c6>
N005 ( 3, 3) [000197] L----------- \--* ADDR byref $242
N004 ( 3, 2) [000103] D------N---- \--* LCL_VAR struct(AX) V09 tmp8
***** BB01, stmt 8
( 13, 13) [000102] ------------ * STMT void (IL 0x016... ???)
N003 ( 6, 5) [000200] x----------- | /--* IND ref <l:$341, c:$1c7>
N002 ( 3, 3) [000199] L----------- | | \--* ADDR byref $243
N001 ( 3, 2) [000097] ------------ | | \--* LCL_VAR struct(AX) V09 tmp8 $301
N007 ( 13, 13) [000101] -A--G---R--- \--* ASG ref $VN.Void
N006 ( 6, 7) [000100] *---G--N---- \--* IND ref <l:$341, c:$1c7>
N005 ( 3, 5) [000099] ------------ \--* ADDR byref $244
N004 ( 3, 4) [000096] D------N---- \--* LCL_FLD struct V06 tmp5 [+0] Fseq[_s]
***** BB01, stmt 9
( 13, 11) [000120] ------------ * STMT void (IL 0x01B... ???)
N003 ( 6, 5) [000044] x----------- | /--* IND ref <l:$342, c:$1c8>
N002 ( 3, 3) [000043] L----------- | | \--* ADDR byref $245
N001 ( 3, 2) [000041] -------N---- | | \--* LCL_VAR struct(AX) V06 tmp5 $302
N007 ( 13, 11) [000119] -A------R--- \--* ASG ref $VN.Void
N006 ( 6, 5) [000202] x------N---- \--* IND ref <l:$342, c:$1c8>
N005 ( 3, 3) [000201] L----------- \--* ADDR byref $246
N004 ( 3, 2) [000117] D------N---- \--* LCL_VAR struct(AX) V10 tmp9
***** BB01, stmt 10
( 13, 13) [000116] ------------ * STMT void (IL 0x01B... ???)
N003 ( 6, 5) [000204] x----------- | /--* IND ref <l:$343, c:$1c9>
N002 ( 3, 3) [000203] L----------- | | \--* ADDR byref $247
N001 ( 3, 2) [000111] ------------ | | \--* LCL_VAR struct(AX) V10 tmp9 $303
N007 ( 13, 13) [000115] -A--G---R--- \--* ASG ref $VN.Void
N006 ( 6, 7) [000114] *---G--N---- \--* IND ref <l:$343, c:$1c9>
N005 ( 3, 5) [000113] ------------ \--* ADDR byref $2c5
N004 ( 3, 4) [000110] D------N---- \--* LCL_FLD struct V00 loc0 d:3[+0] Fseq[_s]
***** BB01, stmt 11
( 17, 11) [000179] ------------ * STMT void (IL 0x020... ???)
N004 ( 17, 11) [000178] --CXG------- \--* CALL nullcheck void C.M $VN.Void
N002 ( 3, 4) [000176] ------------ this in rcx \--* LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) <l:$202, c:$203>
***** BB01, stmt 12
( 0, 0) [000052] ------------ * STMT void (IL 0x027... ???)
N001 ( 0, 0) [000051] ------------ \--* RETURN void $3c0
-------------------------------------------------------------------------------------------------------------------
*************** In optOptimizeValnumCSEs()
*************** In optAssertionPropMain()
Blocks/Trees at start of phase
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
***** BB01, stmt 1
( 17, 16) [000007] ------------ * STMT void (IL 0x000...0x027)
N005 ( 17, 16) [000004] --C--------- | /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
N003 ( 3, 10) [000003] ------------ arg0 in rcx | | \--* CNS_INT(h) long 0x7ffc12345508 method $180
N007 ( 17, 16) [000006] -AC-----R--- \--* ASG ref $200
N006 ( 1, 1) [000005] D------N---- \--* LCL_VAR ref V02 tmp1 d:3 $200
***** BB01, stmt 2
( 5, 4) [000064] ------------ * STMT void (IL 0x007... ???)
N001 ( 1, 1) [000011] ------------ | /--* LCL_VAR ref V02 tmp1 u:3 (last use) $200
N003 ( 5, 4) [000063] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000062] D------N---- \--* LCL_VAR ref V11 tmp10 d:3 $200
***** BB01, stmt 3
( 7, 5) [000078] ------------ * STMT void (IL 0x00C... ???)
N001 ( 3, 2) [000182] -------N---- | /--* LCL_VAR ref V11 tmp10 u:3 (last use) $200
N003 ( 7, 5) [000183] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000181] D------N---- \--* LCL_VAR ref V13 tmp12 d:3 $200
***** BB01, stmt 4
( 7, 5) [000074] ------------ * STMT void (IL 0x00C... ???)
N001 ( 3, 2) [000185] -------N---- | /--* LCL_VAR ref V13 tmp12 u:3 (last use) $200
N003 ( 7, 5) [000186] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000184] D------N---- \--* LCL_VAR ref V12 tmp11 d:3 $200
***** BB01, stmt 5
( 7, 5) [000092] ------------ * STMT void (IL 0x011... ???)
N001 ( 3, 2) [000188] -------N---- | /--* LCL_VAR ref V12 tmp11 u:3 (last use) $200
N003 ( 7, 5) [000189] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000187] D------N---- \--* LCL_VAR ref V14 tmp13 d:3 $200
***** BB01, stmt 6
( 10, 10) [000088] ------------ * STMT void (IL 0x011... ???)
N006 ( 3, 2) [000195] -------N---- | /--* LCL_VAR ref V14 tmp13 u:3 (last use) $200
N007 ( 10, 10) [000196] -A---------- \--* ASG ref $VN.Void
N005 ( 6, 7) [000194] *------N---- \--* IND ref $200
N003 ( 1, 1) [000192] ------------ | /--* CNS_INT long 0 Fseq[_s] $280
N004 ( 5, 7) [000193] -------N---- \--* ADD byref $2c0
N002 ( 3, 5) [000190] ------------ \--* ADDR byref $240
N001 ( 3, 4) [000191] D------N---- \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s]
***** BB01, stmt 7
( 13, 11) [000106] ------------ * STMT void (IL 0x016... ???)
N003 ( 6, 5) [000038] x----------- | /--* IND ref <l:$340, c:$1c6>
N002 ( 3, 3) [000037] L----------- | | \--* ADDR byref $241
N001 ( 3, 2) [000033] -------N---- | | \--* LCL_VAR struct(AX) V05 tmp4 $300
N007 ( 13, 11) [000105] -A------R--- \--* ASG ref $VN.Void
N006 ( 6, 5) [000198] x------N---- \--* IND ref <l:$340, c:$1c6>
N005 ( 3, 3) [000197] L----------- \--* ADDR byref $242
N004 ( 3, 2) [000103] D------N---- \--* LCL_VAR struct(AX) V09 tmp8
***** BB01, stmt 8
( 13, 13) [000102] ------------ * STMT void (IL 0x016... ???)
N003 ( 6, 5) [000200] x----------- | /--* IND ref <l:$341, c:$1c7>
N002 ( 3, 3) [000199] L----------- | | \--* ADDR byref $243
N001 ( 3, 2) [000097] ------------ | | \--* LCL_VAR struct(AX) V09 tmp8 $301
N007 ( 13, 13) [000101] -A--G---R--- \--* ASG ref $VN.Void
N006 ( 6, 7) [000100] *---G--N---- \--* IND ref <l:$341, c:$1c7>
N005 ( 3, 5) [000099] ------------ \--* ADDR byref $244
N004 ( 3, 4) [000096] D------N---- \--* LCL_FLD struct V06 tmp5 [+0] Fseq[_s]
***** BB01, stmt 9
( 13, 11) [000120] ------------ * STMT void (IL 0x01B... ???)
N003 ( 6, 5) [000044] x----------- | /--* IND ref <l:$342, c:$1c8>
N002 ( 3, 3) [000043] L----------- | | \--* ADDR byref $245
N001 ( 3, 2) [000041] -------N---- | | \--* LCL_VAR struct(AX) V06 tmp5 $302
N007 ( 13, 11) [000119] -A------R--- \--* ASG ref $VN.Void
N006 ( 6, 5) [000202] x------N---- \--* IND ref <l:$342, c:$1c8>
N005 ( 3, 3) [000201] L----------- \--* ADDR byref $246
N004 ( 3, 2) [000117] D------N---- \--* LCL_VAR struct(AX) V10 tmp9
***** BB01, stmt 10
( 13, 13) [000116] ------------ * STMT void (IL 0x01B... ???)
N003 ( 6, 5) [000204] x----------- | /--* IND ref <l:$343, c:$1c9>
N002 ( 3, 3) [000203] L----------- | | \--* ADDR byref $247
N001 ( 3, 2) [000111] ------------ | | \--* LCL_VAR struct(AX) V10 tmp9 $303
N007 ( 13, 13) [000115] -A--G---R--- \--* ASG ref $VN.Void
N006 ( 6, 7) [000114] *---G--N---- \--* IND ref <l:$343, c:$1c9>
N005 ( 3, 5) [000113] ------------ \--* ADDR byref $2c5
N004 ( 3, 4) [000110] D------N---- \--* LCL_FLD struct V00 loc0 d:3[+0] Fseq[_s]
***** BB01, stmt 11
( 17, 11) [000179] ------------ * STMT void (IL 0x020... ???)
N004 ( 17, 11) [000178] --CXG------- \--* CALL nullcheck void C.M $VN.Void
N002 ( 3, 4) [000176] ------------ this in rcx \--* LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) <l:$202, c:$203>
***** BB01, stmt 12
( 0, 0) [000052] ------------ * STMT void (IL 0x027... ???)
N001 ( 0, 0) [000051] ------------ \--* RETURN void $3c0
-------------------------------------------------------------------------------------------------------------------
*************** In OptimizeRangeChecks()
Blocks/trees before phase
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
***** BB01, stmt 1
( 17, 16) [000007] ------------ * STMT void (IL 0x000...0x027)
N005 ( 17, 16) [000004] --C--------- | /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
N003 ( 3, 10) [000003] ------------ arg0 in rcx | | \--* CNS_INT(h) long 0x7ffc12345508 method $180
N007 ( 17, 16) [000006] -AC-----R--- \--* ASG ref $200
N006 ( 1, 1) [000005] D------N---- \--* LCL_VAR ref V02 tmp1 d:3 $200
***** BB01, stmt 2
( 5, 4) [000064] ------------ * STMT void (IL 0x007... ???)
N001 ( 1, 1) [000011] ------------ | /--* LCL_VAR ref V02 tmp1 u:3 (last use) $200
N003 ( 5, 4) [000063] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000062] D------N---- \--* LCL_VAR ref V11 tmp10 d:3 $200
***** BB01, stmt 3
( 7, 5) [000078] ------------ * STMT void (IL 0x00C... ???)
N001 ( 3, 2) [000182] -------N---- | /--* LCL_VAR ref V11 tmp10 u:3 (last use) $200
N003 ( 7, 5) [000183] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000181] D------N---- \--* LCL_VAR ref V13 tmp12 d:3 $200
***** BB01, stmt 4
( 7, 5) [000074] ------------ * STMT void (IL 0x00C... ???)
N001 ( 3, 2) [000185] -------N---- | /--* LCL_VAR ref V13 tmp12 u:3 (last use) $200
N003 ( 7, 5) [000186] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000184] D------N---- \--* LCL_VAR ref V12 tmp11 d:3 $200
***** BB01, stmt 5
( 7, 5) [000092] ------------ * STMT void (IL 0x011... ???)
N001 ( 3, 2) [000188] -------N---- | /--* LCL_VAR ref V12 tmp11 u:3 (last use) $200
N003 ( 7, 5) [000189] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000187] D------N---- \--* LCL_VAR ref V14 tmp13 d:3 $200
***** BB01, stmt 6
( 10, 10) [000088] ------------ * STMT void (IL 0x011... ???)
N006 ( 3, 2) [000195] -------N---- | /--* LCL_VAR ref V14 tmp13 u:3 (last use) $200
N007 ( 10, 10) [000196] -A---------- \--* ASG ref $VN.Void
N005 ( 6, 7) [000194] *------N---- \--* IND ref $200
N003 ( 1, 1) [000192] ------------ | /--* CNS_INT long 0 Fseq[_s] $280
N004 ( 5, 7) [000193] -------N---- \--* ADD byref $2c0
N002 ( 3, 5) [000190] ------------ \--* ADDR byref $240
N001 ( 3, 4) [000191] D------N---- \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s]
***** BB01, stmt 7
( 13, 11) [000106] ------------ * STMT void (IL 0x016... ???)
N003 ( 6, 5) [000038] x----------- | /--* IND ref <l:$340, c:$1c6>
N002 ( 3, 3) [000037] L----------- | | \--* ADDR byref $241
N001 ( 3, 2) [000033] -------N---- | | \--* LCL_VAR struct(AX) V05 tmp4 $300
N007 ( 13, 11) [000105] -A------R--- \--* ASG ref $VN.Void
N006 ( 6, 5) [000198] x------N---- \--* IND ref <l:$340, c:$1c6>
N005 ( 3, 3) [000197] L----------- \--* ADDR byref $242
N004 ( 3, 2) [000103] D------N---- \--* LCL_VAR struct(AX) V09 tmp8
***** BB01, stmt 8
( 13, 13) [000102] ------------ * STMT void (IL 0x016... ???)
N003 ( 6, 5) [000200] x----------- | /--* IND ref <l:$341, c:$1c7>
N002 ( 3, 3) [000199] L----------- | | \--* ADDR byref $243
N001 ( 3, 2) [000097] ------------ | | \--* LCL_VAR struct(AX) V09 tmp8 $301
N007 ( 13, 13) [000101] -A--G---R--- \--* ASG ref $VN.Void
N006 ( 6, 7) [000100] *---G--N---- \--* IND ref <l:$341, c:$1c7>
N005 ( 3, 5) [000099] ------------ \--* ADDR byref $244
N004 ( 3, 4) [000096] D------N---- \--* LCL_FLD struct V06 tmp5 [+0] Fseq[_s]
***** BB01, stmt 9
( 13, 11) [000120] ------------ * STMT void (IL 0x01B... ???)
N003 ( 6, 5) [000044] x----------- | /--* IND ref <l:$342, c:$1c8>
N002 ( 3, 3) [000043] L----------- | | \--* ADDR byref $245
N001 ( 3, 2) [000041] -------N---- | | \--* LCL_VAR struct(AX) V06 tmp5 $302
N007 ( 13, 11) [000119] -A------R--- \--* ASG ref $VN.Void
N006 ( 6, 5) [000202] x------N---- \--* IND ref <l:$342, c:$1c8>
N005 ( 3, 3) [000201] L----------- \--* ADDR byref $246
N004 ( 3, 2) [000117] D------N---- \--* LCL_VAR struct(AX) V10 tmp9
***** BB01, stmt 10
( 13, 13) [000116] ------------ * STMT void (IL 0x01B... ???)
N003 ( 6, 5) [000204] x----------- | /--* IND ref <l:$343, c:$1c9>
N002 ( 3, 3) [000203] L----------- | | \--* ADDR byref $247
N001 ( 3, 2) [000111] ------------ | | \--* LCL_VAR struct(AX) V10 tmp9 $303
N007 ( 13, 13) [000115] -A--G---R--- \--* ASG ref $VN.Void
N006 ( 6, 7) [000114] *---G--N---- \--* IND ref <l:$343, c:$1c9>
N005 ( 3, 5) [000113] ------------ \--* ADDR byref $2c5
N004 ( 3, 4) [000110] D------N---- \--* LCL_FLD struct V00 loc0 d:3[+0] Fseq[_s]
***** BB01, stmt 11
( 17, 11) [000179] ------------ * STMT void (IL 0x020... ???)
N004 ( 17, 11) [000178] --CXG------- \--* CALL nullcheck void C.M $VN.Void
N002 ( 3, 4) [000176] ------------ this in rcx \--* LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) <l:$202, c:$203>
***** BB01, stmt 12
( 0, 0) [000052] ------------ * STMT void (IL 0x027... ???)
N001 ( 0, 0) [000051] ------------ \--* RETURN void $3c0
-------------------------------------------------------------------------------------------------------------------
*************** In fgDetermineFirstColdBlock()
No procedure splitting will be done for this method
*************** In IR Rationalize
Trees before IR Rationalize
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
***** BB01, stmt 1
( 17, 16) [000007] ------------ * STMT void (IL 0x000...0x027)
N005 ( 17, 16) [000004] --C--------- | /--* CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
N003 ( 3, 10) [000003] ------------ arg0 in rcx | | \--* CNS_INT(h) long 0x7ffc12345508 method $180
N007 ( 17, 16) [000006] -AC-----R--- \--* ASG ref $200
N006 ( 1, 1) [000005] D------N---- \--* LCL_VAR ref V02 tmp1 d:3 $200
***** BB01, stmt 2
( 5, 4) [000064] ------------ * STMT void (IL 0x007... ???)
N001 ( 1, 1) [000011] ------------ | /--* LCL_VAR ref V02 tmp1 u:3 (last use) $200
N003 ( 5, 4) [000063] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000062] D------N---- \--* LCL_VAR ref V11 tmp10 d:3 $200
***** BB01, stmt 3
( 7, 5) [000078] ------------ * STMT void (IL 0x00C... ???)
N001 ( 3, 2) [000182] -------N---- | /--* LCL_VAR ref V11 tmp10 u:3 (last use) $200
N003 ( 7, 5) [000183] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000181] D------N---- \--* LCL_VAR ref V13 tmp12 d:3 $200
***** BB01, stmt 4
( 7, 5) [000074] ------------ * STMT void (IL 0x00C... ???)
N001 ( 3, 2) [000185] -------N---- | /--* LCL_VAR ref V13 tmp12 u:3 (last use) $200
N003 ( 7, 5) [000186] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000184] D------N---- \--* LCL_VAR ref V12 tmp11 d:3 $200
***** BB01, stmt 5
( 7, 5) [000092] ------------ * STMT void (IL 0x011... ???)
N001 ( 3, 2) [000188] -------N---- | /--* LCL_VAR ref V12 tmp11 u:3 (last use) $200
N003 ( 7, 5) [000189] -A------R--- \--* ASG ref $200
N002 ( 3, 2) [000187] D------N---- \--* LCL_VAR ref V14 tmp13 d:3 $200
***** BB01, stmt 6
( 10, 10) [000088] ------------ * STMT void (IL 0x011... ???)
N006 ( 3, 2) [000195] -------N---- | /--* LCL_VAR ref V14 tmp13 u:3 (last use) $200
N007 ( 10, 10) [000196] -A---------- \--* ASG ref $VN.Void
N005 ( 6, 7) [000194] *------N---- \--* IND ref $200
N003 ( 1, 1) [000192] ------------ | /--* CNS_INT long 0 Fseq[_s] $280
N004 ( 5, 7) [000193] -------N---- \--* ADD byref $2c0
N002 ( 3, 5) [000190] ------------ \--* ADDR byref $240
N001 ( 3, 4) [000191] D------N---- \--* LCL_FLD struct V05 tmp4 [+0] Fseq[_s]
***** BB01, stmt 7
( 13, 11) [000106] ------------ * STMT void (IL 0x016... ???)
N003 ( 6, 5) [000038] x----------- | /--* IND ref <l:$340, c:$1c6>
N002 ( 3, 3) [000037] L----------- | | \--* ADDR byref $241
N001 ( 3, 2) [000033] -------N---- | | \--* LCL_VAR struct(AX) V05 tmp4 $300
N007 ( 13, 11) [000105] -A------R--- \--* ASG ref $VN.Void
N006 ( 6, 5) [000198] x------N---- \--* IND ref <l:$340, c:$1c6>
N005 ( 3, 3) [000197] L----------- \--* ADDR byref $242
N004 ( 3, 2) [000103] D------N---- \--* LCL_VAR struct(AX) V09 tmp8
***** BB01, stmt 8
( 13, 13) [000102] ------------ * STMT void (IL 0x016... ???)
N003 ( 6, 5) [000200] x----------- | /--* IND ref <l:$341, c:$1c7>
N002 ( 3, 3) [000199] L----------- | | \--* ADDR byref $243
N001 ( 3, 2) [000097] ------------ | | \--* LCL_VAR struct(AX) V09 tmp8 $301
N007 ( 13, 13) [000101] -A--G---R--- \--* ASG ref $VN.Void
N006 ( 6, 7) [000100] *---G--N---- \--* IND ref <l:$341, c:$1c7>
N005 ( 3, 5) [000099] ------------ \--* ADDR byref $244
N004 ( 3, 4) [000096] D------N---- \--* LCL_FLD struct V06 tmp5 [+0] Fseq[_s]
***** BB01, stmt 9
( 13, 11) [000120] ------------ * STMT void (IL 0x01B... ???)
N003 ( 6, 5) [000044] x----------- | /--* IND ref <l:$342, c:$1c8>
N002 ( 3, 3) [000043] L----------- | | \--* ADDR byref $245
N001 ( 3, 2) [000041] -------N---- | | \--* LCL_VAR struct(AX) V06 tmp5 $302
N007 ( 13, 11) [000119] -A------R--- \--* ASG ref $VN.Void
N006 ( 6, 5) [000202] x------N---- \--* IND ref <l:$342, c:$1c8>
N005 ( 3, 3) [000201] L----------- \--* ADDR byref $246
N004 ( 3, 2) [000117] D------N---- \--* LCL_VAR struct(AX) V10 tmp9
***** BB01, stmt 10
( 13, 13) [000116] ------------ * STMT void (IL 0x01B... ???)
N003 ( 6, 5) [000204] x----------- | /--* IND ref <l:$343, c:$1c9>
N002 ( 3, 3) [000203] L----------- | | \--* ADDR byref $247
N001 ( 3, 2) [000111] ------------ | | \--* LCL_VAR struct(AX) V10 tmp9 $303
N007 ( 13, 13) [000115] -A--G---R--- \--* ASG ref $VN.Void
N006 ( 6, 7) [000114] *---G--N---- \--* IND ref <l:$343, c:$1c9>
N005 ( 3, 5) [000113] ------------ \--* ADDR byref $2c5
N004 ( 3, 4) [000110] D------N---- \--* LCL_FLD struct V00 loc0 d:3[+0] Fseq[_s]
***** BB01, stmt 11
( 17, 11) [000179] ------------ * STMT void (IL 0x020... ???)
N004 ( 17, 11) [000178] --CXG------- \--* CALL nullcheck void C.M $VN.Void
N002 ( 3, 4) [000176] ------------ this in rcx \--* LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) <l:$202, c:$203>
***** BB01, stmt 12
( 0, 0) [000052] ------------ * STMT void (IL 0x027... ???)
N001 ( 0, 0) [000051] ------------ \--* RETURN void $3c0
-------------------------------------------------------------------------------------------------------------------
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N007 ( 17, 16) [000006] DAC--------- * STORE_LCL_VAR ref V02 tmp1 d:3
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N003 ( 5, 4) [000063] DA---------- * STORE_LCL_VAR ref V11 tmp10 d:3
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N003 ( 7, 5) [000183] DA---------- * STORE_LCL_VAR ref V13 tmp12 d:3
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N003 ( 7, 5) [000186] DA---------- * STORE_LCL_VAR ref V12 tmp11 d:3
rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X)
N003 ( 7, 5) [000189] DA---------- * STORE_LCL_VAR ref V14 tmp13 d:3
Rewriting GT_ADDR(GT_LCL_FLD) to GT_LCL_FLD_ADDR:
N001 ( 3, 4) [000191] D------N---- t191 = LCL_FLD_ADDR byref V05 tmp4 [+0] Fseq[_s]
Rewriting GT_ADDR(GT_LCL_VAR) to GT_LCL_VAR_ADDR:
N001 ( 3, 2) [000033] -------N---- t33 = LCL_VAR_ADDR byref V05 tmp4
Rewriting GT_ADDR(GT_LCL_VAR) to GT_LCL_VAR_ADDR:
N004 ( 3, 2) [000103] D------N---- t103 = LCL_VAR_ADDR byref V09 tmp8
Rewriting GT_ADDR(GT_LCL_VAR) to GT_LCL_VAR_ADDR:
N001 ( 3, 2) [000097] ------------ t97 = LCL_VAR_ADDR byref V09 tmp8
Rewriting GT_ADDR(GT_LCL_FLD) to GT_LCL_FLD_ADDR:
N004 ( 3, 4) [000096] D------N---- t96 = LCL_FLD_ADDR byref V06 tmp5 [+0] Fseq[_s]
Rewriting GT_ADDR(GT_LCL_VAR) to GT_LCL_VAR_ADDR:
N001 ( 3, 2) [000041] -------N---- t41 = LCL_VAR_ADDR byref V06 tmp5
Rewriting GT_ADDR(GT_LCL_VAR) to GT_LCL_VAR_ADDR:
N004 ( 3, 2) [000117] D------N---- t117 = LCL_VAR_ADDR byref V10 tmp9
Rewriting GT_ADDR(GT_LCL_VAR) to GT_LCL_VAR_ADDR:
N001 ( 3, 2) [000111] ------------ t111 = LCL_VAR_ADDR byref V10 tmp9
Rewriting GT_ADDR(GT_LCL_FLD) to GT_LCL_FLD_ADDR:
N004 ( 3, 4) [000110] D------N---- t110 = LCL_FLD_ADDR byref V00 loc0 d:3[+0] Fseq[_s]
*************** Exiting IR Rationalize
Trees after IR Rationalize
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj LIR
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
( 17, 16) [000007] ------------ IL_OFFSET void IL offset: 0x0
N003 ( 3, 10) [000003] ------------ t3 = CNS_INT(h) long 0x7ffc12345508 method $180
/--* t3 long arg0 in rcx
N005 ( 17, 16) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
/--* t4 ref
N007 ( 17, 16) [000006] DA---------- * STORE_LCL_VAR ref V02 tmp1 d:3
( 5, 4) [000064] ------------ IL_OFFSET void IL offset: 0x7
N001 ( 1, 1) [000011] ------------ t11 = LCL_VAR ref V02 tmp1 u:3 (last use) $200
/--* t11 ref
N003 ( 5, 4) [000063] DA---------- * STORE_LCL_VAR ref V11 tmp10 d:3
( 7, 5) [000078] ------------ IL_OFFSET void IL offset: 0xc
N001 ( 3, 2) [000182] -------N---- t182 = LCL_VAR ref V11 tmp10 u:3 (last use) $200
/--* t182 ref
N003 ( 7, 5) [000183] DA---------- * STORE_LCL_VAR ref V13 tmp12 d:3
( 7, 5) [000074] ------------ IL_OFFSET void IL offset: 0xc
N001 ( 3, 2) [000185] -------N---- t185 = LCL_VAR ref V13 tmp12 u:3 (last use) $200
/--* t185 ref
N003 ( 7, 5) [000186] DA---------- * STORE_LCL_VAR ref V12 tmp11 d:3
( 7, 5) [000092] ------------ IL_OFFSET void IL offset: 0x11
N001 ( 3, 2) [000188] -------N---- t188 = LCL_VAR ref V12 tmp11 u:3 (last use) $200
/--* t188 ref
N003 ( 7, 5) [000189] DA---------- * STORE_LCL_VAR ref V14 tmp13 d:3
( 10, 10) [000088] ------------ IL_OFFSET void IL offset: 0x11
N001 ( 3, 4) [000191] D------N---- t191 = LCL_FLD_ADDR byref V05 tmp4 [+0] Fseq[_s]
N003 ( 1, 1) [000192] ------------ t192 = CNS_INT long 0 Fseq[_s] $280
/--* t191 byref
+--* t192 long
N004 ( 5, 7) [000193] -------N---- t193 = * ADD byref $2c0
N006 ( 3, 2) [000195] -------N---- t195 = LCL_VAR ref V14 tmp13 u:3 (last use) $200
/--* t193 byref
+--* t195 ref
[000210] -A---------- * STOREIND ref
( 13, 11) [000106] ------------ IL_OFFSET void IL offset: 0x16
N001 ( 3, 2) [000033] -------N---- t33 = LCL_VAR_ADDR byref V05 tmp4
/--* t33 byref
N003 ( 6, 5) [000038] x----------- t38 = * IND ref <l:$340, c:$1c6>
N004 ( 3, 2) [000103] D------N---- t103 = LCL_VAR_ADDR byref V09 tmp8
/--* t103 byref
+--* t38 ref
[000211] -A---------- * STOREIND ref
( 13, 13) [000102] ------------ IL_OFFSET void IL offset: 0x16
N001 ( 3, 2) [000097] ------------ t97 = LCL_VAR_ADDR byref V09 tmp8
/--* t97 byref
N003 ( 6, 5) [000200] x----------- t200 = * IND ref <l:$341, c:$1c7>
N004 ( 3, 4) [000096] D------N---- t96 = LCL_FLD_ADDR byref V06 tmp5 [+0] Fseq[_s]
/--* t96 byref
+--* t200 ref
[000212] -A--G------- * STOREIND ref
( 13, 11) [000120] ------------ IL_OFFSET void IL offset: 0x1b
N001 ( 3, 2) [000041] -------N---- t41 = LCL_VAR_ADDR byref V06 tmp5
/--* t41 byref
N003 ( 6, 5) [000044] x----------- t44 = * IND ref <l:$342, c:$1c8>
N004 ( 3, 2) [000117] D------N---- t117 = LCL_VAR_ADDR byref V10 tmp9
/--* t117 byref
+--* t44 ref
[000213] -A---------- * STOREIND ref
( 13, 13) [000116] ------------ IL_OFFSET void IL offset: 0x1b
N001 ( 3, 2) [000111] ------------ t111 = LCL_VAR_ADDR byref V10 tmp9
/--* t111 byref
N003 ( 6, 5) [000204] x----------- t204 = * IND ref <l:$343, c:$1c9>
N004 ( 3, 4) [000110] D------N---- t110 = LCL_FLD_ADDR byref V00 loc0 d:3[+0] Fseq[_s]
/--* t110 byref
+--* t204 ref
[000214] -A--G------- * STOREIND ref
( 17, 11) [000179] ------------ IL_OFFSET void IL offset: 0x20
N002 ( 3, 4) [000176] ------------ t176 = LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) <l:$202, c:$203>
/--* t176 ref this in rcx
N004 ( 17, 11) [000178] --CXG------- * CALL nullcheck void C.M $VN.Void
( 0, 0) [000052] ------------ IL_OFFSET void IL offset: 0x27
N001 ( 0, 0) [000051] ------------ RETURN void $3c0
-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
Bumping outgoingArgSpaceSize to 32 for call [000004]
outgoingArgSpaceSize 32 sufficient for call [000178], which needs 32
*************** In fgDebugCheckBBlist
*************** In Lowering
Trees before Lowering
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj LIR
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
( 17, 16) [000007] ------------ IL_OFFSET void IL offset: 0x0
N003 ( 3, 10) [000003] ------------ t3 = CNS_INT(h) long 0x7ffc12345508 method $180
/--* t3 long arg0 in rcx
N005 ( 17, 16) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
/--* t4 ref
N007 ( 17, 16) [000006] DA---------- * STORE_LCL_VAR ref V02 tmp1 d:3
( 5, 4) [000064] ------------ IL_OFFSET void IL offset: 0x7
N001 ( 1, 1) [000011] ------------ t11 = LCL_VAR ref V02 tmp1 u:3 (last use) $200
/--* t11 ref
N003 ( 5, 4) [000063] DA---------- * STORE_LCL_VAR ref V11 tmp10 d:3
( 7, 5) [000078] ------------ IL_OFFSET void IL offset: 0xc
N001 ( 3, 2) [000182] -------N---- t182 = LCL_VAR ref V11 tmp10 u:3 (last use) $200
/--* t182 ref
N003 ( 7, 5) [000183] DA---------- * STORE_LCL_VAR ref V13 tmp12 d:3
( 7, 5) [000074] ------------ IL_OFFSET void IL offset: 0xc
N001 ( 3, 2) [000185] -------N---- t185 = LCL_VAR ref V13 tmp12 u:3 (last use) $200
/--* t185 ref
N003 ( 7, 5) [000186] DA---------- * STORE_LCL_VAR ref V12 tmp11 d:3
( 7, 5) [000092] ------------ IL_OFFSET void IL offset: 0x11
N001 ( 3, 2) [000188] -------N---- t188 = LCL_VAR ref V12 tmp11 u:3 (last use) $200
/--* t188 ref
N003 ( 7, 5) [000189] DA---------- * STORE_LCL_VAR ref V14 tmp13 d:3
( 10, 10) [000088] ------------ IL_OFFSET void IL offset: 0x11
N001 ( 3, 4) [000191] D------N---- t191 = LCL_FLD_ADDR byref V05 tmp4 [+0] Fseq[_s]
N003 ( 1, 1) [000192] ------------ t192 = CNS_INT long 0 Fseq[_s] $280
/--* t191 byref
+--* t192 long
N004 ( 5, 7) [000193] -------N---- t193 = * ADD byref $2c0
N006 ( 3, 2) [000195] -------N---- t195 = LCL_VAR ref V14 tmp13 u:3 (last use) $200
/--* t193 byref
+--* t195 ref
[000210] -A---------- * STOREIND ref
( 13, 11) [000106] ------------ IL_OFFSET void IL offset: 0x16
N001 ( 3, 2) [000033] -------N---- t33 = LCL_VAR_ADDR byref V05 tmp4
/--* t33 byref
N003 ( 6, 5) [000038] x----------- t38 = * IND ref <l:$340, c:$1c6>
N004 ( 3, 2) [000103] D------N---- t103 = LCL_VAR_ADDR byref V09 tmp8
/--* t103 byref
+--* t38 ref
[000211] -A---------- * STOREIND ref
( 13, 13) [000102] ------------ IL_OFFSET void IL offset: 0x16
N001 ( 3, 2) [000097] ------------ t97 = LCL_VAR_ADDR byref V09 tmp8
/--* t97 byref
N003 ( 6, 5) [000200] x----------- t200 = * IND ref <l:$341, c:$1c7>
N004 ( 3, 4) [000096] D------N---- t96 = LCL_FLD_ADDR byref V06 tmp5 [+0] Fseq[_s]
/--* t96 byref
+--* t200 ref
[000212] -A--G------- * STOREIND ref
( 13, 11) [000120] ------------ IL_OFFSET void IL offset: 0x1b
N001 ( 3, 2) [000041] -------N---- t41 = LCL_VAR_ADDR byref V06 tmp5
/--* t41 byref
N003 ( 6, 5) [000044] x----------- t44 = * IND ref <l:$342, c:$1c8>
N004 ( 3, 2) [000117] D------N---- t117 = LCL_VAR_ADDR byref V10 tmp9
/--* t117 byref
+--* t44 ref
[000213] -A---------- * STOREIND ref
( 13, 13) [000116] ------------ IL_OFFSET void IL offset: 0x1b
N001 ( 3, 2) [000111] ------------ t111 = LCL_VAR_ADDR byref V10 tmp9
/--* t111 byref
N003 ( 6, 5) [000204] x----------- t204 = * IND ref <l:$343, c:$1c9>
N004 ( 3, 4) [000110] D------N---- t110 = LCL_FLD_ADDR byref V00 loc0 d:3[+0] Fseq[_s]
/--* t110 byref
+--* t204 ref
[000214] -A--G------- * STOREIND ref
( 17, 11) [000179] ------------ IL_OFFSET void IL offset: 0x20
N002 ( 3, 4) [000176] ------------ t176 = LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) <l:$202, c:$203>
/--* t176 ref this in rcx
N004 ( 17, 11) [000178] --CXG------- * CALL nullcheck void C.M $VN.Void
( 0, 0) [000052] ------------ IL_OFFSET void IL offset: 0x27
N001 ( 0, 0) [000051] ------------ RETURN void $3c0
-------------------------------------------------------------------------------------------------------------------
lowering call (before):
N003 ( 3, 10) [000003] ------------ t3 = CNS_INT(h) long 0x7ffc12345508 method $180
/--* t3 long arg0 in rcx
N005 ( 17, 16) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
objp:
======
args:
======
lowering arg : N001 ( 0, 0) [000208] ----------L- * ARGPLACE long $180
late:
======
lowering arg : N003 ( 3, 10) [000003] ------------ * CNS_INT(h) long 0x7ffc12345508 method $180
new node is : [000215] ------------ * PUTARG_REG long REG rcx
lowering call (after):
N003 ( 3, 10) [000003] ------------ t3 = CNS_INT(h) long 0x7ffc12345508 method $180
/--* t3 long
[000215] ------------ t215 = * PUTARG_REG long REG rcx
/--* t215 long arg0 in rcx
N005 ( 17, 16) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
Addressing mode:
Base
N001 ( 3, 4) [000191] D------N---- * LCL_FLD_ADDR byref V05 tmp4 [+0] Fseq[_s]
+ 0
New addressing mode node:
[000216] ------------ * LEA(b+0) byref
Lower of StoreInd didn't mark the node as self contained for reason: 4
N001 ( 3, 4) [000191] D------N---- t191 = LCL_FLD_ADDR byref V05 tmp4 [+0] Fseq[_s]
/--* t191 byref
[000216] ------------ t216 = * LEA(b+0) byref
N006 ( 3, 2) [000195] -------N---- t195 = LCL_VAR ref V14 tmp13 u:3 (last use) $200
/--* t216 byref
+--* t195 ref
[000210] -A---------- * STOREIND ref
No addressing mode:
N001 ( 3, 2) [000033] -------N---- * LCL_VAR_ADDR byref V05 tmp4
No addressing mode:
N004 ( 3, 2) [000103] D------N---- * LCL_VAR_ADDR byref V09 tmp8
Lower of StoreInd didn't mark the node as self contained for reason: 4
N001 ( 3, 2) [000033] -c-----N---- t33 = LCL_VAR_ADDR byref V05 tmp4
/--* t33 byref
N003 ( 6, 5) [000038] x----------- t38 = * IND ref <l:$340, c:$1c6>
N004 ( 3, 2) [000103] D------N---- t103 = LCL_VAR_ADDR byref V09 tmp8
/--* t103 byref
+--* t38 ref
[000211] -A---------- * STOREIND ref
No addressing mode:
N001 ( 3, 2) [000097] ------------ * LCL_VAR_ADDR byref V09 tmp8
No addressing mode:
N004 ( 3, 4) [000096] D------N---- * LCL_FLD_ADDR byref V06 tmp5 [+0] Fseq[_s]
Lower of StoreInd didn't mark the node as self contained for reason: 3
N001 ( 3, 2) [000097] -c---------- t97 = LCL_VAR_ADDR byref V09 tmp8
/--* t97 byref
N003 ( 6, 5) [000200] x----------- t200 = * IND ref <l:$341, c:$1c7>
N004 ( 3, 4) [000096] D------N---- t96 = LCL_FLD_ADDR byref V06 tmp5 [+0] Fseq[_s]
/--* t96 byref
+--* t200 ref
[000212] -A--G------- * STOREIND ref
No addressing mode:
N001 ( 3, 2) [000041] -------N---- * LCL_VAR_ADDR byref V06 tmp5
No addressing mode:
N004 ( 3, 2) [000117] D------N---- * LCL_VAR_ADDR byref V10 tmp9
Lower of StoreInd didn't mark the node as self contained for reason: 4
N001 ( 3, 2) [000041] -c-----N---- t41 = LCL_VAR_ADDR byref V06 tmp5
/--* t41 byref
N003 ( 6, 5) [000044] x----------- t44 = * IND ref <l:$342, c:$1c8>
N004 ( 3, 2) [000117] D------N---- t117 = LCL_VAR_ADDR byref V10 tmp9
/--* t117 byref
+--* t44 ref
[000213] -A---------- * STOREIND ref
No addressing mode:
N001 ( 3, 2) [000111] ------------ * LCL_VAR_ADDR byref V10 tmp9
No addressing mode:
N004 ( 3, 4) [000110] D------N---- * LCL_FLD_ADDR byref V00 loc0 d:3[+0] Fseq[_s]
Lower of StoreInd didn't mark the node as self contained for reason: 3
N001 ( 3, 2) [000111] -c---------- t111 = LCL_VAR_ADDR byref V10 tmp9
/--* t111 byref
N003 ( 6, 5) [000204] x----------- t204 = * IND ref <l:$343, c:$1c9>
N004 ( 3, 4) [000110] D------N---- t110 = LCL_FLD_ADDR byref V00 loc0 d:3[+0] Fseq[_s]
/--* t110 byref
+--* t204 ref
[000214] -A--G------- * STOREIND ref
lowering call (before):
N002 ( 3, 4) [000176] ------------ t176 = LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) <l:$202, c:$203>
/--* t176 ref this in rcx
N004 ( 17, 11) [000178] --CXG------- * CALL nullcheck void C.M $VN.Void
objp:
======
lowering arg : N001 ( 0, 0) [000205] ----------L- * ARGPLACE ref $1ca
args:
======
late:
======
lowering arg : N002 ( 3, 4) [000176] ------------ * LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) <l:$202, c:$203>
new node is : [000217] ------------ * PUTARG_REG ref REG rcx
lowering call (after):
N002 ( 3, 4) [000176] ------------ t176 = LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) <l:$202, c:$203>
/--* t176 ref
[000217] ------------ t217 = * PUTARG_REG ref REG rcx
/--* t217 ref this in rcx
N004 ( 17, 11) [000178] --CXG------- * CALL nullcheck void C.M $VN.Void
lowering GT_RETURN
N001 ( 0, 0) [000051] ------------ * RETURN void $3c0
============Lower has completed modifying nodes.
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj LIR
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
( 17, 16) [000007] ------------ IL_OFFSET void IL offset: 0x0
N003 ( 3, 10) [000003] ------------ t3 = CNS_INT(h) long 0x7ffc12345508 method $180
/--* t3 long
[000215] ------------ t215 = * PUTARG_REG long REG rcx
/--* t215 long arg0 in rcx
N005 ( 17, 16) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
/--* t4 ref
N007 ( 17, 16) [000006] DA---------- * STORE_LCL_VAR ref V02 tmp1 d:3
( 5, 4) [000064] ------------ IL_OFFSET void IL offset: 0x7
N001 ( 1, 1) [000011] ------------ t11 = LCL_VAR ref V02 tmp1 u:3 (last use) $200
/--* t11 ref
N003 ( 5, 4) [000063] DA---------- * STORE_LCL_VAR ref V11 tmp10 d:3
( 7, 5) [000078] ------------ IL_OFFSET void IL offset: 0xc
N001 ( 3, 2) [000182] -------N---- t182 = LCL_VAR ref V11 tmp10 u:3 (last use) $200
/--* t182 ref
N003 ( 7, 5) [000183] DA---------- * STORE_LCL_VAR ref V13 tmp12 d:3
( 7, 5) [000074] ------------ IL_OFFSET void IL offset: 0xc
N001 ( 3, 2) [000185] -------N---- t185 = LCL_VAR ref V13 tmp12 u:3 (last use) $200
/--* t185 ref
N003 ( 7, 5) [000186] DA---------- * STORE_LCL_VAR ref V12 tmp11 d:3
( 7, 5) [000092] ------------ IL_OFFSET void IL offset: 0x11
N001 ( 3, 2) [000188] -------N---- t188 = LCL_VAR ref V12 tmp11 u:3 (last use) $200
/--* t188 ref
N003 ( 7, 5) [000189] DA---------- * STORE_LCL_VAR ref V14 tmp13 d:3
( 10, 10) [000088] ------------ IL_OFFSET void IL offset: 0x11
N001 ( 3, 4) [000191] D------N---- t191 = LCL_FLD_ADDR byref V05 tmp4 [+0] Fseq[_s]
/--* t191 byref
[000216] -c---------- t216 = * LEA(b+0) byref
N006 ( 3, 2) [000195] -------N---- t195 = LCL_VAR ref V14 tmp13 u:3 (last use) $200
/--* t216 byref
+--* t195 ref
[000210] -A---------- * STOREIND ref
( 13, 11) [000106] ------------ IL_OFFSET void IL offset: 0x16
N001 ( 3, 2) [000033] -c-----N---- t33 = LCL_VAR_ADDR byref V05 tmp4
/--* t33 byref
N003 ( 6, 5) [000038] x----------- t38 = * IND ref <l:$340, c:$1c6>
N004 ( 3, 2) [000103] Dc-----N---- t103 = LCL_VAR_ADDR byref V09 tmp8
/--* t103 byref
+--* t38 ref
[000211] -A---------- * STOREIND ref
( 13, 13) [000102] ------------ IL_OFFSET void IL offset: 0x16
N001 ( 3, 2) [000097] -c---------- t97 = LCL_VAR_ADDR byref V09 tmp8
/--* t97 byref
N003 ( 6, 5) [000200] x----------- t200 = * IND ref <l:$341, c:$1c7>
N004 ( 3, 4) [000096] D------N---- t96 = LCL_FLD_ADDR byref V06 tmp5 [+0] Fseq[_s]
/--* t96 byref
+--* t200 ref
[000212] -A--G------- * STOREIND ref
( 13, 11) [000120] ------------ IL_OFFSET void IL offset: 0x1b
N001 ( 3, 2) [000041] -c-----N---- t41 = LCL_VAR_ADDR byref V06 tmp5
/--* t41 byref
N003 ( 6, 5) [000044] x----------- t44 = * IND ref <l:$342, c:$1c8>
N004 ( 3, 2) [000117] Dc-----N---- t117 = LCL_VAR_ADDR byref V10 tmp9
/--* t117 byref
+--* t44 ref
[000213] -A---------- * STOREIND ref
( 13, 13) [000116] ------------ IL_OFFSET void IL offset: 0x1b
N001 ( 3, 2) [000111] -c---------- t111 = LCL_VAR_ADDR byref V10 tmp9
/--* t111 byref
N003 ( 6, 5) [000204] x----------- t204 = * IND ref <l:$343, c:$1c9>
N004 ( 3, 4) [000110] D------N---- t110 = LCL_FLD_ADDR byref V00 loc0 d:3[+0] Fseq[_s]
/--* t110 byref
+--* t204 ref
[000214] -A--G------- * STOREIND ref
( 17, 11) [000179] ------------ IL_OFFSET void IL offset: 0x20
N002 ( 3, 4) [000176] ------------ t176 = LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) <l:$202, c:$203>
/--* t176 ref
[000217] ------------ t217 = * PUTARG_REG ref REG rcx
/--* t217 ref this in rcx
N004 ( 17, 11) [000178] --CXG------- * CALL nullcheck void C.M $VN.Void
( 0, 0) [000052] ------------ IL_OFFSET void IL offset: 0x27
N001 ( 0, 0) [000051] ------------ RETURN void $3c0
-------------------------------------------------------------------------------------------------------------------
*************** In fgLocalVarLiveness()
; Initial local variable assignments
;
; V00 loc0 struct ( 8) do-not-enreg[SF] ld-addr-op
; V01 OutArgs lclBlk (32)
; V02 tmp1 ref class-hnd exact
; V03 tmp2 struct ( 8)
; V04 tmp3 struct ( 8)
; V05 tmp4 struct ( 8) do-not-enreg[XSFB] addr-exposed
; V06 tmp5 struct ( 8) do-not-enreg[XSF] addr-exposed
; V07 tmp6 struct ( 8)
; V08 tmp7 struct ( 8)
; V09 tmp8 struct ( 8) do-not-enreg[XSF] addr-exposed
; V10 tmp9 struct ( 8) do-not-enreg[XSF] addr-exposed
; V11 tmp10 ref V03._c(offs=0x00) P-INDEP
; V12 tmp11 ref V04._s(offs=0x00) P-INDEP
; V13 tmp12 ref V07._c(offs=0x00) P-INDEP
; V14 tmp13 ref V08._s(offs=0x00) P-INDEP
In fgLocalVarLivenessInit, sorting locals
Local V00 should not be enregistered because: it is a struct
refCnt table for 'ViaStruct5':
V02 tmp1 [ ref]: refCnt = 2, refCntWtd = 4
V11 tmp10 [ ref]: refCnt = 2, refCntWtd = 2
V12 tmp11 [ ref]: refCnt = 2, refCntWtd = 2
V13 tmp12 [ ref]: refCnt = 2, refCntWtd = 2
V14 tmp13 [ ref]: refCnt = 2, refCntWtd = 2
V00 loc0 [struct]: refCnt = 2, refCntWtd = 2
V05 tmp4 [struct]: refCnt = 2, refCntWtd = 4
V06 tmp5 [struct]: refCnt = 2, refCntWtd = 4
V09 tmp8 [struct]: refCnt = 2, refCntWtd = 4
V10 tmp9 [struct]: refCnt = 2, refCntWtd = 4
V01 OutArgs [lclBlk]: refCnt = 1, refCntWtd = 1
*************** In fgPerBlockLocalVarLiveness()
BB01 USE(0)={ } + ByrefExposed + GcHeap
DEF(6)={V02 V11 V12 V13 V14 V00} + ByrefExposed* + GcHeap*
** Memory liveness computed, GcHeap states and ByrefExposed states diverge
*************** In fgInterBlockLocalVarLiveness()
BB liveness after fgLiveVarAnalysis():
BB01 IN (0)={} + ByrefExposed + GcHeap
OUT(0)={}
*************** In fgUpdateFlowGraph()
Before updating the flow graph:
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj LIR
--------------------------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
Liveness pass finished after lowering, IR:
lvasortagain = 0
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj LIR
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
( 17, 16) [000007] ------------ IL_OFFSET void IL offset: 0x0
N003 ( 3, 10) [000003] ------------ t3 = CNS_INT(h) long 0x7ffc12345508 method $180
/--* t3 long
[000215] ------------ t215 = * PUTARG_REG long REG rcx
/--* t215 long arg0 in rcx
N005 ( 17, 16) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
/--* t4 ref
N007 ( 17, 16) [000006] DA---------- * STORE_LCL_VAR ref V02 tmp1 d:3
( 5, 4) [000064] ------------ IL_OFFSET void IL offset: 0x7
N001 ( 1, 1) [000011] ------------ t11 = LCL_VAR ref V02 tmp1 u:3 (last use) $200
/--* t11 ref
N003 ( 5, 4) [000063] DA---------- * STORE_LCL_VAR ref V11 tmp10 d:3
( 7, 5) [000078] ------------ IL_OFFSET void IL offset: 0xc
N001 ( 3, 2) [000182] -------N---- t182 = LCL_VAR ref V11 tmp10 u:3 (last use) $200
/--* t182 ref
N003 ( 7, 5) [000183] DA---------- * STORE_LCL_VAR ref V13 tmp12 d:3
( 7, 5) [000074] ------------ IL_OFFSET void IL offset: 0xc
N001 ( 3, 2) [000185] -------N---- t185 = LCL_VAR ref V13 tmp12 u:3 (last use) $200
/--* t185 ref
N003 ( 7, 5) [000186] DA---------- * STORE_LCL_VAR ref V12 tmp11 d:3
( 7, 5) [000092] ------------ IL_OFFSET void IL offset: 0x11
N001 ( 3, 2) [000188] -------N---- t188 = LCL_VAR ref V12 tmp11 u:3 (last use) $200
/--* t188 ref
N003 ( 7, 5) [000189] DA---------- * STORE_LCL_VAR ref V14 tmp13 d:3
( 10, 10) [000088] ------------ IL_OFFSET void IL offset: 0x11
N001 ( 3, 4) [000191] D------N---- t191 = LCL_FLD_ADDR byref V05 tmp4 [+0] Fseq[_s]
/--* t191 byref
[000216] -c---------- t216 = * LEA(b+0) byref
N006 ( 3, 2) [000195] -------N---- t195 = LCL_VAR ref V14 tmp13 u:3 (last use) $200
/--* t216 byref
+--* t195 ref
[000210] -A---------- * STOREIND ref
( 13, 11) [000106] ------------ IL_OFFSET void IL offset: 0x16
N001 ( 3, 2) [000033] -c-----N---- t33 = LCL_VAR_ADDR byref V05 tmp4
/--* t33 byref
N003 ( 6, 5) [000038] x----------- t38 = * IND ref <l:$340, c:$1c6>
N004 ( 3, 2) [000103] Dc-----N---- t103 = LCL_VAR_ADDR byref V09 tmp8
/--* t103 byref
+--* t38 ref
[000211] -A---------- * STOREIND ref
( 13, 13) [000102] ------------ IL_OFFSET void IL offset: 0x16
N001 ( 3, 2) [000097] -c---------- t97 = LCL_VAR_ADDR byref V09 tmp8
/--* t97 byref
N003 ( 6, 5) [000200] x----------- t200 = * IND ref <l:$341, c:$1c7>
N004 ( 3, 4) [000096] D------N---- t96 = LCL_FLD_ADDR byref V06 tmp5 [+0] Fseq[_s]
/--* t96 byref
+--* t200 ref
[000212] -A--G------- * STOREIND ref
( 13, 11) [000120] ------------ IL_OFFSET void IL offset: 0x1b
N001 ( 3, 2) [000041] -c-----N---- t41 = LCL_VAR_ADDR byref V06 tmp5
/--* t41 byref
N003 ( 6, 5) [000044] x----------- t44 = * IND ref <l:$342, c:$1c8>
N004 ( 3, 2) [000117] Dc-----N---- t117 = LCL_VAR_ADDR byref V10 tmp9
/--* t117 byref
+--* t44 ref
[000213] -A---------- * STOREIND ref
( 13, 13) [000116] ------------ IL_OFFSET void IL offset: 0x1b
N001 ( 3, 2) [000111] -c---------- t111 = LCL_VAR_ADDR byref V10 tmp9
/--* t111 byref
N003 ( 6, 5) [000204] x----------- t204 = * IND ref <l:$343, c:$1c9>
N004 ( 3, 4) [000110] D------N---- t110 = LCL_FLD_ADDR byref V00 loc0 d:3[+0] Fseq[_s]
/--* t110 byref
+--* t204 ref
[000214] -A--G------- * STOREIND ref
( 17, 11) [000179] ------------ IL_OFFSET void IL offset: 0x20
N002 ( 3, 4) [000176] ------------ t176 = LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) <l:$202, c:$203>
/--* t176 ref
[000217] ------------ t217 = * PUTARG_REG ref REG rcx
/--* t217 ref this in rcx
N004 ( 17, 11) [000178] --CXG------- * CALL nullcheck void C.M $VN.Void
( 0, 0) [000052] ------------ IL_OFFSET void IL offset: 0x27
N001 ( 0, 0) [000051] ------------ RETURN void $3c0
-------------------------------------------------------------------------------------------------------------------
*************** Exiting Lowering
Trees after Lowering
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj LIR
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
( 17, 16) [000007] ------------ IL_OFFSET void IL offset: 0x0
N003 ( 3, 10) [000003] ------------ t3 = CNS_INT(h) long 0x7ffc12345508 method $180
/--* t3 long
[000215] ------------ t215 = * PUTARG_REG long REG rcx
/--* t215 long arg0 in rcx
N005 ( 17, 16) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
/--* t4 ref
N007 ( 17, 16) [000006] DA---------- * STORE_LCL_VAR ref V02 tmp1 d:3
( 5, 4) [000064] ------------ IL_OFFSET void IL offset: 0x7
N001 ( 1, 1) [000011] ------------ t11 = LCL_VAR ref V02 tmp1 u:3 (last use) $200
/--* t11 ref
N003 ( 5, 4) [000063] DA---------- * STORE_LCL_VAR ref V11 tmp10 d:3
( 7, 5) [000078] ------------ IL_OFFSET void IL offset: 0xc
N001 ( 3, 2) [000182] -------N---- t182 = LCL_VAR ref V11 tmp10 u:3 (last use) $200
/--* t182 ref
N003 ( 7, 5) [000183] DA---------- * STORE_LCL_VAR ref V13 tmp12 d:3
( 7, 5) [000074] ------------ IL_OFFSET void IL offset: 0xc
N001 ( 3, 2) [000185] -------N---- t185 = LCL_VAR ref V13 tmp12 u:3 (last use) $200
/--* t185 ref
N003 ( 7, 5) [000186] DA---------- * STORE_LCL_VAR ref V12 tmp11 d:3
( 7, 5) [000092] ------------ IL_OFFSET void IL offset: 0x11
N001 ( 3, 2) [000188] -------N---- t188 = LCL_VAR ref V12 tmp11 u:3 (last use) $200
/--* t188 ref
N003 ( 7, 5) [000189] DA---------- * STORE_LCL_VAR ref V14 tmp13 d:3
( 10, 10) [000088] ------------ IL_OFFSET void IL offset: 0x11
N001 ( 3, 4) [000191] D------N---- t191 = LCL_FLD_ADDR byref V05 tmp4 [+0] Fseq[_s]
/--* t191 byref
[000216] -c---------- t216 = * LEA(b+0) byref
N006 ( 3, 2) [000195] -------N---- t195 = LCL_VAR ref V14 tmp13 u:3 (last use) $200
/--* t216 byref
+--* t195 ref
[000210] -A---------- * STOREIND ref
( 13, 11) [000106] ------------ IL_OFFSET void IL offset: 0x16
N001 ( 3, 2) [000033] -c-----N---- t33 = LCL_VAR_ADDR byref V05 tmp4
/--* t33 byref
N003 ( 6, 5) [000038] x----------- t38 = * IND ref <l:$340, c:$1c6>
N004 ( 3, 2) [000103] Dc-----N---- t103 = LCL_VAR_ADDR byref V09 tmp8
/--* t103 byref
+--* t38 ref
[000211] -A---------- * STOREIND ref
( 13, 13) [000102] ------------ IL_OFFSET void IL offset: 0x16
N001 ( 3, 2) [000097] -c---------- t97 = LCL_VAR_ADDR byref V09 tmp8
/--* t97 byref
N003 ( 6, 5) [000200] x----------- t200 = * IND ref <l:$341, c:$1c7>
N004 ( 3, 4) [000096] D------N---- t96 = LCL_FLD_ADDR byref V06 tmp5 [+0] Fseq[_s]
/--* t96 byref
+--* t200 ref
[000212] -A--G------- * STOREIND ref
( 13, 11) [000120] ------------ IL_OFFSET void IL offset: 0x1b
N001 ( 3, 2) [000041] -c-----N---- t41 = LCL_VAR_ADDR byref V06 tmp5
/--* t41 byref
N003 ( 6, 5) [000044] x----------- t44 = * IND ref <l:$342, c:$1c8>
N004 ( 3, 2) [000117] Dc-----N---- t117 = LCL_VAR_ADDR byref V10 tmp9
/--* t117 byref
+--* t44 ref
[000213] -A---------- * STOREIND ref
( 13, 13) [000116] ------------ IL_OFFSET void IL offset: 0x1b
N001 ( 3, 2) [000111] -c---------- t111 = LCL_VAR_ADDR byref V10 tmp9
/--* t111 byref
N003 ( 6, 5) [000204] x----------- t204 = * IND ref <l:$343, c:$1c9>
N004 ( 3, 4) [000110] D------N---- t110 = LCL_FLD_ADDR byref V00 loc0 d:3[+0] Fseq[_s]
/--* t110 byref
+--* t204 ref
[000214] -A--G------- * STOREIND ref
( 17, 11) [000179] ------------ IL_OFFSET void IL offset: 0x20
N002 ( 3, 4) [000176] ------------ t176 = LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) <l:$202, c:$203>
/--* t176 ref
[000217] ------------ t217 = * PUTARG_REG ref REG rcx
/--* t217 ref this in rcx
N004 ( 17, 11) [000178] --CXG------- * CALL nullcheck void C.M $VN.Void
( 0, 0) [000052] ------------ IL_OFFSET void IL offset: 0x27
N001 ( 0, 0) [000051] ------------ RETURN void $3c0
-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
*************** In StackLevelSetter
Trees before StackLevelSetter
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj LIR
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
( 17, 16) [000007] ------------ IL_OFFSET void IL offset: 0x0
N003 ( 3, 10) [000003] ------------ t3 = CNS_INT(h) long 0x7ffc12345508 method $180
/--* t3 long
[000215] ------------ t215 = * PUTARG_REG long REG rcx
/--* t215 long arg0 in rcx
N005 ( 17, 16) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
/--* t4 ref
N007 ( 17, 16) [000006] DA---------- * STORE_LCL_VAR ref V02 tmp1 d:3
( 5, 4) [000064] ------------ IL_OFFSET void IL offset: 0x7
N001 ( 1, 1) [000011] ------------ t11 = LCL_VAR ref V02 tmp1 u:3 (last use) $200
/--* t11 ref
N003 ( 5, 4) [000063] DA---------- * STORE_LCL_VAR ref V11 tmp10 d:3
( 7, 5) [000078] ------------ IL_OFFSET void IL offset: 0xc
N001 ( 3, 2) [000182] -------N---- t182 = LCL_VAR ref V11 tmp10 u:3 (last use) $200
/--* t182 ref
N003 ( 7, 5) [000183] DA---------- * STORE_LCL_VAR ref V13 tmp12 d:3
( 7, 5) [000074] ------------ IL_OFFSET void IL offset: 0xc
N001 ( 3, 2) [000185] -------N---- t185 = LCL_VAR ref V13 tmp12 u:3 (last use) $200
/--* t185 ref
N003 ( 7, 5) [000186] DA---------- * STORE_LCL_VAR ref V12 tmp11 d:3
( 7, 5) [000092] ------------ IL_OFFSET void IL offset: 0x11
N001 ( 3, 2) [000188] -------N---- t188 = LCL_VAR ref V12 tmp11 u:3 (last use) $200
/--* t188 ref
N003 ( 7, 5) [000189] DA---------- * STORE_LCL_VAR ref V14 tmp13 d:3
( 10, 10) [000088] ------------ IL_OFFSET void IL offset: 0x11
N001 ( 3, 4) [000191] D------N---- t191 = LCL_FLD_ADDR byref V05 tmp4 [+0] Fseq[_s]
/--* t191 byref
[000216] -c---------- t216 = * LEA(b+0) byref
N006 ( 3, 2) [000195] -------N---- t195 = LCL_VAR ref V14 tmp13 u:3 (last use) $200
/--* t216 byref
+--* t195 ref
[000210] -A---------- * STOREIND ref
( 13, 11) [000106] ------------ IL_OFFSET void IL offset: 0x16
N001 ( 3, 2) [000033] -c-----N---- t33 = LCL_VAR_ADDR byref V05 tmp4
/--* t33 byref
N003 ( 6, 5) [000038] x----------- t38 = * IND ref <l:$340, c:$1c6>
N004 ( 3, 2) [000103] Dc-----N---- t103 = LCL_VAR_ADDR byref V09 tmp8
/--* t103 byref
+--* t38 ref
[000211] -A---------- * STOREIND ref
( 13, 13) [000102] ------------ IL_OFFSET void IL offset: 0x16
N001 ( 3, 2) [000097] -c---------- t97 = LCL_VAR_ADDR byref V09 tmp8
/--* t97 byref
N003 ( 6, 5) [000200] x----------- t200 = * IND ref <l:$341, c:$1c7>
N004 ( 3, 4) [000096] D------N---- t96 = LCL_FLD_ADDR byref V06 tmp5 [+0] Fseq[_s]
/--* t96 byref
+--* t200 ref
[000212] -A--G------- * STOREIND ref
( 13, 11) [000120] ------------ IL_OFFSET void IL offset: 0x1b
N001 ( 3, 2) [000041] -c-----N---- t41 = LCL_VAR_ADDR byref V06 tmp5
/--* t41 byref
N003 ( 6, 5) [000044] x----------- t44 = * IND ref <l:$342, c:$1c8>
N004 ( 3, 2) [000117] Dc-----N---- t117 = LCL_VAR_ADDR byref V10 tmp9
/--* t117 byref
+--* t44 ref
[000213] -A---------- * STOREIND ref
( 13, 13) [000116] ------------ IL_OFFSET void IL offset: 0x1b
N001 ( 3, 2) [000111] -c---------- t111 = LCL_VAR_ADDR byref V10 tmp9
/--* t111 byref
N003 ( 6, 5) [000204] x----------- t204 = * IND ref <l:$343, c:$1c9>
N004 ( 3, 4) [000110] D------N---- t110 = LCL_FLD_ADDR byref V00 loc0 d:3[+0] Fseq[_s]
/--* t110 byref
+--* t204 ref
[000214] -A--G------- * STOREIND ref
( 17, 11) [000179] ------------ IL_OFFSET void IL offset: 0x20
N002 ( 3, 4) [000176] ------------ t176 = LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) <l:$202, c:$203>
/--* t176 ref
[000217] ------------ t217 = * PUTARG_REG ref REG rcx
/--* t217 ref this in rcx
N004 ( 17, 11) [000178] --CXG------- * CALL nullcheck void C.M $VN.Void
( 0, 0) [000052] ------------ IL_OFFSET void IL offset: 0x27
N001 ( 0, 0) [000051] ------------ RETURN void $3c0
-------------------------------------------------------------------------------------------------------------------
*************** Exiting StackLevelSetter
Trees after StackLevelSetter
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj LIR
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
( 17, 16) [000007] ------------ IL_OFFSET void IL offset: 0x0
N003 ( 3, 10) [000003] ------------ t3 = CNS_INT(h) long 0x7ffc12345508 method $180
/--* t3 long
[000215] ------------ t215 = * PUTARG_REG long REG rcx
/--* t215 long arg0 in rcx
N005 ( 17, 16) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
/--* t4 ref
N007 ( 17, 16) [000006] DA---------- * STORE_LCL_VAR ref V02 tmp1 d:3
( 5, 4) [000064] ------------ IL_OFFSET void IL offset: 0x7
N001 ( 1, 1) [000011] ------------ t11 = LCL_VAR ref V02 tmp1 u:3 (last use) $200
/--* t11 ref
N003 ( 5, 4) [000063] DA---------- * STORE_LCL_VAR ref V11 tmp10 d:3
( 7, 5) [000078] ------------ IL_OFFSET void IL offset: 0xc
N001 ( 3, 2) [000182] -------N---- t182 = LCL_VAR ref V11 tmp10 u:3 (last use) $200
/--* t182 ref
N003 ( 7, 5) [000183] DA---------- * STORE_LCL_VAR ref V13 tmp12 d:3
( 7, 5) [000074] ------------ IL_OFFSET void IL offset: 0xc
N001 ( 3, 2) [000185] -------N---- t185 = LCL_VAR ref V13 tmp12 u:3 (last use) $200
/--* t185 ref
N003 ( 7, 5) [000186] DA---------- * STORE_LCL_VAR ref V12 tmp11 d:3
( 7, 5) [000092] ------------ IL_OFFSET void IL offset: 0x11
N001 ( 3, 2) [000188] -------N---- t188 = LCL_VAR ref V12 tmp11 u:3 (last use) $200
/--* t188 ref
N003 ( 7, 5) [000189] DA---------- * STORE_LCL_VAR ref V14 tmp13 d:3
( 10, 10) [000088] ------------ IL_OFFSET void IL offset: 0x11
N001 ( 3, 4) [000191] D------N---- t191 = LCL_FLD_ADDR byref V05 tmp4 [+0] Fseq[_s]
/--* t191 byref
[000216] -c---------- t216 = * LEA(b+0) byref
N006 ( 3, 2) [000195] -------N---- t195 = LCL_VAR ref V14 tmp13 u:3 (last use) $200
/--* t216 byref
+--* t195 ref
[000210] -A---------- * STOREIND ref
( 13, 11) [000106] ------------ IL_OFFSET void IL offset: 0x16
N001 ( 3, 2) [000033] -c-----N---- t33 = LCL_VAR_ADDR byref V05 tmp4
/--* t33 byref
N003 ( 6, 5) [000038] x----------- t38 = * IND ref <l:$340, c:$1c6>
N004 ( 3, 2) [000103] Dc-----N---- t103 = LCL_VAR_ADDR byref V09 tmp8
/--* t103 byref
+--* t38 ref
[000211] -A---------- * STOREIND ref
( 13, 13) [000102] ------------ IL_OFFSET void IL offset: 0x16
N001 ( 3, 2) [000097] -c---------- t97 = LCL_VAR_ADDR byref V09 tmp8
/--* t97 byref
N003 ( 6, 5) [000200] x----------- t200 = * IND ref <l:$341, c:$1c7>
N004 ( 3, 4) [000096] D------N---- t96 = LCL_FLD_ADDR byref V06 tmp5 [+0] Fseq[_s]
/--* t96 byref
+--* t200 ref
[000212] -A--G------- * STOREIND ref
( 13, 11) [000120] ------------ IL_OFFSET void IL offset: 0x1b
N001 ( 3, 2) [000041] -c-----N---- t41 = LCL_VAR_ADDR byref V06 tmp5
/--* t41 byref
N003 ( 6, 5) [000044] x----------- t44 = * IND ref <l:$342, c:$1c8>
N004 ( 3, 2) [000117] Dc-----N---- t117 = LCL_VAR_ADDR byref V10 tmp9
/--* t117 byref
+--* t44 ref
[000213] -A---------- * STOREIND ref
( 13, 13) [000116] ------------ IL_OFFSET void IL offset: 0x1b
N001 ( 3, 2) [000111] -c---------- t111 = LCL_VAR_ADDR byref V10 tmp9
/--* t111 byref
N003 ( 6, 5) [000204] x----------- t204 = * IND ref <l:$343, c:$1c9>
N004 ( 3, 4) [000110] D------N---- t110 = LCL_FLD_ADDR byref V00 loc0 d:3[+0] Fseq[_s]
/--* t110 byref
+--* t204 ref
[000214] -A--G------- * STOREIND ref
( 17, 11) [000179] ------------ IL_OFFSET void IL offset: 0x20
N002 ( 3, 4) [000176] ------------ t176 = LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] (last use) <l:$202, c:$203>
/--* t176 ref
[000217] ------------ t217 = * PUTARG_REG ref REG rcx
/--* t217 ref this in rcx
N004 ( 17, 11) [000178] --CXG------- * CALL nullcheck void C.M $VN.Void
( 0, 0) [000052] ------------ IL_OFFSET void IL offset: 0x27
N001 ( 0, 0) [000051] ------------ RETURN void $3c0
-------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
Clearing modified regs.
buildIntervals ========
-----------------
LIVENESS:
-----------------
BB01 use def in out
{}
{V00 V02 V11 V12 V13 V14}
{}
{}
Local V00 should not be enregistered because: it is a struct
Interval 0: RefPositions {} physReg:NA Preferences=[allInt]
Interval 1: RefPositions {} physReg:NA Preferences=[allInt]
Interval 2: RefPositions {} physReg:NA Preferences=[allInt]
Interval 3: RefPositions {} physReg:NA Preferences=[allInt]
Interval 4: RefPositions {} physReg:NA Preferences=[allInt]
FP callee save candidate vars: None
floatVarCount = 0; hasLoops = 0, singleExit = 1
TUPLE STYLE DUMP BEFORE LSRA
LSRA Block Sequence: BB01( 1 )
BB01 [000..028) (return), preds={} succs={}
=====
N000. IL_OFFSET IL offset: 0x0
N003. t3 = CNS_INT(h) 0x7ffc12345508 method
N000. t215 = PUTARG_REG; t3
N005. t4 = CALL help; t215
N007. V02(t6); t4
N000. IL_OFFSET IL offset: 0x7
N001. V02(t11*)
N003. V11(t63); t11*
N000. IL_OFFSET IL offset: 0xc
N001. V11(t182*)
N003. V13(t183); t182*
N000. IL_OFFSET IL offset: 0xc
N001. V13(t185*)
N003. V12(t186); t185*
N000. IL_OFFSET IL offset: 0x11
N001. V12(t188*)
N003. V14(t189); t188*
N000. IL_OFFSET IL offset: 0x11
N001. t191 = LCL_FLD_ADDR V05 tmp4 [+0] Fseq[_s]
N000. t216 = LEA(b+0) ; t191
N006. V14(t195*)
N000. STOREIND ; t216,t195*
N000. IL_OFFSET IL offset: 0x16
N001. LCL_VAR_ADDR V05 tmp4
N003. t38 = IND
N004. LCL_VAR_ADDR V09 tmp8
N000. STOREIND ; t38
N000. IL_OFFSET IL offset: 0x16
N001. LCL_VAR_ADDR V09 tmp8
N003. t200 = IND
N004. t96 = LCL_FLD_ADDR V06 tmp5 [+0] Fseq[_s]
N000. STOREIND ; t96,t200
N000. IL_OFFSET IL offset: 0x1b
N001. LCL_VAR_ADDR V06 tmp5
N003. t44 = IND
N004. LCL_VAR_ADDR V10 tmp9
N000. STOREIND ; t44
N000. IL_OFFSET IL offset: 0x1b
N001. LCL_VAR_ADDR V10 tmp9
N003. t204 = IND
N004. t110 = LCL_FLD_ADDR V00 loc0 d:3[+0] Fseq[_s]
N000. STOREIND ; t110,t204
N000. IL_OFFSET IL offset: 0x20
N002. t176* = V00 MEM
N000. t217 = PUTARG_REG; t176*
N004. CALL nullcheck; t217
N000. IL_OFFSET IL offset: 0x27
N001. RETURN
buildIntervals second part ========
NEW BLOCK BB01
<RefPosition #0 @1 RefTypeBB BB01 regmask=[] minReg=1>
DefList: { }
N003 ( 17, 16) [000007] ------------ * IL_OFFSET void IL offset: 0x0 REG NA
+<TreeNodeInfo 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=0
DefList: { }
N005 ( 3, 10) [000003] ------------ * CNS_INT(h) long 0x7ffc12345508 method REG NA $180
Interval 5: RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #1 @6 RefTypeDef <Ivl:5> CNS_INT BB01 regmask=[allInt] minReg=1>
+<TreeNodeInfo 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=1
DefList: { N005.t3. CNS_INT }
N007 (???,???) [000215] ------------ * PUTARG_REG long REG rcx
<RefPosition #2 @7 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #3 @7 RefTypeUse <Ivl:5> BB01 regmask=[rcx] minReg=1 last fixed>
Interval 6: RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #4 @8 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #5 @8 RefTypeDef <Ivl:6> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed>
+<TreeNodeInfo 1=1 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 1 produce=1
DefList: { N007.t215. PUTARG_REG }
N009 ( 17, 16) [000004] --C--------- * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
<RefPosition #6 @9 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #7 @9 RefTypeUse <Ivl:6> BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #8 @10 RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1>
<RefPosition #9 @10 RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #10 @10 RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1>
<RefPosition #11 @10 RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1>
<RefPosition #12 @10 RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1>
<RefPosition #13 @10 RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1>
<RefPosition #14 @10 RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1>
Interval 7: RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #15 @10 RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1>
<RefPosition #16 @10 RefTypeDef <Ivl:7> CALL BB01 regmask=[rax] minReg=1 fixed>
+<TreeNodeInfo 1=1 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 1 produce=1
DefList: { N009.t4. CALL }
N011 ( 17, 16) [000006] DA---------- * STORE_LCL_VAR ref V02 tmp1 d:3 NA REG NA
<RefPosition #17 @11 RefTypeUse <Ivl:7> BB01 regmask=[allInt] minReg=1 last>
Assigning related <L0> to <I7>
<RefPosition #18 @12 RefTypeDef <Ivl:0 V02> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 last>
+<TreeNodeInfo 0=1 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 1 produce=0
DefList: { }
N013 ( 5, 4) [000064] ------------ * IL_OFFSET void IL offset: 0x7 REG NA
+<TreeNodeInfo 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=0
DefList: { }
N015 ( 1, 1) [000011] ------------ * LCL_VAR ref V02 tmp1 u:3 NA (last use) REG NA $200
+<TreeNodeInfo 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=1
DefList: { }
N017 ( 5, 4) [000063] DA---------- * STORE_LCL_VAR ref V11 tmp10 d:3 NA REG NA
<RefPosition #19 @17 RefTypeUse <Ivl:0 V02> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
Assigning related <L1> to <L0>
<RefPosition #20 @18 RefTypeDef <Ivl:1 V11> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 last>
+<TreeNodeInfo 0=1 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 1 produce=0
DefList: { }
N019 ( 7, 5) [000078] ------------ * IL_OFFSET void IL offset: 0xc REG NA
+<TreeNodeInfo 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=0
DefList: { }
N021 ( 3, 2) [000182] -------N---- * LCL_VAR ref V11 tmp10 u:3 NA (last use) REG NA $200
+<TreeNodeInfo 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=1
DefList: { }
N023 ( 7, 5) [000183] DA---------- * STORE_LCL_VAR ref V13 tmp12 d:3 NA REG NA
<RefPosition #21 @23 RefTypeUse <Ivl:1 V11> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
Assigning related <L3> to <L1>
<RefPosition #22 @24 RefTypeDef <Ivl:3 V13> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 last>
+<TreeNodeInfo 0=1 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 1 produce=0
DefList: { }
N025 ( 7, 5) [000074] ------------ * IL_OFFSET void IL offset: 0xc REG NA
+<TreeNodeInfo 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=0
DefList: { }
N027 ( 3, 2) [000185] -------N---- * LCL_VAR ref V13 tmp12 u:3 NA (last use) REG NA $200
+<TreeNodeInfo 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=1
DefList: { }
N029 ( 7, 5) [000186] DA---------- * STORE_LCL_VAR ref V12 tmp11 d:3 NA REG NA
<RefPosition #23 @29 RefTypeUse <Ivl:3 V13> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
Assigning related <L2> to <L3>
<RefPosition #24 @30 RefTypeDef <Ivl:2 V12> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 last>
+<TreeNodeInfo 0=1 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 1 produce=0
DefList: { }
N031 ( 7, 5) [000092] ------------ * IL_OFFSET void IL offset: 0x11 REG NA
+<TreeNodeInfo 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=0
DefList: { }
N033 ( 3, 2) [000188] -------N---- * LCL_VAR ref V12 tmp11 u:3 NA (last use) REG NA $200
+<TreeNodeInfo 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=1
DefList: { }
N035 ( 7, 5) [000189] DA---------- * STORE_LCL_VAR ref V14 tmp13 d:3 NA REG NA
<RefPosition #25 @35 RefTypeUse <Ivl:2 V12> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
Assigning related <L4> to <L2>
<RefPosition #26 @36 RefTypeDef <Ivl:4 V14> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 last>
+<TreeNodeInfo 0=1 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 1 produce=0
DefList: { }
N037 ( 10, 10) [000088] ------------ * IL_OFFSET void IL offset: 0x11 REG NA
+<TreeNodeInfo 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=0
DefList: { }
N039 ( 3, 4) [000191] D------N---- * LCL_FLD_ADDR byref V05 tmp4 [+0] Fseq[_s] NA REG NA
Interval 8: RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #27 @40 RefTypeDef <Ivl:8> LCL_FLD_ADDR BB01 regmask=[allInt] minReg=1>
+<TreeNodeInfo 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=1
DefList: { N039.t191. LCL_FLD_ADDR }
N041 (???,???) [000216] -c---------- * LEA(b+0) byref REG NA
Contained
DefList: { N039.t191. LCL_FLD_ADDR }
N043 ( 3, 2) [000195] -------N---- * LCL_VAR ref V14 tmp13 u:3 NA (last use) REG NA $200
+<TreeNodeInfo 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=1
DefList: { N039.t191. LCL_FLD_ADDR }
N045 (???,???) [000210] -A---------- * STOREIND ref REG NA
<RefPosition #28 @45 RefTypeUse <Ivl:8> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #29 @45 RefTypeUse <Ivl:4 V14> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
+<TreeNodeInfo 0=2 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 2 produce=0
DefList: { }
N047 ( 13, 11) [000106] ------------ * IL_OFFSET void IL offset: 0x16 REG NA
+<TreeNodeInfo 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=0
DefList: { }
N049 ( 3, 2) [000033] -c-----N---- * LCL_VAR_ADDR byref V05 tmp4 NA REG NA
Contained
DefList: { }
N051 ( 6, 5) [000038] x----------- * IND ref REG NA <l:$340, c:$1c6>
Interval 9: RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #30 @52 RefTypeDef <Ivl:9> IND BB01 regmask=[allInt] minReg=1>
+<TreeNodeInfo 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=1
DefList: { N051.t38. IND }
N053 ( 3, 2) [000103] Dc-----N---- * LCL_VAR_ADDR byref V09 tmp8 NA REG NA
Contained
DefList: { N051.t38. IND }
N055 (???,???) [000211] -A---------- * STOREIND ref REG NA
<RefPosition #31 @55 RefTypeUse <Ivl:9> BB01 regmask=[allInt] minReg=1 last>
+<TreeNodeInfo 0=1 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 1 produce=0
DefList: { }
N057 ( 13, 13) [000102] ------------ * IL_OFFSET void IL offset: 0x16 REG NA
+<TreeNodeInfo 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=0
DefList: { }
N059 ( 3, 2) [000097] -c---------- * LCL_VAR_ADDR byref V09 tmp8 NA REG NA
Contained
DefList: { }
N061 ( 6, 5) [000200] x----------- * IND ref REG NA <l:$341, c:$1c7>
Interval 10: RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #32 @62 RefTypeDef <Ivl:10> IND BB01 regmask=[allInt] minReg=1>
+<TreeNodeInfo 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=1
DefList: { N061.t200. IND }
N063 ( 3, 4) [000096] D------N---- * LCL_FLD_ADDR byref V06 tmp5 [+0] Fseq[_s] NA REG NA
Interval 11: RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #33 @64 RefTypeDef <Ivl:11> LCL_FLD_ADDR BB01 regmask=[allInt] minReg=1>
+<TreeNodeInfo 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=1
DefList: { N061.t200. IND; N063.t96. LCL_FLD_ADDR }
N065 (???,???) [000212] -A--G------- * STOREIND ref REG NA
<RefPosition #34 @65 RefTypeUse <Ivl:11> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #35 @65 RefTypeUse <Ivl:10> BB01 regmask=[allInt] minReg=1 last>
+<TreeNodeInfo 0=2 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 2 produce=0
DefList: { }
N067 ( 13, 11) [000120] ------------ * IL_OFFSET void IL offset: 0x1b REG NA
+<TreeNodeInfo 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=0
DefList: { }
N069 ( 3, 2) [000041] -c-----N---- * LCL_VAR_ADDR byref V06 tmp5 NA REG NA
Contained
DefList: { }
N071 ( 6, 5) [000044] x----------- * IND ref REG NA <l:$342, c:$1c8>
Interval 12: RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #36 @72 RefTypeDef <Ivl:12> IND BB01 regmask=[allInt] minReg=1>
+<TreeNodeInfo 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=1
DefList: { N071.t44. IND }
N073 ( 3, 2) [000117] Dc-----N---- * LCL_VAR_ADDR byref V10 tmp9 NA REG NA
Contained
DefList: { N071.t44. IND }
N075 (???,???) [000213] -A---------- * STOREIND ref REG NA
<RefPosition #37 @75 RefTypeUse <Ivl:12> BB01 regmask=[allInt] minReg=1 last>
+<TreeNodeInfo 0=1 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 1 produce=0
DefList: { }
N077 ( 13, 13) [000116] ------------ * IL_OFFSET void IL offset: 0x1b REG NA
+<TreeNodeInfo 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=0
DefList: { }
N079 ( 3, 2) [000111] -c---------- * LCL_VAR_ADDR byref V10 tmp9 NA REG NA
Contained
DefList: { }
N081 ( 6, 5) [000204] x----------- * IND ref REG NA <l:$343, c:$1c9>
Interval 13: RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #38 @82 RefTypeDef <Ivl:13> IND BB01 regmask=[allInt] minReg=1>
+<TreeNodeInfo 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=1
DefList: { N081.t204. IND }
N083 ( 3, 4) [000110] D------N---- * LCL_FLD_ADDR byref V00 loc0 d:3[+0] Fseq[_s] NA REG NA
Interval 14: RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #39 @84 RefTypeDef <Ivl:14> LCL_FLD_ADDR BB01 regmask=[allInt] minReg=1>
+<TreeNodeInfo 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=1
DefList: { N081.t204. IND; N083.t110. LCL_FLD_ADDR }
N085 (???,???) [000214] -A--G------- * STOREIND ref REG NA
<RefPosition #40 @85 RefTypeUse <Ivl:14> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #41 @85 RefTypeUse <Ivl:13> BB01 regmask=[allInt] minReg=1 last>
+<TreeNodeInfo 0=2 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 2 produce=0
DefList: { }
N087 ( 17, 11) [000179] ------------ * IL_OFFSET void IL offset: 0x20 REG NA
+<TreeNodeInfo 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=0
DefList: { }
N089 ( 3, 4) [000176] ------------ * LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] NA (last use) REG NA <l:$202, c:$203>
Interval 15: RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #42 @90 RefTypeDef <Ivl:15> LCL_FLD BB01 regmask=[allInt] minReg=1>
+<TreeNodeInfo 1=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=1
DefList: { N089.t176. LCL_FLD }
N091 (???,???) [000217] ------------ * PUTARG_REG ref REG rcx
<RefPosition #43 @91 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #44 @91 RefTypeUse <Ivl:15> BB01 regmask=[rcx] minReg=1 last fixed>
Interval 16: RefPositions {} physReg:NA Preferences=[allInt]
<RefPosition #45 @92 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #46 @92 RefTypeDef <Ivl:16> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed>
+<TreeNodeInfo 1=1 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 1 produce=1
DefList: { N091.t217. PUTARG_REG }
N093 ( 17, 11) [000178] --CXG------- * CALL nullcheck void C.M $VN.Void
<RefPosition #47 @93 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #48 @93 RefTypeUse <Ivl:16> BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #49 @94 RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1>
<RefPosition #50 @94 RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #51 @94 RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1>
<RefPosition #52 @94 RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1>
<RefPosition #53 @94 RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1>
<RefPosition #54 @94 RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1>
<RefPosition #55 @94 RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1>
+<TreeNodeInfo 0=1 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 1 produce=0
DefList: { }
N095 ( 0, 0) [000052] ------------ * IL_OFFSET void IL offset: 0x27 REG NA
+<TreeNodeInfo 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=0
DefList: { }
N097 ( 0, 0) [000051] ------------ * RETURN void REG NA $3c0
+<TreeNodeInfo 0=0 0i 0f src=[allInt] int=[allInt] dst=[allInt] I>[--]
consume= 0 produce=0
CHECKING LAST USES for block 1, liveout={}
==============================
use: {}
def: {V00 V02 V11 V12 V13 V14}
Linear scan intervals BEFORE VALIDATING INTERVALS:
Interval 0: (V02) RefPositions {#18@12 #19@17} physReg:NA Preferences=[allInt] RelatedInterval <L1>[0000024E3FF0E908]
Interval 1: (V11) (struct) RefPositions {#20@18 #21@23} physReg:NA Preferences=[allInt] RelatedInterval <L3>[0000024E3FF0E9B8]
Interval 2: (V12) (struct) RefPositions {#24@30 #25@35} physReg:NA Preferences=[allInt] RelatedInterval <L4>[0000024E3FF0EA10]
Interval 3: (V13) (struct) RefPositions {#22@24 #23@29} physReg:NA Preferences=[allInt] RelatedInterval <L2>[0000024E3FF0E960]
Interval 4: (V14) (struct) RefPositions {#26@36 #29@45} physReg:NA Preferences=[allInt]
Interval 5: (constant) RefPositions {#1@6 #3@7} physReg:NA Preferences=[rcx]
Interval 6: RefPositions {#5@8 #7@9} physReg:NA Preferences=[rcx]
Interval 7: RefPositions {#16@10 #17@11} physReg:NA Preferences=[rax] RelatedInterval <L0>[0000024E3FF0E8B0]
Interval 8: RefPositions {#27@40 #28@45} physReg:NA Preferences=[allInt]
Interval 9: RefPositions {#30@52 #31@55} physReg:NA Preferences=[allInt]
Interval 10: RefPositions {#32@62 #35@65} physReg:NA Preferences=[allInt]
Interval 11: RefPositions {#33@64 #34@65} physReg:NA Preferences=[allInt]
Interval 12: RefPositions {#36@72 #37@75} physReg:NA Preferences=[allInt]
Interval 13: RefPositions {#38@82 #41@85} physReg:NA Preferences=[allInt]
Interval 14: RefPositions {#39@84 #40@85} physReg:NA Preferences=[allInt]
Interval 15: RefPositions {#42@90 #44@91} physReg:NA Preferences=[rcx]
Interval 16: RefPositions {#46@92 #48@93} physReg:NA Preferences=[rcx]
------------
REFPOSITIONS BEFORE VALIDATING INTERVALS:
------------
<RefPosition #0 @1 RefTypeBB BB01 regmask=[] minReg=1>
<RefPosition #1 @6 RefTypeDef <Ivl:5> CNS_INT BB01 regmask=[rcx] minReg=1>
<RefPosition #2 @7 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #3 @7 RefTypeUse <Ivl:5> BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #4 @8 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #5 @8 RefTypeDef <Ivl:6> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed>
<RefPosition #6 @9 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #7 @9 RefTypeUse <Ivl:6> BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #8 @10 RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last>
<RefPosition #9 @10 RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last>
<RefPosition #10 @10 RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last>
<RefPosition #11 @10 RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last>
<RefPosition #12 @10 RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last>
<RefPosition #13 @10 RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last>
<RefPosition #14 @10 RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last>
<RefPosition #15 @10 RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1>
<RefPosition #16 @10 RefTypeDef <Ivl:7> CALL BB01 regmask=[rax] minReg=1 fixed>
<RefPosition #17 @11 RefTypeUse <Ivl:7> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #18 @12 RefTypeDef <Ivl:0 V02> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #19 @17 RefTypeUse <Ivl:0 V02> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
<RefPosition #20 @18 RefTypeDef <Ivl:1 V11> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #21 @23 RefTypeUse <Ivl:1 V11> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
<RefPosition #22 @24 RefTypeDef <Ivl:3 V13> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #23 @29 RefTypeUse <Ivl:3 V13> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
<RefPosition #24 @30 RefTypeDef <Ivl:2 V12> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #25 @35 RefTypeUse <Ivl:2 V12> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
<RefPosition #26 @36 RefTypeDef <Ivl:4 V14> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #27 @40 RefTypeDef <Ivl:8> LCL_FLD_ADDR BB01 regmask=[allInt] minReg=1>
<RefPosition #28 @45 RefTypeUse <Ivl:8> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #29 @45 RefTypeUse <Ivl:4 V14> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
<RefPosition #30 @52 RefTypeDef <Ivl:9> IND BB01 regmask=[allInt] minReg=1>
<RefPosition #31 @55 RefTypeUse <Ivl:9> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #32 @62 RefTypeDef <Ivl:10> IND BB01 regmask=[allInt] minReg=1>
<RefPosition #33 @64 RefTypeDef <Ivl:11> LCL_FLD_ADDR BB01 regmask=[allInt] minReg=1>
<RefPosition #34 @65 RefTypeUse <Ivl:11> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #35 @65 RefTypeUse <Ivl:10> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #36 @72 RefTypeDef <Ivl:12> IND BB01 regmask=[allInt] minReg=1>
<RefPosition #37 @75 RefTypeUse <Ivl:12> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #38 @82 RefTypeDef <Ivl:13> IND BB01 regmask=[allInt] minReg=1>
<RefPosition #39 @84 RefTypeDef <Ivl:14> LCL_FLD_ADDR BB01 regmask=[allInt] minReg=1>
<RefPosition #40 @85 RefTypeUse <Ivl:14> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #41 @85 RefTypeUse <Ivl:13> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #42 @90 RefTypeDef <Ivl:15> LCL_FLD BB01 regmask=[rcx] minReg=1>
<RefPosition #43 @91 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #44 @91 RefTypeUse <Ivl:15> BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #45 @92 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #46 @92 RefTypeDef <Ivl:16> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed>
<RefPosition #47 @93 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #48 @93 RefTypeUse <Ivl:16> BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #49 @94 RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last>
<RefPosition #50 @94 RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last>
<RefPosition #51 @94 RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last>
<RefPosition #52 @94 RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last>
<RefPosition #53 @94 RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last>
<RefPosition #54 @94 RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last>
<RefPosition #55 @94 RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last>
-----------------
<RefPosition #18 @12 RefTypeDef <Ivl:0 V02> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #19 @17 RefTypeUse <Ivl:0 V02> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
-----------------
<RefPosition #20 @18 RefTypeDef <Ivl:1 V11> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #21 @23 RefTypeUse <Ivl:1 V11> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
-----------------
<RefPosition #24 @30 RefTypeDef <Ivl:2 V12> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #25 @35 RefTypeUse <Ivl:2 V12> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
-----------------
<RefPosition #22 @24 RefTypeDef <Ivl:3 V13> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #23 @29 RefTypeUse <Ivl:3 V13> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
-----------------
<RefPosition #26 @36 RefTypeDef <Ivl:4 V14> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #29 @45 RefTypeUse <Ivl:4 V14> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
TUPLE STYLE DUMP WITH REF POSITIONS
Incoming Parameters:
BB01 [000..028) (return), preds={} succs={}
=====
N003. IL_OFFSET IL offset: 0x0 REG NA
N005. CNS_INT(h) 0x7ffc12345508 method REG NA
Def:<I5>(#1)
N007. PUTARG_REG
Use:<I5>(#3) Fixed:rcx(#2) *
Def:<I6>(#5) rcx
N009. CALL help
Use:<I6>(#7) Fixed:rcx(#6) *
Kill: rax rcx rdx r8 r9 r10 r11
Def:<I7>(#16) rax Pref:<L0>
N011. V02(L0)
Use:<I7>(#17) *
Def:<L0>(#18) Pref:<L1>
N013. IL_OFFSET IL offset: 0x7 REG NA
N015. V02(L0)
N017. V11(L1)
Use:<L0>(#19) *
Def:<L1>(#20) Pref:<L3>
N019. IL_OFFSET IL offset: 0xc REG NA
N021. V11(L1)
N023. V13(L3)
Use:<L1>(#21) *
Def:<L3>(#22) Pref:<L2>
N025. IL_OFFSET IL offset: 0xc REG NA
N027. V13(L3)
N029. V12(L2)
Use:<L3>(#23) *
Def:<L2>(#24) Pref:<L4>
N031. IL_OFFSET IL offset: 0x11 REG NA
N033. V12(L2)
N035. V14(L4)
Use:<L2>(#25) *
Def:<L4>(#26)
N037. IL_OFFSET IL offset: 0x11 REG NA
N039. LCL_FLD_ADDR V05 tmp4 [+0] Fseq[_s] NA REG NA
Def:<I8>(#27)
N041. LEA(b+0)
N043. V14(L4)
N045. STOREIND
Use:<I8>(#28) *
Use:<L4>(#29) *
N047. IL_OFFSET IL offset: 0x16 REG NA
N049. LCL_VAR_ADDR V05 tmp4 NA REG NA
N051. IND
Def:<I9>(#30)
N053. LCL_VAR_ADDR V09 tmp8 NA REG NA
N055. STOREIND
Use:<I9>(#31) *
N057. IL_OFFSET IL offset: 0x16 REG NA
N059. LCL_VAR_ADDR V09 tmp8 NA REG NA
N061. IND
Def:<I10>(#32)
N063. LCL_FLD_ADDR V06 tmp5 [+0] Fseq[_s] NA REG NA
Def:<I11>(#33)
N065. STOREIND
Use:<I11>(#34) *
Use:<I10>(#35) *
N067. IL_OFFSET IL offset: 0x1b REG NA
N069. LCL_VAR_ADDR V06 tmp5 NA REG NA
N071. IND
Def:<I12>(#36)
N073. LCL_VAR_ADDR V10 tmp9 NA REG NA
N075. STOREIND
Use:<I12>(#37) *
N077. IL_OFFSET IL offset: 0x1b REG NA
N079. LCL_VAR_ADDR V10 tmp9 NA REG NA
N081. IND
Def:<I13>(#38)
N083. LCL_FLD_ADDR V00 loc0 d:3[+0] Fseq[_s] NA REG NA
Def:<I14>(#39)
N085. STOREIND
Use:<I14>(#40) *
Use:<I13>(#41) *
N087. IL_OFFSET IL offset: 0x20 REG NA
N089. V00 MEM
Def:<I15>(#42)
N091. PUTARG_REG
Use:<I15>(#44) Fixed:rcx(#43) *
Def:<I16>(#46) rcx
N093. CALL nullcheck
Use:<I16>(#48) Fixed:rcx(#47) *
Kill: rax rcx rdx r8 r9 r10 r11
N095. IL_OFFSET IL offset: 0x27 REG NA
N097. RETURN
Linear scan intervals after buildIntervals:
Interval 0: (V02) RefPositions {#18@12 #19@17} physReg:NA Preferences=[allInt] RelatedInterval <L1>[0000024E3FF0E908]
Interval 1: (V11) (struct) RefPositions {#20@18 #21@23} physReg:NA Preferences=[allInt] RelatedInterval <L3>[0000024E3FF0E9B8]
Interval 2: (V12) (struct) RefPositions {#24@30 #25@35} physReg:NA Preferences=[allInt] RelatedInterval <L4>[0000024E3FF0EA10]
Interval 3: (V13) (struct) RefPositions {#22@24 #23@29} physReg:NA Preferences=[allInt] RelatedInterval <L2>[0000024E3FF0E960]
Interval 4: (V14) (struct) RefPositions {#26@36 #29@45} physReg:NA Preferences=[allInt]
Interval 5: (constant) RefPositions {#1@6 #3@7} physReg:NA Preferences=[rcx]
Interval 6: RefPositions {#5@8 #7@9} physReg:NA Preferences=[rcx]
Interval 7: RefPositions {#16@10 #17@11} physReg:NA Preferences=[rax] RelatedInterval <L0>[0000024E3FF0E8B0]
Interval 8: RefPositions {#27@40 #28@45} physReg:NA Preferences=[allInt]
Interval 9: RefPositions {#30@52 #31@55} physReg:NA Preferences=[allInt]
Interval 10: RefPositions {#32@62 #35@65} physReg:NA Preferences=[allInt]
Interval 11: RefPositions {#33@64 #34@65} physReg:NA Preferences=[allInt]
Interval 12: RefPositions {#36@72 #37@75} physReg:NA Preferences=[allInt]
Interval 13: RefPositions {#38@82 #41@85} physReg:NA Preferences=[allInt]
Interval 14: RefPositions {#39@84 #40@85} physReg:NA Preferences=[allInt]
Interval 15: RefPositions {#42@90 #44@91} physReg:NA Preferences=[rcx]
Interval 16: RefPositions {#46@92 #48@93} physReg:NA Preferences=[rcx]
*************** In LinearScan::allocateRegisters()
Linear scan intervals before allocateRegisters:
Interval 0: (V02) RefPositions {#18@12 #19@17} physReg:NA Preferences=[allInt] RelatedInterval <L1>[0000024E3FF0E908]
Interval 1: (V11) (struct) RefPositions {#20@18 #21@23} physReg:NA Preferences=[allInt] RelatedInterval <L3>[0000024E3FF0E9B8]
Interval 2: (V12) (struct) RefPositions {#24@30 #25@35} physReg:NA Preferences=[allInt] RelatedInterval <L4>[0000024E3FF0EA10]
Interval 3: (V13) (struct) RefPositions {#22@24 #23@29} physReg:NA Preferences=[allInt] RelatedInterval <L2>[0000024E3FF0E960]
Interval 4: (V14) (struct) RefPositions {#26@36 #29@45} physReg:NA Preferences=[allInt]
Interval 5: (constant) RefPositions {#1@6 #3@7} physReg:NA Preferences=[rcx]
Interval 6: RefPositions {#5@8 #7@9} physReg:NA Preferences=[rcx]
Interval 7: RefPositions {#16@10 #17@11} physReg:NA Preferences=[rax] RelatedInterval <L0>[0000024E3FF0E8B0]
Interval 8: RefPositions {#27@40 #28@45} physReg:NA Preferences=[allInt]
Interval 9: RefPositions {#30@52 #31@55} physReg:NA Preferences=[allInt]
Interval 10: RefPositions {#32@62 #35@65} physReg:NA Preferences=[allInt]
Interval 11: RefPositions {#33@64 #34@65} physReg:NA Preferences=[allInt]
Interval 12: RefPositions {#36@72 #37@75} physReg:NA Preferences=[allInt]
Interval 13: RefPositions {#38@82 #41@85} physReg:NA Preferences=[allInt]
Interval 14: RefPositions {#39@84 #40@85} physReg:NA Preferences=[allInt]
Interval 15: RefPositions {#42@90 #44@91} physReg:NA Preferences=[rcx]
Interval 16: RefPositions {#46@92 #48@93} physReg:NA Preferences=[rcx]
------------
REFPOSITIONS BEFORE ALLOCATION:
------------
<RefPosition #0 @1 RefTypeBB BB01 regmask=[] minReg=1>
<RefPosition #1 @6 RefTypeDef <Ivl:5> CNS_INT BB01 regmask=[rcx] minReg=1>
<RefPosition #2 @7 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #3 @7 RefTypeUse <Ivl:5> BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #4 @8 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #5 @8 RefTypeDef <Ivl:6> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed>
<RefPosition #6 @9 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #7 @9 RefTypeUse <Ivl:6> BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #8 @10 RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last>
<RefPosition #9 @10 RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last>
<RefPosition #10 @10 RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last>
<RefPosition #11 @10 RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last>
<RefPosition #12 @10 RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last>
<RefPosition #13 @10 RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last>
<RefPosition #14 @10 RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last>
<RefPosition #15 @10 RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1>
<RefPosition #16 @10 RefTypeDef <Ivl:7> CALL BB01 regmask=[rax] minReg=1 fixed>
<RefPosition #17 @11 RefTypeUse <Ivl:7> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #18 @12 RefTypeDef <Ivl:0 V02> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #19 @17 RefTypeUse <Ivl:0 V02> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
<RefPosition #20 @18 RefTypeDef <Ivl:1 V11> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #21 @23 RefTypeUse <Ivl:1 V11> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
<RefPosition #22 @24 RefTypeDef <Ivl:3 V13> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #23 @29 RefTypeUse <Ivl:3 V13> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
<RefPosition #24 @30 RefTypeDef <Ivl:2 V12> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #25 @35 RefTypeUse <Ivl:2 V12> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
<RefPosition #26 @36 RefTypeDef <Ivl:4 V14> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #27 @40 RefTypeDef <Ivl:8> LCL_FLD_ADDR BB01 regmask=[allInt] minReg=1>
<RefPosition #28 @45 RefTypeUse <Ivl:8> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #29 @45 RefTypeUse <Ivl:4 V14> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
<RefPosition #30 @52 RefTypeDef <Ivl:9> IND BB01 regmask=[allInt] minReg=1>
<RefPosition #31 @55 RefTypeUse <Ivl:9> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #32 @62 RefTypeDef <Ivl:10> IND BB01 regmask=[allInt] minReg=1>
<RefPosition #33 @64 RefTypeDef <Ivl:11> LCL_FLD_ADDR BB01 regmask=[allInt] minReg=1>
<RefPosition #34 @65 RefTypeUse <Ivl:11> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #35 @65 RefTypeUse <Ivl:10> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #36 @72 RefTypeDef <Ivl:12> IND BB01 regmask=[allInt] minReg=1>
<RefPosition #37 @75 RefTypeUse <Ivl:12> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #38 @82 RefTypeDef <Ivl:13> IND BB01 regmask=[allInt] minReg=1>
<RefPosition #39 @84 RefTypeDef <Ivl:14> LCL_FLD_ADDR BB01 regmask=[allInt] minReg=1>
<RefPosition #40 @85 RefTypeUse <Ivl:14> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #41 @85 RefTypeUse <Ivl:13> BB01 regmask=[allInt] minReg=1 last>
<RefPosition #42 @90 RefTypeDef <Ivl:15> LCL_FLD BB01 regmask=[rcx] minReg=1>
<RefPosition #43 @91 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #44 @91 RefTypeUse <Ivl:15> BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #45 @92 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #46 @92 RefTypeDef <Ivl:16> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed>
<RefPosition #47 @93 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #48 @93 RefTypeUse <Ivl:16> BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #49 @94 RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last>
<RefPosition #50 @94 RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last>
<RefPosition #51 @94 RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last>
<RefPosition #52 @94 RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last>
<RefPosition #53 @94 RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last>
<RefPosition #54 @94 RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last>
<RefPosition #55 @94 RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last>
VAR REFPOSITIONS BEFORE ALLOCATION
--- V00
--- V01
--- V02
<RefPosition #18 @12 RefTypeDef <Ivl:0 V02> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #19 @17 RefTypeUse <Ivl:0 V02> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
--- V03
--- V04
--- V05
--- V06
--- V07
--- V08
--- V09
--- V10
--- V11
<RefPosition #20 @18 RefTypeDef <Ivl:1 V11> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #21 @23 RefTypeUse <Ivl:1 V11> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
--- V12
<RefPosition #24 @30 RefTypeDef <Ivl:2 V12> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #25 @35 RefTypeUse <Ivl:2 V12> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
--- V13
<RefPosition #22 @24 RefTypeDef <Ivl:3 V13> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #23 @29 RefTypeUse <Ivl:3 V13> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
--- V14
<RefPosition #26 @36 RefTypeDef <Ivl:4 V14> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1>
<RefPosition #29 @45 RefTypeUse <Ivl:4 V14> LCL_VAR BB01 regmask=[allInt] minReg=1 last>
Allocating Registers
--------------------
The following table has one or more rows for each RefPosition that is handled during allocation.
The first column provides the basic information about the RefPosition, with its type (e.g. Def,
Use, Fixd) followed by a '*' if it is a last use, and a 'D' if it is delayRegFree, and then the
action taken during allocation (e.g. Alloc a new register, or Keep an existing one).
The subsequent columns show the Interval occupying each register, if any, followed by 'a' if it is
active, and 'i'if it is inactive. Columns are only printed up to the last modifed register, which
may increase during allocation, in which case additional columns will appear. Registers which are
not marked modified have ---- in their column.
------------------------------+----+----+----+----+----+----+
LocRP# Name Type Action Reg |rax |rcx |rbx |rbp |rsi |rdi |
------------------------------+----+----+----+----+----+----+
| | | | | | |
1.#0 BB1 PredBB0 | | | | | | |
6.#1 C5 Def Alloc rcx | |C5 a| | | | |
7.#2 rcx Fixd Keep rcx | |C5 a| | | | |
7.#3 C5 Use * Keep rcx | |C5 a| | | | |
8.#4 rcx Fixd Keep rcx | | | | | | |
8.#5 I6 Def Alloc rcx | |I6 a| | | | |
9.#6 rcx Fixd Keep rcx | |I6 a| | | | |
9.#7 I6 Use * Keep rcx | |I6 a| | | | |
10.#8 rax Kill Keep rax | | | | | | |
10.#9 rcx Kill Keep rcx | | | | | | |
10.#10 rdx Kill Keep rdx | | | | | | |
10.#11 r8 Kill Keep r8 | | | | | | |
10.#12 r9 Kill Keep r9 | | | | | | |
10.#13 r10 Kill Keep r10 | | | | | | |
10.#14 r11 Kill Keep r11 | | | | | | |
10.#15 rax Fixd Keep rax | | | | | | |
10.#16 I7 Def Alloc rax |I7 a| | | | | |
11.#17 I7 Use * Keep rax |I7 a| | | | | |
12.#18 V2 Def Alloc rcx | |V2 a| | | | |
17.#19 V2 Use * Keep rcx | |V2 a| | | | |
18.#20 V11 Def Alloc rax |V11a| | | | | |
23.#21 V11 Use * Keep rax |V11a| | | | | |
24.#22 V13 Def Alloc rcx | |V13a| | | | |
29.#23 V13 Use * Keep rcx | |V13a| | | | |
30.#24 V12 Def Alloc rax |V12a| | | | | |
35.#25 V12 Use * Keep rax |V12a| | | | | |
36.#26 V14 Def Alloc rcx | |V14a| | | | |
40.#27 I8 Def Alloc rax |I8 a|V14a| | | | |
45.#28 I8 Use * Keep rax |I8 a|V14a| | | | |
45.#29 V14 Use * Keep rcx |I8 a|V14a| | | | |
52.#30 I9 Def Alloc rcx | |I9 a| | | | |
55.#31 I9 Use * Keep rcx | |I9 a| | | | |
62.#32 I10 Def Alloc rcx | |I10a| | | | |
64.#33 I11 Def Alloc rax |I11a|I10a| | | | |
65.#34 I11 Use * Keep rax |I11a|I10a| | | | |
65.#35 I10 Use * Keep rcx |I11a|I10a| | | | |
72.#36 I12 Def Alloc rcx | |I12a| | | | |
75.#37 I12 Use * Keep rcx | |I12a| | | | |
82.#38 I13 Def Alloc rcx | |I13a| | | | |
84.#39 I14 Def Alloc rax |I14a|I13a| | | | |
85.#40 I14 Use * Keep rax |I14a|I13a| | | | |
85.#41 I13 Use * Keep rcx |I14a|I13a| | | | |
90.#42 I15 Def Alloc rcx | |I15a| | | | |
91.#43 rcx Fixd Keep rcx | |I15a| | | | |
91.#44 I15 Use * Keep rcx | |I15a| | | | |
92.#45 rcx Fixd Keep rcx | | | | | | |
92.#46 I16 Def Alloc rcx | |I16a| | | | |
93.#47 rcx Fixd Keep rcx | |I16a| | | | |
93.#48 I16 Use * Keep rcx | |I16a| | | | |
94.#49 rax Kill Keep rax | | | | | | |
94.#50 rcx Kill Keep rcx | | | | | | |
94.#51 rdx Kill Keep rdx | | | | | | |
94.#52 r8 Kill Keep r8 | | | | | | |
94.#53 r9 Kill Keep r9 | | | | | | |
94.#54 r10 Kill Keep r10 | | | | | | |
94.#55 r11 Kill Keep r11 | | | | | | |
------------
REFPOSITIONS AFTER ALLOCATION:
------------
<RefPosition #0 @1 RefTypeBB BB01 regmask=[] minReg=1>
<RefPosition #1 @6 RefTypeDef <Ivl:5> CNS_INT BB01 regmask=[rcx] minReg=1>
<RefPosition #2 @7 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #3 @7 RefTypeUse <Ivl:5> BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #4 @8 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #5 @8 RefTypeDef <Ivl:6> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed>
<RefPosition #6 @9 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #7 @9 RefTypeUse <Ivl:6> BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #8 @10 RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last>
<RefPosition #9 @10 RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last>
<RefPosition #10 @10 RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last>
<RefPosition #11 @10 RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last>
<RefPosition #12 @10 RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last>
<RefPosition #13 @10 RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last>
<RefPosition #14 @10 RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last>
<RefPosition #15 @10 RefTypeFixedReg <Reg:rax> BB01 regmask=[rax] minReg=1>
<RefPosition #16 @10 RefTypeDef <Ivl:7> CALL BB01 regmask=[rax] minReg=1 fixed>
<RefPosition #17 @11 RefTypeUse <Ivl:7> BB01 regmask=[rax] minReg=1 last>
<RefPosition #18 @12 RefTypeDef <Ivl:0 V02> STORE_LCL_VAR BB01 regmask=[rcx] minReg=1>
<RefPosition #19 @17 RefTypeUse <Ivl:0 V02> LCL_VAR BB01 regmask=[rcx] minReg=1 last>
<RefPosition #20 @18 RefTypeDef <Ivl:1 V11> STORE_LCL_VAR BB01 regmask=[rax] minReg=1>
<RefPosition #21 @23 RefTypeUse <Ivl:1 V11> LCL_VAR BB01 regmask=[rax] minReg=1 last>
<RefPosition #22 @24 RefTypeDef <Ivl:3 V13> STORE_LCL_VAR BB01 regmask=[rcx] minReg=1>
<RefPosition #23 @29 RefTypeUse <Ivl:3 V13> LCL_VAR BB01 regmask=[rcx] minReg=1 last>
<RefPosition #24 @30 RefTypeDef <Ivl:2 V12> STORE_LCL_VAR BB01 regmask=[rax] minReg=1>
<RefPosition #25 @35 RefTypeUse <Ivl:2 V12> LCL_VAR BB01 regmask=[rax] minReg=1 last>
<RefPosition #26 @36 RefTypeDef <Ivl:4 V14> STORE_LCL_VAR BB01 regmask=[rcx] minReg=1>
<RefPosition #27 @40 RefTypeDef <Ivl:8> LCL_FLD_ADDR BB01 regmask=[rax] minReg=1>
<RefPosition #28 @45 RefTypeUse <Ivl:8> BB01 regmask=[rax] minReg=1 last>
<RefPosition #29 @45 RefTypeUse <Ivl:4 V14> LCL_VAR BB01 regmask=[rcx] minReg=1 last>
<RefPosition #30 @52 RefTypeDef <Ivl:9> IND BB01 regmask=[rcx] minReg=1>
<RefPosition #31 @55 RefTypeUse <Ivl:9> BB01 regmask=[rcx] minReg=1 last>
<RefPosition #32 @62 RefTypeDef <Ivl:10> IND BB01 regmask=[rcx] minReg=1>
<RefPosition #33 @64 RefTypeDef <Ivl:11> LCL_FLD_ADDR BB01 regmask=[rax] minReg=1>
<RefPosition #34 @65 RefTypeUse <Ivl:11> BB01 regmask=[rax] minReg=1 last>
<RefPosition #35 @65 RefTypeUse <Ivl:10> BB01 regmask=[rcx] minReg=1 last>
<RefPosition #36 @72 RefTypeDef <Ivl:12> IND BB01 regmask=[rcx] minReg=1>
<RefPosition #37 @75 RefTypeUse <Ivl:12> BB01 regmask=[rcx] minReg=1 last>
<RefPosition #38 @82 RefTypeDef <Ivl:13> IND BB01 regmask=[rcx] minReg=1>
<RefPosition #39 @84 RefTypeDef <Ivl:14> LCL_FLD_ADDR BB01 regmask=[rax] minReg=1>
<RefPosition #40 @85 RefTypeUse <Ivl:14> BB01 regmask=[rax] minReg=1 last>
<RefPosition #41 @85 RefTypeUse <Ivl:13> BB01 regmask=[rcx] minReg=1 last>
<RefPosition #42 @90 RefTypeDef <Ivl:15> LCL_FLD BB01 regmask=[rcx] minReg=1>
<RefPosition #43 @91 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #44 @91 RefTypeUse <Ivl:15> BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #45 @92 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #46 @92 RefTypeDef <Ivl:16> PUTARG_REG BB01 regmask=[rcx] minReg=1 fixed>
<RefPosition #47 @93 RefTypeFixedReg <Reg:rcx> BB01 regmask=[rcx] minReg=1>
<RefPosition #48 @93 RefTypeUse <Ivl:16> BB01 regmask=[rcx] minReg=1 last fixed>
<RefPosition #49 @94 RefTypeKill <Reg:rax> BB01 regmask=[rax] minReg=1 last>
<RefPosition #50 @94 RefTypeKill <Reg:rcx> BB01 regmask=[rcx] minReg=1 last>
<RefPosition #51 @94 RefTypeKill <Reg:rdx> BB01 regmask=[rdx] minReg=1 last>
<RefPosition #52 @94 RefTypeKill <Reg:r8 > BB01 regmask=[r8] minReg=1 last>
<RefPosition #53 @94 RefTypeKill <Reg:r9 > BB01 regmask=[r9] minReg=1 last>
<RefPosition #54 @94 RefTypeKill <Reg:r10> BB01 regmask=[r10] minReg=1 last>
<RefPosition #55 @94 RefTypeKill <Reg:r11> BB01 regmask=[r11] minReg=1 last>
VAR REFPOSITIONS AFTER ALLOCATION
--- V00
--- V01
--- V02
<RefPosition #18 @12 RefTypeDef <Ivl:0 V02> STORE_LCL_VAR BB01 regmask=[rcx] minReg=1>
<RefPosition #19 @17 RefTypeUse <Ivl:0 V02> LCL_VAR BB01 regmask=[rcx] minReg=1 last>
--- V03
--- V04
--- V05
--- V06
--- V07
--- V08
--- V09
--- V10
--- V11
<RefPosition #20 @18 RefTypeDef <Ivl:1 V11> STORE_LCL_VAR BB01 regmask=[rax] minReg=1>
<RefPosition #21 @23 RefTypeUse <Ivl:1 V11> LCL_VAR BB01 regmask=[rax] minReg=1 last>
--- V12
<RefPosition #24 @30 RefTypeDef <Ivl:2 V12> STORE_LCL_VAR BB01 regmask=[rax] minReg=1>
<RefPosition #25 @35 RefTypeUse <Ivl:2 V12> LCL_VAR BB01 regmask=[rax] minReg=1 last>
--- V13
<RefPosition #22 @24 RefTypeDef <Ivl:3 V13> STORE_LCL_VAR BB01 regmask=[rcx] minReg=1>
<RefPosition #23 @29 RefTypeUse <Ivl:3 V13> LCL_VAR BB01 regmask=[rcx] minReg=1 last>
--- V14
<RefPosition #26 @36 RefTypeDef <Ivl:4 V14> STORE_LCL_VAR BB01 regmask=[rcx] minReg=1>
<RefPosition #29 @45 RefTypeUse <Ivl:4 V14> LCL_VAR BB01 regmask=[rcx] minReg=1 last>
Active intervals at end of allocation:
-----------------------
RESOLVING BB BOUNDARIES
-----------------------
Resolution Candidates: {}
Has NoCritical Edges
Prior to Resolution
BB01 use def in out
{}
{V00 V02 V11 V12 V13 V14}
{}
{}
Var=Reg beg of BB01: none
Var=Reg end of BB01: none
RESOLVING EDGES
Trees after linear scan register allocator (LSRA)
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj LIR
--------------------------------------------------------------------------------------------------------------------------------------
------------ BB01 [000..028) (return), preds={} succs={}
N003 ( 17, 16) [000007] ------------ IL_OFFSET void IL offset: 0x0 REG NA
N005 ( 3, 10) [000003] ------------ t3 = CNS_INT(h) long 0x7ffc12345508 method REG rcx $180
/--* t3 long
N007 (???,???) [000215] ------------ t215 = * PUTARG_REG long REG rcx
/--* t215 long arg0 in rcx
N009 ( 17, 16) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
/--* t4 ref
N011 ( 17, 16) [000006] DA---------- * STORE_LCL_VAR ref V02 tmp1 d:3 rcx REG rcx
N013 ( 5, 4) [000064] ------------ IL_OFFSET void IL offset: 0x7 REG NA
N015 ( 1, 1) [000011] ------------ t11 = LCL_VAR ref V02 tmp1 u:3 rcx (last use) REG rcx $200
/--* t11 ref
N017 ( 5, 4) [000063] DA---------- * STORE_LCL_VAR ref V11 tmp10 d:3 rax REG rax
N019 ( 7, 5) [000078] ------------ IL_OFFSET void IL offset: 0xc REG NA
N021 ( 3, 2) [000182] -------N---- t182 = LCL_VAR ref V11 tmp10 u:3 rax (last use) REG rax $200
/--* t182 ref
N023 ( 7, 5) [000183] DA---------- * STORE_LCL_VAR ref V13 tmp12 d:3 rcx REG rcx
N025 ( 7, 5) [000074] ------------ IL_OFFSET void IL offset: 0xc REG NA
N027 ( 3, 2) [000185] -------N---- t185 = LCL_VAR ref V13 tmp12 u:3 rcx (last use) REG rcx $200
/--* t185 ref
N029 ( 7, 5) [000186] DA---------- * STORE_LCL_VAR ref V12 tmp11 d:3 rax REG rax
N031 ( 7, 5) [000092] ------------ IL_OFFSET void IL offset: 0x11 REG NA
N033 ( 3, 2) [000188] -------N---- t188 = LCL_VAR ref V12 tmp11 u:3 rax (last use) REG rax $200
/--* t188 ref
N035 ( 7, 5) [000189] DA---------- * STORE_LCL_VAR ref V14 tmp13 d:3 rcx REG rcx
N037 ( 10, 10) [000088] ------------ IL_OFFSET void IL offset: 0x11 REG NA
N039 ( 3, 4) [000191] D------N---- t191 = LCL_FLD_ADDR byref V05 tmp4 [+0] Fseq[_s] rax REG rax
/--* t191 byref
N041 (???,???) [000216] -c---------- t216 = * LEA(b+0) byref REG NA
N043 ( 3, 2) [000195] -------N---- t195 = LCL_VAR ref V14 tmp13 u:3 rcx (last use) REG rcx $200
/--* t216 byref
+--* t195 ref
N045 (???,???) [000210] -A---------- * STOREIND ref REG NA
N047 ( 13, 11) [000106] ------------ IL_OFFSET void IL offset: 0x16 REG NA
N049 ( 3, 2) [000033] -c-----N---- t33 = LCL_VAR_ADDR byref V05 tmp4 NA REG NA
/--* t33 byref
N051 ( 6, 5) [000038] x----------- t38 = * IND ref REG rcx <l:$340, c:$1c6>
N053 ( 3, 2) [000103] Dc-----N---- t103 = LCL_VAR_ADDR byref V09 tmp8 NA REG NA
/--* t103 byref
+--* t38 ref
N055 (???,???) [000211] -A---------- * STOREIND ref REG NA
N057 ( 13, 13) [000102] ------------ IL_OFFSET void IL offset: 0x16 REG NA
N059 ( 3, 2) [000097] -c---------- t97 = LCL_VAR_ADDR byref V09 tmp8 NA REG NA
/--* t97 byref
N061 ( 6, 5) [000200] x----------- t200 = * IND ref REG rcx <l:$341, c:$1c7>
N063 ( 3, 4) [000096] D------N---- t96 = LCL_FLD_ADDR byref V06 tmp5 [+0] Fseq[_s] rax REG rax
/--* t96 byref
+--* t200 ref
N065 (???,???) [000212] -A--G------- * STOREIND ref REG NA
N067 ( 13, 11) [000120] ------------ IL_OFFSET void IL offset: 0x1b REG NA
N069 ( 3, 2) [000041] -c-----N---- t41 = LCL_VAR_ADDR byref V06 tmp5 NA REG NA
/--* t41 byref
N071 ( 6, 5) [000044] x----------- t44 = * IND ref REG rcx <l:$342, c:$1c8>
N073 ( 3, 2) [000117] Dc-----N---- t117 = LCL_VAR_ADDR byref V10 tmp9 NA REG NA
/--* t117 byref
+--* t44 ref
N075 (???,???) [000213] -A---------- * STOREIND ref REG NA
N077 ( 13, 13) [000116] ------------ IL_OFFSET void IL offset: 0x1b REG NA
N079 ( 3, 2) [000111] -c---------- t111 = LCL_VAR_ADDR byref V10 tmp9 NA REG NA
/--* t111 byref
N081 ( 6, 5) [000204] x----------- t204 = * IND ref REG rcx <l:$343, c:$1c9>
N083 ( 3, 4) [000110] D------N---- t110 = LCL_FLD_ADDR byref V00 loc0 d:3[+0] Fseq[_s] rax REG rax
/--* t110 byref
+--* t204 ref
N085 (???,???) [000214] -A--G------- * STOREIND ref REG NA
N087 ( 17, 11) [000179] ------------ IL_OFFSET void IL offset: 0x20 REG NA
N089 ( 3, 4) [000176] ------------ t176 = LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] rcx (last use) REG rcx <l:$202, c:$203>
/--* t176 ref
N091 (???,???) [000217] ------------ t217 = * PUTARG_REG ref REG rcx
/--* t217 ref this in rcx
N093 ( 17, 11) [000178] --CXG------- * CALL nullcheck void C.M $VN.Void
N095 ( 0, 0) [000052] ------------ IL_OFFSET void IL offset: 0x27 REG NA
N097 ( 0, 0) [000051] ------------ RETURN void REG NA $3c0
-------------------------------------------------------------------------------------------------------------------
Final allocation
------------------------------+----+----+----+----+----+----+
LocRP# Name Type Action Reg |rax |rcx |rbx |rbp |rsi |rdi |
------------------------------+----+----+----+----+----+----+
1.#0 BB1 PredBB0 | | | | | | |
6.#1 C5 Def Alloc rcx | |C5 a| | | | |
7.#2 rcx Fixd Keep rcx | |C5 a| | | | |
7.#3 C5 Use * Keep rcx | |C5 i| | | | |
8.#4 rcx Fixd Keep rcx | | | | | | |
8.#5 I6 Def Alloc rcx | |I6 a| | | | |
9.#6 rcx Fixd Keep rcx | |I6 a| | | | |
9.#7 I6 Use * Keep rcx | |I6 i| | | | |
10.#8 rax Kill Keep rax | | | | | | |
10.#9 rcx Kill Keep rcx | | | | | | |
10.#10 rdx Kill Keep rdx | | | | | | |
10.#11 r8 Kill Keep r8 | | | | | | |
10.#12 r9 Kill Keep r9 | | | | | | |
10.#13 r10 Kill Keep r10 | | | | | | |
10.#14 r11 Kill Keep r11 | | | | | | |
10.#15 rax Fixd Keep rax | | | | | | |
10.#16 I7 Def Alloc rax |I7 a| | | | | |
11.#17 I7 Use * Keep rax |I7 i| | | | | |
12.#18 V2 Def Alloc rcx | |V2 a| | | | |
17.#19 V2 Use * Keep rcx | |V2 i| | | | |
18.#20 V11 Def Alloc rax |V11a| | | | | |
23.#21 V11 Use * Keep rax |V11i| | | | | |
24.#22 V13 Def Alloc rcx | |V13a| | | | |
29.#23 V13 Use * Keep rcx | |V13i| | | | |
30.#24 V12 Def Alloc rax |V12a| | | | | |
35.#25 V12 Use * Keep rax |V12i| | | | | |
36.#26 V14 Def Alloc rcx | |V14a| | | | |
40.#27 I8 Def Alloc rax |I8 a|V14a| | | | |
45.#28 I8 Use * Keep rax |I8 i|V14a| | | | |
45.#29 V14 Use * Keep rcx | |V14i| | | | |
52.#30 I9 Def Alloc rcx | |I9 a| | | | |
55.#31 I9 Use * Keep rcx | |I9 i| | | | |
62.#32 I10 Def Alloc rcx | |I10a| | | | |
64.#33 I11 Def Alloc rax |I11a|I10a| | | | |
65.#34 I11 Use * Keep rax |I11i|I10a| | | | |
65.#35 I10 Use * Keep rcx | |I10i| | | | |
72.#36 I12 Def Alloc rcx | |I12a| | | | |
75.#37 I12 Use * Keep rcx | |I12i| | | | |
82.#38 I13 Def Alloc rcx | |I13a| | | | |
84.#39 I14 Def Alloc rax |I14a|I13a| | | | |
85.#40 I14 Use * Keep rax |I14i|I13a| | | | |
85.#41 I13 Use * Keep rcx | |I13i| | | | |
90.#42 I15 Def Alloc rcx | |I15a| | | | |
91.#43 rcx Fixd Keep rcx | |I15a| | | | |
91.#44 I15 Use * Keep rcx | |I15i| | | | |
92.#45 rcx Fixd Keep rcx | | | | | | |
92.#46 I16 Def Alloc rcx | |I16a| | | | |
93.#47 rcx Fixd Keep rcx | |I16a| | | | |
93.#48 I16 Use * Keep rcx | |I16i| | | | |
94.#49 rax Kill Keep rax | | | | | | |
94.#50 rcx Kill Keep rcx | | | | | | |
94.#51 rdx Kill Keep rdx | | | | | | |
94.#52 r8 Kill Keep r8 | | | | | | |
94.#53 r9 Kill Keep r9 | | | | | | |
94.#54 r10 Kill Keep r10 | | | | | | |
94.#55 r11 Kill Keep r11 | | | | | | |
Recording the maximum number of concurrent spills:
----------
LSRA Stats
----------
Total Tracked Vars: 6
Total Reg Cand Vars: 5
Total number of Intervals: 16
Total number of RefPositions: 55
Total Spill Count: 0 Weighted: 0
Total CopyReg Count: 0 Weighted: 0
Total ResolutionMov Count: 0 Weighted: 0
Total number of split edges: 0
Total Number of spill temps created: 0
TUPLE STYLE DUMP WITH REGISTER ASSIGNMENTS
Incoming Parameters:
BB01 [000..028) (return), preds={} succs={}
=====
N003. IL_OFFSET IL offset: 0x0 REG NA
N005. rcx = CNS_INT(h) 0x7ffc12345508 method REG rcx
N007. rcx = PUTARG_REG; rcx
N009. rax = CALL help; rcx
* N011. V02(rcx); rax
N013. IL_OFFSET IL offset: 0x7 REG NA
N015. V02(rcx*)
* N017. V11(rax); rcx*
N019. IL_OFFSET IL offset: 0xc REG NA
N021. V11(rax*)
* N023. V13(rcx); rax*
N025. IL_OFFSET IL offset: 0xc REG NA
N027. V13(rcx*)
* N029. V12(rax); rcx*
N031. IL_OFFSET IL offset: 0x11 REG NA
N033. V12(rax*)
* N035. V14(rcx); rax*
N037. IL_OFFSET IL offset: 0x11 REG NA
N039. rax = LCL_FLD_ADDR V05 tmp4 [+0] Fseq[_s] rax REG rax
N041. STK = LEA(b+0) ; rax
N043. V14(rcx*)
N045. STOREIND ; STK,rcx*
N047. IL_OFFSET IL offset: 0x16 REG NA
N049. LCL_VAR_ADDR V05 tmp4 NA REG NA
N051. rcx = IND
N053. LCL_VAR_ADDR V09 tmp8 NA REG NA
N055. STOREIND ; rcx
N057. IL_OFFSET IL offset: 0x16 REG NA
N059. LCL_VAR_ADDR V09 tmp8 NA REG NA
N061. rcx = IND
N063. rax = LCL_FLD_ADDR V06 tmp5 [+0] Fseq[_s] rax REG rax
N065. STOREIND ; rax,rcx
N067. IL_OFFSET IL offset: 0x1b REG NA
N069. LCL_VAR_ADDR V06 tmp5 NA REG NA
N071. rcx = IND
N073. LCL_VAR_ADDR V10 tmp9 NA REG NA
N075. STOREIND ; rcx
N077. IL_OFFSET IL offset: 0x1b REG NA
N079. LCL_VAR_ADDR V10 tmp9 NA REG NA
N081. rcx = IND
N083. rax = LCL_FLD_ADDR V00 loc0 d:3[+0] Fseq[_s] rax REG rax
N085. STOREIND ; rax,rcx
N087. IL_OFFSET IL offset: 0x20 REG NA
N089. rcx* = V00 MEM
N091. rcx = PUTARG_REG; rcx*
N093. CALL nullcheck; rcx
N095. IL_OFFSET IL offset: 0x27 REG NA
N097. RETURN
Var=Reg end of BB01: none
*************** In genGenerateCode()
--------------------------------------------------------------------------------------------------------------------------------------
BBnum BBid ref try hnd preds weight [IL range] [jump] [EH region] [flags]
--------------------------------------------------------------------------------------------------------------------------------------
BB01 [0000] 1 1 [000..028) (return) i label target gcsafe newobj LIR
--------------------------------------------------------------------------------------------------------------------------------------
*************** In fgDebugCheckBBlist
Finalizing stack frame
Recording Var Locations at start of BB01
<none>
Marking regs modified: [rdi] ([rax rcx rdx r8-r11] => [rax rcx rdx rdi r8-r11])
Modified regs: [rax rcx rdx rdi r8-r11]
Callee-saved registers pushed: 1 [rdi]
*************** In lvaAssignFrameOffsets(FINAL_FRAME_LAYOUT)
Assign V00 loc0, size=8, stkOffs=-0x18
Assign V05 tmp4, size=8, stkOffs=-0x20
Assign V06 tmp5, size=8, stkOffs=-0x28
Assign V09 tmp8, size=8, stkOffs=-0x30
Assign V10 tmp9, size=8, stkOffs=-0x38
Assign V01 OutArgs, size=32, stkOffs=-0x58
; Final local variable assignments
;
; V00 loc0 [V00,T05] ( 2, 2 ) struct ( 8) [rsp+0x48] do-not-enreg[SF] must-init ld-addr-op
; V01 OutArgs [V01 ] ( 1, 1 ) lclBlk (32) [rsp+0x00]
; V02 tmp1 [V02,T00] ( 2, 4 ) ref -> rcx class-hnd exact
;* V03 tmp2 [V03 ] ( 0, 0 ) struct ( 8) zero-ref
;* V04 tmp3 [V04 ] ( 0, 0 ) struct ( 8) zero-ref
; V05 tmp4 [V05 ] ( 2, 4 ) struct ( 8) [rsp+0x40] do-not-enreg[XSFB] must-init addr-exposed
; V06 tmp5 [V06 ] ( 2, 4 ) struct ( 8) [rsp+0x38] do-not-enreg[XSF] must-init addr-exposed
;* V07 tmp6 [V07 ] ( 0, 0 ) struct ( 8) zero-ref
;* V08 tmp7 [V08 ] ( 0, 0 ) struct ( 8) zero-ref
; V09 tmp8 [V09 ] ( 2, 4 ) struct ( 8) [rsp+0x30] do-not-enreg[XSF] must-init addr-exposed
; V10 tmp9 [V10 ] ( 2, 4 ) struct ( 8) [rsp+0x28] do-not-enreg[XSF] must-init addr-exposed
; V11 tmp10 [V11,T01] ( 2, 2 ) ref -> rax V03._c(offs=0x00) P-INDEP
; V12 tmp11 [V12,T02] ( 2, 2 ) ref -> rax V04._s(offs=0x00) P-INDEP
; V13 tmp12 [V13,T03] ( 2, 2 ) ref -> rcx V07._c(offs=0x00) P-INDEP
; V14 tmp13 [V14,T04] ( 2, 2 ) ref -> rcx V08._s(offs=0x00) P-INDEP
;
; Lcl frame size = 80
=============== Generating BB01 [000..028) (return), preds={} succs={} flags=0x00000000.408b0020: i label target gcsafe newobj LIR
BB01 IN (0)={} + ByrefExposed + GcHeap
OUT(0)={}
Recording Var Locations at start of BB01
<none>
Liveness not changing: 0000000000000000 {}
Live regs: (unchanged) 00000000 {}
GC regs: (unchanged) 00000000 {}
Byref regs: (unchanged) 00000000 {}
L_M45457_BB01:
Label: IG02, GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}
Setting stack level from -572662307 to 0
Scope info: begin block BB01, IL range [000..028)
Scope info: open scopes =
<none>
Added IP mapping: 0x0000 STACK_EMPTY (G_M45457_IG02,ins#0,ofs#0) label
Generating: N003 ( 17, 16) [000007] ------------ IL_OFFSET void IL offset: 0x0 REG NA
Generating: N005 ( 3, 10) [000003] ------------ t3 = CNS_INT(h) long 0x7ffc12345508 method REG rcx $180
IN0001: mov rcx, 0x7FFC12345508
/--* t3 long
Generating: N007 (???,???) [000215] ------------ t215 = * PUTARG_REG long REG rcx
/--* t215 long arg0 in rcx
Generating: N009 ( 17, 16) [000004] --C--------- t4 = * CALL help ref HELPER.CORINFO_HELP_NEWSFAST $200
Call: GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}
IN0002: call CORINFO_HELP_NEWSFAST
GC regs: 00000000 {} => 00000001 {rax}
/--* t4 ref
Generating: N011 ( 17, 16) [000006] DA---------- * STORE_LCL_VAR ref V02 tmp1 d:3 rcx REG rcx
GC regs: 00000001 {rax} => 00000000 {}
IN0003: mov rcx, rax
V02 in reg rcx is becoming live [000006]
Live regs: 00000000 {} => 00000002 {rcx}
Live vars: {} => {V02}
GC regs: 00000000 {} => 00000002 {rcx}
Added IP mapping: 0x0007 (G_M45457_IG02,ins#3,ofs#18)
Generating: N013 ( 5, 4) [000064] ------------ IL_OFFSET void IL offset: 0x7 REG NA
Generating: N015 ( 1, 1) [000011] ------------ t11 = LCL_VAR ref V02 tmp1 u:3 rcx (last use) REG rcx $200
/--* t11 ref
Generating: N017 ( 5, 4) [000063] DA---------- * STORE_LCL_VAR ref V11 tmp10 d:3 rax REG rax
V02 in reg rcx is becoming dead [000011]
Live regs: 00000002 {rcx} => 00000000 {}
Live vars: {V02} => {}
GC regs: 00000002 {rcx} => 00000000 {}
IN0004: mov rax, rcx
V11 in reg rax is becoming live [000063]
Live regs: 00000000 {} => 00000001 {rax}
Live vars: {} => {V11}
GC regs: 00000000 {} => 00000001 {rax}
Added IP mapping: 0x000C (G_M45457_IG02,ins#4,ofs#21)
Generating: N019 ( 7, 5) [000078] ------------ IL_OFFSET void IL offset: 0xc REG NA
Generating: N021 ( 3, 2) [000182] -------N---- t182 = LCL_VAR ref V11 tmp10 u:3 rax (last use) REG rax $200
/--* t182 ref
Generating: N023 ( 7, 5) [000183] DA---------- * STORE_LCL_VAR ref V13 tmp12 d:3 rcx REG rcx
V11 in reg rax is becoming dead [000182]
Live regs: 00000001 {rax} => 00000000 {}
Live vars: {V11} => {}
GC regs: 00000001 {rax} => 00000000 {}
IN0005: mov rcx, rax
V13 in reg rcx is becoming live [000183]
Live regs: 00000000 {} => 00000002 {rcx}
Live vars: {} => {V13}
GC regs: 00000000 {} => 00000002 {rcx}
genIPmappingAdd: ignoring duplicate IL offset 0x8000000c
Generating: N025 ( 7, 5) [000074] ------------ IL_OFFSET void IL offset: 0xc REG NA
Generating: N027 ( 3, 2) [000185] -------N---- t185 = LCL_VAR ref V13 tmp12 u:3 rcx (last use) REG rcx $200
/--* t185 ref
Generating: N029 ( 7, 5) [000186] DA---------- * STORE_LCL_VAR ref V12 tmp11 d:3 rax REG rax
V13 in reg rcx is becoming dead [000185]
Live regs: 00000002 {rcx} => 00000000 {}
Live vars: {V13} => {}
GC regs: 00000002 {rcx} => 00000000 {}
IN0006: mov rax, rcx
V12 in reg rax is becoming live [000186]
Live regs: 00000000 {} => 00000001 {rax}
Live vars: {} => {V12}
GC regs: 00000000 {} => 00000001 {rax}
Added IP mapping: 0x0011 (G_M45457_IG02,ins#6,ofs#27)
Generating: N031 ( 7, 5) [000092] ------------ IL_OFFSET void IL offset: 0x11 REG NA
Generating: N033 ( 3, 2) [000188] -------N---- t188 = LCL_VAR ref V12 tmp11 u:3 rax (last use) REG rax $200
/--* t188 ref
Generating: N035 ( 7, 5) [000189] DA---------- * STORE_LCL_VAR ref V14 tmp13 d:3 rcx REG rcx
V12 in reg rax is becoming dead [000188]
Live regs: 00000001 {rax} => 00000000 {}
Live vars: {V12} => {}
GC regs: 00000001 {rax} => 00000000 {}
IN0007: mov rcx, rax
V14 in reg rcx is becoming live [000189]
Live regs: 00000000 {} => 00000002 {rcx}
Live vars: {} => {V14}
GC regs: 00000000 {} => 00000002 {rcx}
genIPmappingAdd: ignoring duplicate IL offset 0x80000011
Generating: N037 ( 10, 10) [000088] ------------ IL_OFFSET void IL offset: 0x11 REG NA
Generating: N039 ( 3, 4) [000191] D------N---- t191 = LCL_FLD_ADDR byref V05 tmp4 [+0] Fseq[_s] rax REG rax
IN0008: lea rax, bword ptr [V05 rsp+40H]
Byref regs: 00000000 {} => 00000001 {rax}
/--* t191 byref
Generating: N041 (???,???) [000216] -c---------- t216 = * LEA(b+0) byref REG NA
Generating: N043 ( 3, 2) [000195] -------N---- t195 = LCL_VAR ref V14 tmp13 u:3 rcx (last use) REG rcx $200
/--* t216 byref
+--* t195 ref
Generating: N045 (???,???) [000210] -A---------- * STOREIND ref REG NA
Byref regs: 00000001 {rax} => 00000000 {}
V14 in reg rcx is becoming dead [000195]
Live regs: 00000002 {rcx} => 00000000 {}
Live vars: {V14} => {}
GC regs: 00000002 {rcx} => 00000000 {}
IN0009: mov gword ptr [rax], rcx
Added IP mapping: 0x0016 (G_M45457_IG02,ins#9,ofs#38)
Generating: N047 ( 13, 11) [000106] ------------ IL_OFFSET void IL offset: 0x16 REG NA
Generating: N049 ( 3, 2) [000033] -c-----N---- t33 = LCL_VAR_ADDR byref V05 tmp4 NA REG NA
/--* t33 byref
Generating: N051 ( 6, 5) [000038] x----------- t38 = * IND ref REG rcx <l:$340, c:$1c6>
IN000a: mov rcx, gword ptr [V05 rsp+40H]
GC regs: 00000000 {} => 00000002 {rcx}
Generating: N053 ( 3, 2) [000103] Dc-----N---- t103 = LCL_VAR_ADDR byref V09 tmp8 NA REG NA
/--* t103 byref
+--* t38 ref
Generating: N055 (???,???) [000211] -A---------- * STOREIND ref REG NA
GC regs: 00000002 {rcx} => 00000000 {}
IN000b: mov gword ptr [V09 rsp+30H], rcx
genIPmappingAdd: ignoring duplicate IL offset 0x80000016
Generating: N057 ( 13, 13) [000102] ------------ IL_OFFSET void IL offset: 0x16 REG NA
Generating: N059 ( 3, 2) [000097] -c---------- t97 = LCL_VAR_ADDR byref V09 tmp8 NA REG NA
/--* t97 byref
Generating: N061 ( 6, 5) [000200] x----------- t200 = * IND ref REG rcx <l:$341, c:$1c7>
IN000c: mov rcx, gword ptr [V09 rsp+30H]
GC regs: 00000000 {} => 00000002 {rcx}
Generating: N063 ( 3, 4) [000096] D------N---- t96 = LCL_FLD_ADDR byref V06 tmp5 [+0] Fseq[_s] rax REG rax
IN000d: lea rax, bword ptr [V06 rsp+38H]
Byref regs: 00000000 {} => 00000001 {rax}
/--* t96 byref
+--* t200 ref
Generating: N065 (???,???) [000212] -A--G------- * STOREIND ref REG NA
Byref regs: 00000001 {rax} => 00000000 {}
GC regs: 00000002 {rcx} => 00000000 {}
IN000e: mov gword ptr [rax], rcx
Added IP mapping: 0x001B (G_M45457_IG02,ins#14,ofs#61)
Generating: N067 ( 13, 11) [000120] ------------ IL_OFFSET void IL offset: 0x1b REG NA
Generating: N069 ( 3, 2) [000041] -c-----N---- t41 = LCL_VAR_ADDR byref V06 tmp5 NA REG NA
/--* t41 byref
Generating: N071 ( 6, 5) [000044] x----------- t44 = * IND ref REG rcx <l:$342, c:$1c8>
IN000f: mov rcx, gword ptr [V06 rsp+38H]
GC regs: 00000000 {} => 00000002 {rcx}
Generating: N073 ( 3, 2) [000117] Dc-----N---- t117 = LCL_VAR_ADDR byref V10 tmp9 NA REG NA
/--* t117 byref
+--* t44 ref
Generating: N075 (???,???) [000213] -A---------- * STOREIND ref REG NA
GC regs: 00000002 {rcx} => 00000000 {}
IN0010: mov gword ptr [V10 rsp+28H], rcx
genIPmappingAdd: ignoring duplicate IL offset 0x8000001b
Generating: N077 ( 13, 13) [000116] ------------ IL_OFFSET void IL offset: 0x1b REG NA
Generating: N079 ( 3, 2) [000111] -c---------- t111 = LCL_VAR_ADDR byref V10 tmp9 NA REG NA
/--* t111 byref
Generating: N081 ( 6, 5) [000204] x----------- t204 = * IND ref REG rcx <l:$343, c:$1c9>
IN0011: mov rcx, gword ptr [V10 rsp+28H]
GC regs: 00000000 {} => 00000002 {rcx}
Generating: N083 ( 3, 4) [000110] D------N---- t110 = LCL_FLD_ADDR byref V00 loc0 d:3[+0] Fseq[_s] rax REG rax
IN0012: lea rax, bword ptr [V00 rsp+48H]
Byref regs: 00000000 {} => 00000001 {rax}
/--* t110 byref
+--* t204 ref
Generating: N085 (???,???) [000214] -A--G------- * STOREIND ref REG NA
Byref regs: 00000001 {rax} => 00000000 {}
GC regs: 00000002 {rcx} => 00000000 {}
IN0013: mov gword ptr [rax], rcx
Added IP mapping: 0x0020 STACK_EMPTY (G_M45457_IG02,ins#19,ofs#84)
Generating: N087 ( 17, 11) [000179] ------------ IL_OFFSET void IL offset: 0x20 REG NA
Generating: N089 ( 3, 4) [000176] ------------ t176 = LCL_FLD ref V00 loc0 u:3[+0] Fseq[_s, _s, _s, _s, _c] rcx (last use) REG rcx <l:$202, c:$203>
IN0014: mov rcx, gword ptr [V00 rsp+48H]
GC regs: 00000000 {} => 00000002 {rcx}
/--* t176 ref
Generating: N091 (???,???) [000217] ------------ t217 = * PUTARG_REG ref REG rcx
GC regs: 00000002 {rcx} => 00000000 {}
GC regs: 00000000 {} => 00000002 {rcx}
/--* t217 ref this in rcx
Generating: N093 ( 17, 11) [000178] --CXG------- * CALL nullcheck void C.M $VN.Void
GC regs: 00000002 {rcx} => 00000000 {}
IN0015: cmp dword ptr [rcx], ecx
Call: GCvars=0000000000000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {}
IN0016: call C:M():this
Added IP mapping: 0x0027 STACK_EMPTY (G_M45457_IG02,ins#22,ofs#96)
Generating: N095 ( 0, 0) [000052] ------------ IL_OFFSET void IL offset: 0x27 REG NA
Generating: N097 ( 0, 0) [000051] ------------ RETURN void REG NA $3c0
Scope info: end block BB01, IL range [000..028)
Scope info: ending scope, LVnum=0 [000..028)
Scope info: open scopes =
<none>
Added IP mapping: EPILOG STACK_EMPTY (G_M45457_IG02,ins#22,ofs#96) label
Reserving epilog IG for block BB01
IN0017: nop
G_M45457_IG02: ; offs=000000H, funclet=00
*************** After placeholder IG creation
G_M45457_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG
G_M45457_IG02: ; offs=000000H, size=0061H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
G_M45457_IG03: ; epilog placeholder, next placeholder=<END>, BB01 [0000], epilog, emitadd <-- First placeholder <-- Last placeholder
; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {}
; InitGCVars=0000000000000000 {}, InitGCrefRegs=00000000 {}, InitByrefRegs=00000000 {}
Liveness not changing: 0000000000000000 {}
# compCycleEstimate = 122, compSizeEstimate = 104 Program:ViaStruct5()
; Final local variable assignments
;
; V00 loc0 [V00,T05] ( 2, 2 ) struct ( 8) [rsp+0x48] do-not-enreg[SF] must-init ld-addr-op
; V01 OutArgs [V01 ] ( 1, 1 ) lclBlk (32) [rsp+0x00]
; V02 tmp1 [V02,T00] ( 2, 4 ) ref -> rcx class-hnd exact
;* V03 tmp2 [V03 ] ( 0, 0 ) struct ( 8) zero-ref
;* V04 tmp3 [V04 ] ( 0, 0 ) struct ( 8) zero-ref
; V05 tmp4 [V05 ] ( 2, 4 ) struct ( 8) [rsp+0x40] do-not-enreg[XSFB] must-init addr-exposed
; V06 tmp5 [V06 ] ( 2, 4 ) struct ( 8) [rsp+0x38] do-not-enreg[XSF] must-init addr-exposed
;* V07 tmp6 [V07 ] ( 0, 0 ) struct ( 8) zero-ref
;* V08 tmp7 [V08 ] ( 0, 0 ) struct ( 8) zero-ref
; V09 tmp8 [V09 ] ( 2, 4 ) struct ( 8) [rsp+0x30] do-not-enreg[XSF] must-init addr-exposed
; V10 tmp9 [V10 ] ( 2, 4 ) struct ( 8) [rsp+0x28] do-not-enreg[XSF] must-init addr-exposed
; V11 tmp10 [V11,T01] ( 2, 2 ) ref -> rax V03._c(offs=0x00) P-INDEP
; V12 tmp11 [V12,T02] ( 2, 2 ) ref -> rax V04._s(offs=0x00) P-INDEP
; V13 tmp12 [V13,T03] ( 2, 2 ) ref -> rcx V07._c(offs=0x00) P-INDEP
; V14 tmp13 [V14,T04] ( 2, 2 ) ref -> rcx V08._s(offs=0x00) P-INDEP
;
; Lcl frame size = 80
*************** Before prolog / epilog generation
G_M45457_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG
G_M45457_IG02: ; offs=000000H, size=0061H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
G_M45457_IG03: ; epilog placeholder, next placeholder=<END>, BB01 [0000], epilog, emitadd <-- First placeholder <-- Last placeholder
; PrevGCVars=0000000000000000 {}, PrevGCrefRegs=00000000 {}, PrevByrefRegs=00000000 {}
; InitGCVars=0000000000000000 {}, InitGCrefRegs=00000000 {}, InitByrefRegs=00000000 {}
Recording Var Locations at start of BB01
<none>
*************** In genFnProlog()
Added IP mapping to front: PROLOG STACK_EMPTY (G_M45457_IG01,ins#0,ofs#0) label
__prolog:
Found 10 lvMustInit stk vars, frame offsets -40 through -80
IN0018: push rdi
IN0019: sub rsp, 80
IN001a: lea rdi, [rsp+28H]
IN001b: mov ecx, 10
IN001c: xor rax, rax
IN001d: rep stosd
*************** In genEnregisterIncomingStackArgs()
G_M45457_IG01: ; offs=000000H, funclet=00
*************** In genFnEpilog()
__epilog:
gcVarPtrSetCur=0000000000000000 {}, gcRegGCrefSetCur=00000000 {}, gcRegByrefSetCur=00000000 {}
IN001e: add rsp, 80
IN001f: pop rdi
IN0020: ret
G_M45457_IG03: ; offs=000061H, funclet=00
0 prologs, 1 epilogs, 0 funclet prologs, 0 funclet epilogs
*************** After prolog / epilog generation
G_M45457_IG01: ; func=00, offs=000000H, size=0013H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG
G_M45457_IG02: ; offs=000013H, size=0061H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
G_M45457_IG03: ; offs=000074H, size=0006H, epilog, nogc, emitadd
*************** In emitJumpDistBind()
Hot code size = 0x7A bytes
Cold code size = 0x0 bytes
reserveUnwindInfo(isFunclet=FALSE, isColdCode=FALSE, unwindSize=0x8)
*************** In emitEndCodeGen()
Converting emitMaxStackDepth from bytes (0) to elements (0)
***************************************************************************
Instructions as they come out of the scheduler
G_M45457_IG01: ; func=00, offs=000000H, size=0013H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG
IN0018: 000000 57 push rdi
IN0019: 000001 4883EC50 sub rsp, 80
IN001a: 000005 488D7C2428 lea rdi, [rsp+28H]
IN001b: 00000A B90A000000 mov ecx, 10
IN001c: 00000F 33C0 xor rax, rax
IN001d: 000011 F3AB rep stosd
G_M45457_IG02: ; func=00, offs=000013H, size=0061H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
IN0001: 000013 48B908553412FC7F0000 mov rcx, 0x7FFC12345508
New gcrReg live regs=00000001 {rax}
gcrReg +[rax]
[3FF11F10] ptr arg pop 0
IN0002: 00001D E80E27AD5F call CORINFO_HELP_NEWSFAST
gcrReg +[rcx]
IN0003: 000022 488BC8 mov rcx, rax
IN0004: 000025 488BC1 mov rax, rcx
IN0005: 000028 488BC8 mov rcx, rax
IN0006: 00002B 488BC1 mov rax, rcx
IN0007: 00002E 488BC8 mov rcx, rax
gcrReg -[rax]
byrReg +[rax]
IN0008: 000031 488D442440 lea rax, bword ptr [rsp+40H]
IN0009: 000036 488908 mov gword ptr [rax], rcx
IN000a: 000039 488B4C2440 mov rcx, gword ptr [rsp+40H]
IN000b: 00003E 48894C2430 mov gword ptr [rsp+30H], rcx
IN000c: 000043 488B4C2430 mov rcx, gword ptr [rsp+30H]
IN000d: 000048 488D442438 lea rax, bword ptr [rsp+38H]
IN000e: 00004D 488908 mov gword ptr [rax], rcx
IN000f: 000050 488B4C2438 mov rcx, gword ptr [rsp+38H]
IN0010: 000055 48894C2428 mov gword ptr [rsp+28H], rcx
IN0011: 00005A 488B4C2428 mov rcx, gword ptr [rsp+28H]
IN0012: 00005F 488D442448 lea rax, bword ptr [rsp+48H]
IN0013: 000064 488908 mov gword ptr [rax], rcx
IN0014: 000067 488B4C2448 mov rcx, gword ptr [rsp+48H]
IN0015: 00006C 3909 cmp dword ptr [rcx], ecx
New gcrReg live regs=00000000 {}
gcrReg -[rcx]
New byrReg live regs=00000000 {}
byrReg -[rax]
[3FF11FD0] ptr arg pop 0
IN0016: 00006E E8FDFDFFFF call C:M():this
IN0017: 000073 90 nop
G_M45457_IG03: ; func=00, offs=000074H, size=0006H, epilog, nogc, emitadd
IN001e: 000074 4883C450 add rsp, 80
IN001f: 000078 5F pop rdi
IN0020: 000079 C3 ret
Allocated method code size = 122 , actual size = 122
*************** After end code gen, before unwindEmit()
G_M45457_IG01: ; func=00, offs=000000H, size=0013H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG
IN0018: 000000 push rdi
IN0019: 000001 sub rsp, 80
IN001a: 000005 lea rdi, [rsp+28H]
IN001b: 00000A mov ecx, 10
IN001c: 00000F xor rax, rax
IN001d: 000011 rep stosd
G_M45457_IG02: ; offs=000013H, size=0061H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref
IN0001: 000013 mov rcx, 0x7FFC12345508
IN0002: 00001D call CORINFO_HELP_NEWSFAST
IN0003: 000022 mov rcx, rax
IN0004: 000025 mov rax, rcx
IN0005: 000028 mov rcx, rax
IN0006: 00002B mov rax, rcx
IN0007: 00002E mov rcx, rax
IN0008: 000031 lea rax, bword ptr [V05 rsp+40H]
IN0009: 000036 mov gword ptr [rax], rcx
IN000a: 000039 mov rcx, gword ptr [V05 rsp+40H]
IN000b: 00003E mov gword ptr [V09 rsp+30H], rcx
IN000c: 000043 mov rcx, gword ptr [V09 rsp+30H]
IN000d: 000048 lea rax, bword ptr [V06 rsp+38H]
IN000e: 00004D mov gword ptr [rax], rcx
IN000f: 000050 mov rcx, gword ptr [V06 rsp+38H]
IN0010: 000055 mov gword ptr [V10 rsp+28H], rcx
IN0011: 00005A mov rcx, gword ptr [V10 rsp+28H]
IN0012: 00005F lea rax, bword ptr [V00 rsp+48H]
IN0013: 000064 mov gword ptr [rax], rcx
IN0014: 000067 mov rcx, gword ptr [V00 rsp+48H]
IN0015: 00006C cmp dword ptr [rcx], ecx
IN0016: 00006E call C:M():this
IN0017: 000073 nop
G_M45457_IG03: ; offs=000074H, size=0006H, epilog, nogc, emitadd
IN001e: 000074 add rsp, 80
IN001f: 000078 pop rdi
IN0020: 000079 ret
Unwind Info:
>> Start offset : 0x000000 (not in unwind data)
>> End offset : 0x00007a (not in unwind data)
Version : 1
Flags : 0x00
SizeOfProlog : 0x05
CountOfUnwindCodes: 2
FrameRegister : none (0)
FrameOffset : N/A (no FrameRegister) (Value=0)
UnwindCodes :
CodeOffset: 0x05 UnwindOp: UWOP_ALLOC_SMALL (2) OpInfo: 9 * 8 + 8 = 80 = 0x50
CodeOffset: 0x01 UnwindOp: UWOP_PUSH_NONVOL (0) OpInfo: rdi (7)
allocUnwindInfo(pHotCode=0x00007FFC124616B0, pColdCode=0x0000000000000000, startOffset=0x0, endOffset=0x7a, unwindSize=0x8, pUnwindBlock=0x0000024E3FF053E8, funKind=0 (main function))
*************** In genIPmappingGen()
IP mapping count : 10
IL offs PROLOG : 0x00000000 ( STACK_EMPTY )
IL offs 0x0000 : 0x00000013 ( STACK_EMPTY )
IL offs 0x0007 : 0x00000025
IL offs 0x000C : 0x00000028
IL offs 0x0011 : 0x0000002E
IL offs 0x0016 : 0x00000039
IL offs 0x001B : 0x00000050
IL offs 0x0020 : 0x00000067 ( STACK_EMPTY )
IL offs 0x0027 : 0x00000073 ( STACK_EMPTY )
IL offs EPILOG : 0x00000073 ( STACK_EMPTY )
*************** In genSetScopeInfo()
VarLocInfo count is 0
*************** Variable debug info
0 vars
*************** In gcInfoBlockHdrSave()
Set code length to 122.
Set ReturnKind to Scalar.
Set Outgoing stack arg area size to 32.
Stack slot id for offset 72 (0x48) (sp) (untracked) = 0.
Stack slot id for offset 64 (0x40) (sp) (untracked) = 1.
Stack slot id for offset 56 (0x38) (sp) (untracked) = 2.
Stack slot id for offset 48 (0x30) (sp) (untracked) = 3.
Stack slot id for offset 40 (0x28) (sp) (untracked) = 4.
Defining 2 call sites:
Offset 0x1d, size 5.
Offset 0x6e, size 5.
Method code size: 122
Allocations for Program:ViaStruct5() (MethodHash=900a8869)
count: 1080, size: 91119, max = 3072
allocateMemory: 196608, nraUsed: 136464
Alloc'd bytes by kind:
kind | size | pct
---------------------+------------+--------
AssertionProp | 6460 | 7.09%
ASTNode | 15088 | 16.56%
InstDesc | 3880 | 4.26%
ImpStack | 0 | 0.00%
BasicBlock | 856 | 0.94%
fgArgInfo | 112 | 0.12%
fgArgInfoPtrArr | 16 | 0.02%
FlowList | 0 | 0.00%
TreeStatementList | 0 | 0.00%
SiScope | 0 | 0.00%
FlatFPStateX87 | 0 | 0.00%
DominatorMemory | 48 | 0.05%
LSRA | 3104 | 3.41%
LSRA_Interval | 1496 | 1.64%
LSRA_RefPosition | 3584 | 3.93%
Reachability | 16 | 0.02%
SSA | 2500 | 2.74%
ValueNumber | 13714 | 15.05%
LvaTable | 2421 | 2.66%
UnwindInfo | 0 | 0.00%
hashBv | 40 | 0.04%
bitset | 368 | 0.40%
FixedBitVect | 0 | 0.00%
Generic | 1608 | 1.76%
IndirAssignMap | 0 | 0.00%
FieldSeqStore | 1048 | 1.15%
ZeroOffsetFieldMap | 504 | 0.55%
ArrayInfoMap | 112 | 0.12%
MemoryPhiArg | 0 | 0.00%
CSE | 1504 | 1.65%
GC | 1750 | 1.92%
CorSig | 208 | 0.23%
Inlining | 5912 | 6.49%
ArrayStack | 704 | 0.77%
DebugInfo | 448 | 0.49%
DebugOnly | 22528 | 24.72%
Codegen | 0 | 0.00%
LoopOpt | 0 | 0.00%
LoopHoist | 0 | 0.00%
Unknown | 186 | 0.20%
RangeCheck | 0 | 0.00%
CopyProp | 904 | 0.99%
****** DONE compiling Program:ViaStruct5()
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