6502 tables for emulation / disassembly / assembly

6502.h

#include <stdint.h>

// fourcc function
static constexpr
uint32_t fourcc(const char (&in)[4]) {
    return ((in[0]<<24) | (in[1]<<16) | (in[3]<<8) | ' ');
}

// addressing mode types
enum {
    aIMM,
    aZPG,
    aZPX,
    aZPY,
    aABS,
    aABX,
    aABY,
    aIND,
    aINX,
    aINY,
    aACC,
    aREL,
    aIMP,
};

// status flag bits
enum {
    fCarry    = 0x01,
    fZero     = 0x02,
    fInterupt = 0x04,
    fDecimal  = 0x08,
    fOverflow = 0x40,
    fNegative = 0x80,
};

// mnemonic opcode table
enum m6502_mnemonics {
  iUNK = fourcc("   "),
  iADC = fourcc("ADC"),
  iAND = fourcc("AND"),
  iASL = fourcc("ASL"),
  iBCC = fourcc("BCC"),
  iBCS = fourcc("BCS"),
  iBEQ = fourcc("BEQ"),
  iBIT = fourcc("BIT"),
  iBMI = fourcc("BMI"),
  iBNE = fourcc("BNE"),
  iBPL = fourcc("BPL"),
  iBRK = fourcc("BRK"),
  iBVC = fourcc("BVC"),
  iBVS = fourcc("BVS"),
  iCLC = fourcc("CLC"),
  iCLD = fourcc("CLD"),
  iCLI = fourcc("CLI"),
  iCLV = fourcc("CLV"),
  iCMP = fourcc("CMP"),
  iCPX = fourcc("CPX"),
  iCPY = fourcc("CPY"),
  iDEC = fourcc("DEC"),
  iDEX = fourcc("DEX"),
  iDEY = fourcc("DEY"),
  iEOR = fourcc("EOR"),
  iINC = fourcc("INC"),
  iINX = fourcc("INX"),
  iINY = fourcc("INY"),
  iJMP = fourcc("JMP"),
  iJSR = fourcc("JSR"),
  iLDA = fourcc("LDA"),
  iLDX = fourcc("LDX"),
  iLDY = fourcc("LDY"),
  iLSR = fourcc("LSR"),
  iNOP = fourcc("NOP"),
  iORA = fourcc("ORA"),
  iPHA = fourcc("PHA"),
  iPHP = fourcc("PHP"),
  iPLA = fourcc("PLA"),
  iPLP = fourcc("PLP"),
  iROL = fourcc("ROL"),
  iROR = fourcc("ROR"),
  iRTI = fourcc("RTI"),
  iRTS = fourcc("RTS"),
  iSBC = fourcc("SBC"),
  iSEC = fourcc("SEC"),
  iSED = fourcc("SED"),
  iSEI = fourcc("SEI"),
  iSTA = fourcc("STA"),
  iSTX = fourcc("STX"),
  iSTY = fourcc("STY"),
  iTAX = fourcc("TAX"),
  iTAY = fourcc("TAY"),
  iTSX = fourcc("TSX"),
  iTXA = fourcc("TXA"),
  iTXS = fourcc("TXS"),
  iTYA = fourcc("TYA"),
};

// instruction mnemonic
static const uint8_t m6502_mnemonic[] = {
#define ___ 0
  "BRK ORA             ORA ASL     PHP ORA ASL         ORA ASL     "
  "BPL ORA             ORA ASL CLC     ORA             ORA ASL     "
  "JSR AND         BIT AND ROL     PLP AND ROL     BIT AND ROL     "
  "BMI AND             AND ROL     SEC AND             AND ROL     "
  "RTI EOR             EOR LSR     PHA EOR LSR     JMP EOR LSR     "
  "BVC EOR             EOR LSR     CLI EOR             EOR LSR     "
  "RTS ADC             ADC ROR     PLA ADC ROR     JMP ADC ROR     "
  "BVS ADC             ADC ROR     SEI ADC             ADC ROR     "
  "    STA         STY STA STX     DEY     TXA     STY STA STX     "
  "BCC STA         STY STA STX     TYA STA TXS         STA         "
  "LDY LDA LDX     LDY LDA LDX     TAY LDA TAX     LDY LDA LDX     "
  "BCS LDA         LDY LDA LDX     CLV LDA TSX     LDY LDA LDX     "
  "CPY CMP         CPY CMP DEC     INY CMP DEX     CPY CMP DEC     "
  "BNE CMP             CMP DEC     CLD CMP             CMP DEC     "
  "CPX SBC         CPX SBC INC     INX SBC NOP     CPX SBC INC     "
  "BEQ SBC             SBC INC     SED SBC             SBC INC     "
};

static const
uint32_t get_mnemonic(const uint8_t opcode) {
    return *(const uint32_t*)(m6502_mnemonic + opcode * 4);
}

// addressing modes
static const uint8_t m6502_addr_mode[] = {
#define ____ 0
  aIMP, aINX, ____, ____, ____, aZPG, aZPG, ____, aIMP, aIMM, aACC, ____, ____, aABS, aABS, ____, 
  aREL, aINY, ____, ____, ____, aZPX, aZPX, aIMP, ____, aABY, ____, ____, ____, aABX, aABX, ____, 
  aABS, aINX, ____, ____, aZPG, aZPG, aZPG, ____, aIMP, aIMM, aACC, ____, aABS, aABS, aABS, ____, 
  aREL, aINY, ____, ____, ____, aZPX, aZPX, ____, aIMP, aABY, ____, ____, ____, aABX, aABX, ____, 
  aIMP, aINX, ____, ____, ____, aZPG, aZPG, ____, aIMP, aIMM, aACC, ____, aABS, aABS, aABS, ____, 
  aREL, aINY, ____, ____, ____, aZPX, aZPX, ____, aIMP, aABY, ____, ____, ____, aABX, aABX, ____, 
  aIMP, aINX, ____, ____, ____, aZPG, aZPG, ____, aIMP, aIMM, aACC, ____, aIND, aABS, aABS, ____, 
  aREL, aINY, ____, ____, ____, aZPX, aZPX, ____, aIMP, aABY, ____, ____, ____, aABX, aABX, ____, 
  ____, aINX, ____, ____, aZPG, aZPG, aZPG, ____, aIMP, ____, aIMP, ____, aABS, aABS, aABS, ____, 
  aREL, aINY, ____, ____, aZPX, aZPX, aZPY, ____, aIMP, aABY, aIMP, ____, ____, aABX, ____, ____, 
  aIMM, aINX, aIMM, ____, aZPG, aZPG, aZPG, ____, aIMP, aIMM, aIMP, ____, aABS, aABS, aABS, ____, 
  aREL, aINY, ____, ____, aZPX, aZPX, aZPY, ____, aIMP, aABY, aIMP, ____, aABX, aABX, aABY, ____, 
  aIMM, aINX, ____, ____, aZPG, aZPG, aZPG, ____, aIMP, aIMM, aIMP, ____, aABS, aABS, aABS, ____, 
  aREL, aINY, ____, ____, ____, aZPX, aZPX, ____, aIMP, aABY, ____, ____, ____, aABX, aABX, ____, 
  aIMM, aINX, ____, ____, aZPG, aZPG, aZPG, ____, aIMP, aIMM, aIMP, ____, aABS, aABS, aABS, ____, 
  aREL, aINY, ____, ____, ____, aZPX, aZPX, ____, aIMP, aABY, ____, ____, ____, aABX, aABX, ____, 
#undef ____
};

// instruction length
static const uint8_t m6502_inst_len[] = {
#define _ 0
  1, 2, _, _, _, 2, 2, _, 1, 2, 1, _, _, 3, 3, _, 
  2, 2, _, _, _, 2, 2, 1, _, 3, _, _, _, 3, 3, _, 
  3, 2, _, _, 2, 2, 2, _, 1, 2, 1, _, 3, 3, 3, _, 
  2, 2, _, _, _, 2, 2, _, 1, 3, _, _, _, 3, 3, _, 
  1, 2, _, _, _, 2, 2, _, 1, 2, 1, _, 3, 3, 3, _, 
  2, 2, _, _, _, 2, 2, _, 1, 3, _, _, _, 3, 3, _, 
  1, 2, _, _, _, 2, 2, _, 1, 2, 1, _, 2, 3, 3, _, 
  2, 2, _, _, _, 2, 2, _, 1, 3, _, _, _, 3, 3, _, 
  _, 2, _, _, 2, 2, 2, _, 1, _, 1, _, 3, 3, 3, _, 
  2, 2, _, _, 2, 2, 2, _, 1, 3, 1, _, _, 3, _, _, 
  2, 2, 2, _, 2, 2, 2, _, 1, 2, 1, _, 3, 3, 3, _, 
  2, 2, _, _, 2, 2, 2, _, 1, 3, 1, _, 3, 3, 3, _, 
  2, 2, _, _, 2, 2, 2, _, 1, 2, 1, _, 3, 3, 3, _, 
  2, 2, _, _, _, 2, 2, _, 1, 3, _, _, _, 3, 3, _, 
  2, 2, _, _, 2, 2, 2, _, 1, 2, 1, _, 3, 3, 3, _, 
  2, 2, _, _, _, 2, 2, _, 1, 3, _, _, _, 3, 3, _, 
#undef _
};

// instruction flags affected
static const uint8_t m6502_inst_flags[] = {
#define ____ 0x00
  0x00, 0x02, ____, ____, ____, 0x02, 0x03, ____, 0x00, 0x02, 0x03, ____, ____, 0x02, 0x03, ____, 
  0x00, 0x02, ____, ____, ____, 0x02, 0x03, 0x01, ____, 0x02, ____, ____, ____, 0x02, 0x03, ____, 
  0x00, 0x02, ____, ____, 0xc2, 0x02, 0x03, ____, 0x00, 0x02, 0x03, ____, 0xc2, 0x02, 0x03, ____, 
  0x00, 0x02, ____, ____, ____, 0x02, 0x03, ____, 0x01, 0x02, ____, ____, ____, 0x02, 0x03, ____, 
  0x4f, 0x02, ____, ____, ____, 0x02, 0x03, ____, 0x00, 0x02, 0x03, ____, 0x00, 0x02, 0x03, ____, 
  0x00, 0x02, ____, ____, ____, 0x02, 0x03, ____, 0x00, 0x02, ____, ____, ____, 0x02, 0x03, ____, 
  0x00, 0x43, ____, ____, ____, 0x43, 0x03, ____, 0x00, 0x43, 0x03, ____, 0x00, 0x43, 0x03, ____, 
  0x00, 0x43, ____, ____, ____, 0x43, 0x03, ____, 0x04, 0x43, ____, ____, ____, 0x43, 0x03, ____, 
  ____, 0x00, ____, ____, 0x00, 0x00, 0x00, ____, 0x02, ____, 0x02, ____, 0x00, 0x00, 0x00, ____, 
  0x00, 0x00, ____, ____, 0x00, 0x00, 0x00, ____, 0x02, 0x00, 0x00, ____, ____, 0x00, ____, ____, 
  0x02, 0x02, 0x02, ____, 0x02, 0x02, 0x02, ____, 0x02, 0x02, 0x02, ____, 0x02, 0x02, 0x02, ____, 
  0x00, 0x02, ____, ____, 0x02, 0x02, 0x02, ____, 0x40, 0x02, 0x00, ____, 0x02, 0x02, 0x02, ____, 
  0x03, 0x03, ____, ____, 0x03, 0x03, 0x02, ____, 0x00, 0x03, 0x02, ____, 0x03, 0x03, 0x02, ____, 
  0x00, 0x03, ____, ____, ____, 0x03, 0x02, ____, 0x08, 0x03, ____, ____, ____, 0x03, 0x02, ____, 
  0x03, 0x43, ____, ____, 0x03, 0x43, 0x02, ____, 0x02, 0x43, 0x00, ____, 0x03, 0x43, 0x02, ____, 
  0x00, 0x43, ____, ____, ____, 0x43, 0x02, ____, 0x08, 0x43, ____, ____, ____, 0x43, 0x02, ____, 
#undef ____
};