Created
July 14, 2021 16:46
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Gameboy APU basis
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module pulse_t( | |
input CLK12, | |
input TICK, | |
input [10:0] PERIOD, | |
output BIT); | |
reg [10:0] counter; | |
always @(posedge CLK12) begin | |
if (TICK) begin | |
counter <= (counter == 'd0) ? PERIOD : (counter - 'd1); | |
end | |
end | |
endmodule | |
module gameboy_apu_t( | |
input CLK12, | |
input [5:0] ADDR, | |
input [7:0] DATA, | |
input WR, | |
output [15:0] OUTPUT); | |
wire pulse0_out; | |
pulse_t pulse0(CLK12, tick, pulse0_period, pulse0_out); | |
// apu register file | |
reg [7:0] apu_reg[48]; | |
wire [10:0] pulse0_period = { apu_reg[ 4][2:0], apu_reg[ 3][7:0] }; | |
wire [10:0] pulse1_period = { apu_reg[ 9][2:0], apu_reg[ 8][7:0] }; | |
wire [10:0] wave_period = { apu_reg['he][2:0], apu_reg['hd][7:0] }; | |
// divide 12Mhz to ~1Mhz (12Mhz / 11) | |
// target is 1048576 | |
// actual is 1090909 | |
reg [3:0] clk_div; | |
wire tick = (clk_div == 0); | |
always @(posedge CLK12) begin | |
clk_div <= (clk_div == 0) ? 10 : clk_div - 'd1; | |
end | |
// update register file | |
always @(posedge CLK12) begin | |
if (WR && ADDR < 'd48) begin | |
apu_reg[ ADDR ] = DATA; | |
end | |
end | |
endmodule |
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