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bkrepo/meson64_odroidc2.dts

Last active January 31, 2017 04:41
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ODROID-C2 dts file for UART_A, UART_Band UART_C ports
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meson64_odroidc2.dts
/*
* AMLogic's S905 based ODROID-C2 board device tree source
*
* Copyright (c) 2015 Hardkernel Co., Ltd.
* http://www.hardkernel.com
*
* Device tree source file for Hardkernel's ODROID-C2 board based on AMLogic's
* S905 SoC.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/gxbb.h>
#include <dt-bindings/gpio/gxbb.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/reset/aml_gxbb.h>
#include "amlogic/mesongxbb.dtsi"
/ {
compatible = "amlogic, Gxbb";
model = "ODROID-C2";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
aliases {
serial0 = &uart_AO;
serial1 = &uart_A;
serial2 = &uart_B;
serial3 = &uart_C;
};
gpu_dvfs_tbl: gpu_dvfs_tbl {
sc_mpp = <3>; /* number of pp used most of time.*/
tbl = <&clk285_cfg
&clk400_cfg
&clk500_cfg
&clk666_cfg
&clk800_cfg>;
};
gpiomem {
compatible = "amlogic,meson-gpiomem";
reg = <0x0 0xc8834000 0x0 0x1000>;
status = "okay";
};
memory@00000000 {
device_type = "memory";
linux,usable-memory = <0x0 0x1000000 0x0 0x7f000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* global autoconfigured region for contiguous allocations */
secmon_reserved:linux,secmon {
compatible = "aml_secmon_memory";
reg = <0x0 0x10000000 0x0 0x200000>;
no-map;
};
fb_reserved:linux,meson-fb {
compatible = "amlogic, fb-memory";
size = <0x0 0x8000000>;
no-map;
};
di_reserved:linux,di {
compatible = "amlogic, di-mem";
size = <0x0 0x1e00000>; //10x1920x1088x3/2=30M
//no-map;
multi-use;
};
ion_reserved:linux,ion-dev {
compatible = "amlogic, idev-mem";
size = <0x0 0x2000000>;
multi-use;
};
/* POST PROCESS MANAGER */
//ppmgr_reserved:linux,ppmgr {
// compatible = "amlogic, ppmgr_memory";
// size = <0x0 0x2000000>;
//};
/* vdec CMA pool */
codec_mm_cma:linux,codec_mm_cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0xbc00000>;
alignment = <0x0 0x400000>;
linux,contiguous-region;
};
picdec_cma_reserved:linux,picdec {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x3000000>;
alignment = <0x0 0x400000>;
linux,contiguous-region;
};
/* codec shared reserved */
codec_mm_reserved:linux,codec_mm_reserved {
compatible = "amlogic, codec-mm-reserved";
size = <0x0 0x4100000>;
alignment = <0x0 0x100000>;
//no-map;
};
};
meson-vout {
compatible = "amlogic, meson-vout";
dev_name = "meson-vout";
status = "okay";
};
meson-fb {
compatible = "amlogic, meson-fb";
memory-region = <&fb_reserved>;
dev_name = "meson-fb";
status = "okay";
interrupts = <0 3 1
0 89 1>;
interrupt-names = "viu-vsync", "rdma";
mem_size = <0x06000000 0x00100000>; /* fb0/fb1 memory size */
vmode = <3>; /* 1080p60hz */
scale_mode = <1>;
4k2k_fb = <1>;
display_size_default = <1920 1080 1920 2160 32>;
};
ge2d {
compatible = "amlogic, ge2d";
dev_name = "ge2d";
status = "okay";
interrupts = <0 150 1>;
interrupt-names = "ge2d";
clocks = <&clock CLK_VAPB_0>,
<&clock CLK_GE2D>;
clock-names = "clk_vapb_0",
"clk_ge2d";
resets = <&clock GCLK_IDX_GE2D>;
reset-names = "ge2d";
};
codec_io {
compatible = "amlogic, codec_io";
#address-cells=<2>;
#size-cells=<2>;
ranges;
io_cbus_base{
reg = <0x0 0xC1100000 0x0 0x100000>;
};
io_dos_base{
reg = <0x0 0xc8820000 0x0 0x10000>;
};
io_hiubus_base{
reg = <0x0 0xc883c000 0x0 0x2000>;
};
io_aobus_base{
reg = <0x0 0xc8100000 0x0 0x100000>;
};
io_vcbus_base{
reg = <0x0 0xd0100000 0x0 0x40000>;
};
io_dmc_base{
reg = <0x0 0xc8838000 0x0 0x400>;
};
};
codec_mm {
compatible = "amlogic, codec, mm";
memory-region = <&codec_mm_cma &codec_mm_reserved>;
dev_name = "codec_mm";
status = "okay";
};
ethmac: ethernet@0xc9410000{
compatible = "amlogic, gxbb-rgmii-dwmac";
reg = <0x0 0xc9410000 0x0 0x10000
0x0 0xc8834540 0x0 0x8>;
interrupts = <0 8 1>;
phy-mode= "rgmii";
pinctrl-names = "eth_pins";
pinctrl-0 = <&eth_pins>;
rst_pin-gpios = <&gpio GPIOZ_14 0>;
mc_val = <0x1621>;
resets = <&clock GCLK_IDX_ETHERNET>;
reset-names = "ethpower";
interrupt-names = "macirq";
clocks = <&clock CLK_81>;
clock-names = "ethclk81";
};
mesonstream {
compatible = "amlogic, codec, streambuf";
dev_name = "mesonstream";
status = "okay";
resets = <&clock GCLK_IDX_HIU_PARSER_TOP
&clock GCLK_IDX_VPU_INTR
&clock GCLK_IDX_DEMUX
&clock GCLK_IDX_DOS>;
reset-names = "parser_top",
"vpu_intr",
"demux",
"vdec";
};
amvideocap {
compatible = "amlogic, amvideocap";
dev_name = "amvideocap.0";
status = "okay";
};
ion_dev {
compatible = "amlogic, ion_dev";
memory-region = <&ion_reserved>;
};
vdec {
compatible = "amlogic, vdec";
dev_name = "vdec.0";
status = "okay";
interrupts = <0 3 1
0 23 1
0 32 1
0 43 1
0 44 1
0 45 1>;
interrupt-names = "vsync",
"demux",
"parser",
"mailbox_0",
"mailbox_1",
"mailbox_2";
};
picdec {
compatible = "amlogic, picdec";
memory-region = <&picdec_cma_reserved>;
dev_name = "picdec";
status = "okay";
};
ppmgr {
compatible = "amlogic, ppmgr";
memory-region = <&ion_reserved>;
dev_name = "ppmgr";
status = "okay";
};
deinterlace {
compatible = "amlogic, deinterlace";
status = "okay";
memory-region = <&di_reserved>;
interrupts = <0 46 1
0 6 1>;
interrupt-names = "de_irq",
"timerc";
buffer-size = <3133440>; //1920x1088x3/2
hw-version = <2>;
};
amvdec_656in0 {
compatible = "amlogic, amvdec_656in";
dev_name = "amvdec_656in0";
status = "ok";
reg = <0x0 0xd0048000 0x0 0x7c>;
clocks = <&clock CLK_FPLL_DIV2>,
<&clock CLK_BT656_CLK0>;
clock-names = "fclk_div2", "cts_bt656_clk0";
bt656_id = <0>;
};
amvdec_656in1 {
compatible = "amlogic, amvdec_656in";
dev_name = "amvdec_656in1";
status = "ok";
reg = <0x0 0xd0050000 0x0 0x7c>;
clocks = <&clock CLK_FPLL_DIV2>,
<&clock CLK_BT656_CLK1>;
clock-names = "fclk_div2", "cts_bt656_clk1";
bt656_id = <1>;
};
amvenc_avc{
compatible = "amlogic, amvenc_avc";
//memory-region = <&amvenc_avc_reserved>;
dev_name = "amvenc_avc";
status = "okay";
interrupts = <0 45 1>;
interrupt-names = "mailbox_2";
};
vpu {
compatible = "amlogic, vpu";
dev_name = "vpu";
status = "ok";
clk_level = <7>;
/** 0: 100.0M 1: 166.7M 2: 200.0M
3: 250.0M 4: 333.3M 5: 400.0M
6: 500.0M 7: 666.7M */
};
sd {
compatible = "amlogic, aml_sd_emmc";
dev_name = "aml_newsd.0";
status = "okay";
reg = <0x0 0xd0072000 0x0 0x2000>;
interrupts = <0 217 1
0 67 1
0 69 1>;
pinctrl-names = "sd_clk_cmd_pins", "sd_all_pins";
pinctrl-0 = <&sd_clk_cmd_pins>;
pinctrl-1 = <&sd_all_pins>;
sd {
status = "okay";
pinname = "sd";
ocr_avail = <0x00200080>;
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED",
"MMC_CAP_UHS_SDR50",
"MMC_CAP_UHS_SDR104";
f_min = <400000>;
f_max = <85000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio CARD_4 GPIO_ACTIVE_HIGH>;
jtag_pin = <&gpio CARD_0 GPIO_ACTIVE_HIGH>;
gpio_cd = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
gpio_volsw = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>;
gpio_power = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
power_level = <1>;
irq_in = <3>;
irq_out = <5>;
card_type = <5>;
};
};
emmc {
compatible = "amlogic, aml_sd_emmc";
dev_name = "aml_newsd.0";
status = "okay";
reg = <0x0 0xd0074000 0x0 0x2000>;
interrupts = <0 218 1>;
pinctrl-names = "emmc_clk_cmd_pins", "emmc_all_pins";
pinctrl-0 = <&emmc_clk_cmd_pins>;
pinctrl-1 = <&emmc_all_pins>;
emmc {
status = "okay";
pinname = "emmc";
ocr_avail = <0x200080>;
caps = "MMC_CAP_8_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED",
"MMC_CAP_NONREMOVABLE",
"MMC_CAP_1_8V_DDR",
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE";
caps2 = "MMC_CAP2_HS200_1_8V_SDR",
"MMC_CAP2_HS400_1_8V",
"MMC_CAP2_BROKEN_VOLTAGE",
"MMC_CAP2_BOOTPART_NOACC";
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**256KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
card_type = <1>;
};
};
amhdmitx: amhdmitx{
compatible = "amlogic, amhdmitx";
dev_name = "amhdmitx";
status = "okay";
pinctrl-names="hdmitx_hpd", "hdmitx_ddc";
pinctrl-0=<&hdmitx_hpd>;
pinctrl-1=<&hdmitx_ddc>;
vend-data = <&vend_data>;
/* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/
interrupts = <0 57 1>;
interrupt-names = "hdmitx_hpd";
clocks = <&clock CLK_HDMITX_SYS
&clock CLK_HDMITX_ENCP
&clock CLK_HDMITX_ENCI
&clock CLK_HDMITX_PIXEL
&clock CLK_HDMITX_PHY
&clock CLK_VID>;
clock-names = "hdmitx_clk_sys",
"hdmitx_clk_encp",
"hdmitx_clk_enci",
"hdmitx_clk_pixel",
"hdmitx_clk_phy",
"hdmitx_clk_vid";
vend_data: vend_data {
compatible = "amlogic, amlogic-cec";
status = "okay";
vendor_name = "Hardkernel";
vendor_id = <0x000000>;
product_desc = "ODROID-C2";
cec_osd_string = "ODROID-C2";
interrupts = <0 199 1>;
interrupt-names = "hdmitx_cec";
pinctrl-names = "hdmitx_aocec";
pinctrl-0 = <&hdmitx_aocec>;
};
};
aocec: aocec{
compatible = "amlogic, amlogic-aocec";
device_name = "aocec";
status = "okay";
vendor_name = "Hardkernel"; /* Max Chars: 8 */
vendor_id = <0x000000>; /* Refer to http://standards.ieee.org/develop/regauth/oui/oui.txt */
product_desc = "ODROID-C2"; /* Max Chars: 16 */
cec_osd_string = "ODROID-C2"; /* Max Chars: 14 */
port_num = <3>;
arc_port_mask = <0x0>;
interrupts = <0 199 1>;
interrupt-names = "hdmi_aocec";
pinctrl-names = "hdmitx_aocec";
pinctrl-0=<&hdmitx_aocec>;
reg = <0x0 0xc810023c 0x0 0x4
0x0 0xc8100000 0x0 0x200
0x0 0xda83e000 0x0 0x10>;
};
uart_AO: serial@c81004c0 {
compatible = "amlogic, meson-uart";
reg = <0x0 0xc81004c0 0x0 0x14>;
interrupts = <0 193 1>;
status = "okay";
clocks = <&clock CLK_XTAL>;
clock-names = "clk_uart";
fifosize = < 64 >;
pinctrl-names = "default";
pinctrl-0 = <&ao_uart_pins>;
};
uart_A: serial@c11084c0 {
compatible = "amlogic, meson-uart";
reg = <0x0 0xc11084c0 0x0 0x14>;
interrupts = <0 26 1>;
status = "okay";
clocks = <&clock CLK_XTAL>;
clock-names = "clk_uart";
fifosize = < 128 >;
pinctrl-names = "default";
pinctrl-0 = <&a_uart_pins>;
};
uart_B: serial@c11084dc {
compatible = "amlogic, meson-uart";
reg = <0x0 0xc11084dc 0x0 0x18>;
interrupts = <0 75 1>;
status = "okay";
clocks = <&clock CLK_XTAL>;
clock-names = "clk_uart";
fifosize = < 64 >;
pinctrl-names = "default";
pinctrl-0 = <&b_uart_pins>;
resets = <&clock GCLK_IDX_UART1>;
};
uart_C: serial@c1108700 {
compatible = "amlogic, meson-uart";
reg = <0x0 0xc1108700 0x0 0x14>;
interrupts = <0 93 1>;
status = "okay";
clocks = <&clock CLK_XTAL>;
clock-names = "clk_uart";
fifosize = < 64 >;
pinctrl-names = "default";
pinctrl-0 = <&c_uart_pins>;
resets = <&clock GCLK_IDX_UART2>;
};
canvas {
compatible = "amlogic, meson, canvas";
dev_name = "amlogic-canvas";
status = "ok";
reg = <0x0 0xc8838000 0x0 0x400>;
};
rdma {
compatible = "amlogic, meson, rdma";
dev_name = "amlogic-rdma";
status = "ok";
interrupts = <0 89 1>;
interrupt-names = "rdma";
};
dwc2_b {
compatible = "amlogic,dwc2";
reg = <0x0 0xc9100000 0x0 0x40000>;
interrupts = <0 31 4>;
status = "okay";
pl-periph-id = <1>;
clock-src = "usb1";
port-id = <1>;
port-type = <1>;
port-speed = <0>;
port-config = <0>;
port-dma = <0>;
port-id-mode = <1>;
gpio-hub-rst = "GPIOAO_4";
gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>;
phy-reg = <0xc0000020>;
phy-reg-size = <0x20>;
usb-fifo = <1024>;
host-only-core = <1>;
pmu-apply-power = <1>;
cpu-type = "gxbaby";
resets = <&clock GCLK_IDX_USB_GENERAL
&clock GCLK_IDX_MISC_USB1_TO_DDR
&clock GCLK_IDX_USB1>;
reset-names = "usb_general",
"usb1",
"usb1_to_ddr";
};
odroid_sysfs {
compatible = "odroid-sysfs";
};
dwc2_a {
compatible = "amlogic,dwc2";
reg = <0x0 0xc9000000 0x0 0x40000>;
interrupts = <0 30 4>;
status = "okay";
pl-periph-id = <0>;
clock-src = "usb0";
port-id = <0>;
port-type = <0>;
port-speed = <0>;
port-config = <0>;
port-dma = <0>;
port-id-mode = <0>;
gpio-vbus-power = "GPIOAO_5";
gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
gpio-work-mask = <1>;
phy-reg = <0xc0000000>;
phy-reg-size = <0x20>;
usb-fifo = <1024>;
cpu-type = "gxbaby";
resets = <&clock GCLK_IDX_USB_GENERAL
&clock GCLK_IDX_MISC_USB0_TO_DDR
&clock GCLK_IDX_USB0>;
reset-names = "usb_general",
"usb0",
"usb0_to_ddr";
};
i2s_dai: I2S {
compatible = "amlogic, aml-i2s-dai";
#sound-dai-cells = <0>;
resets = <&clock GCLK_IDX_AIU_AI_TOP_GLUE
&clock GCLK_IDX_AUD_BUF_ABD
&clock GCLK_IDX_AIU_I2S_OUT
&clock GCLK_IDX_AIU_AMCLK_MEASURE
&clock GCLK_IDX_AIU_AIFIFO2
&clock GCLK_IDX_AIU_AUD_MIXER
&clock GCLK_IDX_AIU_MIXER_REG
&clock GCLK_IDX_AIU_ADC
&clock GCLK_IDX_AIU_TOP_LEVEL
&clock GCLK_IDX_AIU_AOCLK
&clock GCLK_IDX_AUD_IN>;
reset-names = "top_glue",
"aud_buf",
"i2s_out",
"amclk_measure",
"aififo2",
"aud_mixer",
"mixer_reg",
"adc",
"top_level",
"aoclk",
"aud_in";
clocks = <&clock CLK_MPLL0>,
<&clock CLK_AMCLK>;
clock-names = "mpll0",
"mclk";
};
i2s_plat: i2s_platform {
compatible = "amlogic, aml-i2s";
};
spdif_dai: SPDIF {
compatible = "amlogic, aml-spdif-dai";
#sound-dai-cells = <0>;
resets = <&clock GCLK_IDX_AIU_IEC958
&clock GCLK_IDX_AIU_ICE958_AMCLK>;
reset-names = "iec958",
"iec958_amclk";
clocks = <&clock CLK_MPLL1>,
<&clock CLK_I958>,
<&clock CLK_AMCLK>,
<&clock CLK_SPDIF>;
clock-names = "mpll1",
"i958",
"mclk",
"spdif";
};
spdif_codec: spdif_codec{
#sound-dai-cells = <0>;
compatible = "amlogic, aml-spdif-codec";
pinctrl-names = "aml_audio_spdif";
pinctrl-0 = <&audio_spdif_pins>;
};
pcm_dai: PCM {
#sound-dai-cells = <0>;
compatible = "amlogic, aml-pcm-dai";
};
pcm_plat: pcm_platform {
compatible = "amlogic, aml-pcm";
};
pcm_codec: pcm_codec{
#sound-dai-cells = <0>;
compatible = "amlogic, pcm2BT-codec";
};
/* AUDIO board specific */
dummy_codec:dummy{
#sound-dai-cells = <0>;
compatible = "amlogic, aml_dummy_codec";
status = "okay";
};
pcm5102_codec:pcm5102{
#sound-dai-cells = <0>;
compatible = "hardkernel, pcm5102";
status = "okay";
};
odroid_hdmi {
compatible = "sound_card, odroid_hdmi";
status = "okay";
aml-sound-card,format = "i2s";
aml_sound_card,name = "ODROID-HDMI";
cpu_list = <&i2sdai0>;
codec_list = <&dit0>;
plat_list = <&i2s_plat>;
i2sdai0: i2sdai0 {
sound-dai = <&i2s_dai>;
};
dit0: dit0 {
sound-dai = <&spdif_codec>;
};
};
odroid_dac {
compatible = "sound_card, odroid_dac";
status = "okay";
aml-sound-card,format = "i2s";
aml_sound_card,name = "ODROID-DAC";
pinctrl-names = "aml_snd_i2s";
pinctrl-0 = <&audio_pins>;
cpu_list = <&cpudai0>;
codec_list = <&codec0>;
plat_list = <&i2s_plat>;
cpudai0: cpudai0 {
sound-dai = <&i2s_dai>;
};
codec0: codec0 {
sound-dai = <&pcm5102_codec>;
};
};
odroid_dac2{
compatible = "sound_card, odroid_dac2";
aml,sound_card = "ODROID-DAC2";
pinctrl-names = "odroid_i2s";
pinctrl-0 = <&audio_pins>;
status = "okay";
};
/* END OF AUDIO board specific */
aml_sensor0: aml-sensor@0 {
compatible = "amlogic, aml-thermal";
#thermal-sensor-cells = <1>;
cpu_dyn_coeff = <140>;
/* cpu_freq gpu_freq cpu_core gpu_core */
min_state = <500000 400 1 2>;
gpu_dyn_coeff = <437>;
};
cpucore:thermal_cpu_cores {
#cooling-cells = <2>; /* min followed by max */
};
thermal-zones {
soc_thermal {
polling-delay = <1000>;
polling-delay-passive = <100>;
sustainable-power = <3600>;
thermal-sensors = <&aml_sensor0 3>;
trips {
warm: trip-point@0 {
temperature = <85000>;
hysteresis = <1000>;
type = "passive";
};
control: trip-point@1 {
temperature = <90000>;
hysteresis = <1000>;
type = "passive";
};
hot: trip-point@2 {
temperature = <100000>;
hysteresis = <1000>;
type = "passive";
};
critical: trip-point@3 {
temperature = <105000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
cpufreq_cooling_map0 {
trip = <&control>;
cooling-device = <&cpus 0 2>;
contribution = <100>;
};
cpufreq_cooling_map1 {
trip = <&hot>;
cooling-device = <&cpus 3 4>;
contribution = <100>;
};
cpucore_cooling_map {
trip = <&control>;
cooling-device = <&cpucore 0 2>;
contribution = <1024>;
};
gpufreq_cooling_map0 {
trip = <&control>;
cooling-device = <&gpu 0 2>;
contribution = <100>;
};
gpufreq_cooling_map1 {
trip = <&hot>;
cooling-device = <&gpu 3 4>;
contribution = <100>;
};
};
};
};
saradc: saradc {
compatible = "amlogic, saradc";
status = "okay";
interrupts = <0 9 1>;
interrupt-names = "saradc_int";
clocks = <&clock CLK_XTAL>;
clock-names = "saradc_clk";
reg = <0x0 0xc1108680 0x0 0x30
0x0 0xc883c3d8 0x0 0x08>;
};
leds: gpio_leds {
compatible = "gpio-leds";
pinctrl-names = "led_pins";
pinctrl-0 = <&led_pins>;
/* Blue LED */
heartbeat {
label = "blue:heartbeat";
gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
};
onewire: onewire {
compatible = "w1-gpio";
gpios = <&gpio GPIOX_21 0>;
};
pwm{
compatible = "amlogic, odroid-pwm";
dev_name = "meson_pwm";
status = "ok";
pinctrl-names = "odroid_pwm0","odroid_pwm1";
pinctrl-0 = <&odroid_pwm0>;
pinctrl-1 = <&odroid_pwm1>;
};
pwm-ctrl {
compatible = "amlogic, pwm-ctrl";
dev_name = "pwm-ctrl";
status = "ok";
};
spi-gpio {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
status = "ok";
id = <0>;
gpio-sck = <&gpio GPIOX_2 0>;
gpio-miso = <&gpio GPIOX_4 0>;
gpio-mosi = <&gpio GPIOX_7 0>;
cs-gpios = <&gpio GPIOX_1 0
&gpio GPIOY_14 0>;
num-chipselects = <2>;
/* clients */
spidev0: spi-gpio@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <500000>;
};
};
meson-ir {
compatible = "amlogic, meson6-ir";
reg = <0x0 0xc8100580 0x0 0x20>;
interrupts = <0 196 1>;
pinctrl-names = "default";
pinctrl-0 = <&remote_pins>;
pulse-inverted;
status = "ok";
};
};
&i2c_b {
status = "okay";
/* Hardkernel I2C 3.5" Touchscreen */
/* drivers/input/sx865x.c */
sx865x: sx865x@49 {
status = "okay";
compatible = "semtech,sx8650";
reg = <0x49>;
#clock-cells = <0>;
/* H/W Pin control setup */
gpio-pendown = <&gpio GPIOY_7 0>;
gpio-reset = <&gpio GPIOY_13 0 >;
/* platform data setup */
invert-x = <0>;
invert-y = <1>;
swap-xy = <1>;
};
};
&pinmux {
audio_pins:audio_pin{
amlogic,setmask = <AO 0x78000000>;
amlogic,clrmask = <AO 0x40000>;
amlogic,pins = "GPIOAO_8",
"GPIOAO_9",
"GPIOAO_10",
"GPIOAO_11";
};
audio_spdif_pins:audio_pin1{
amlogic,setmask = <AO 0x10000>;
amlogic,clrmask = <AO 0x40000>;
amlogic,pins = "GPIOAO_6";
};
led_pins: led_pin {
amlogic,setmask = <AO 0x00000>;
amlogic,clrmask = <AO 0x80000018>;
amlogic,pins = "GPIOAO_13";
};
odroid_pwm0: odroid_pwm0 {
amlogic,setmask=<3 0x00020000>;
amlogic,clrmask=<3 0x00000200>;
amlogic,pins="GPIOX_6";
};
odroid_pwm1: odroid_pwm1 {
amlogic,setmask=<3 0x00020000
3 0x00060000>;
amlogic,clrmask=<3 0x00000300
8 0x00000800>;
amlogic,pins="GPIOX_6","GPIOX_7";
};
};
&efuse {
status = "okay";
};
&amlwatchdog {
status = "okay";
};
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