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>>> import pyb | |
>>> pyb.LED(1).on() | |
>>> pyb.LED(1).off() | |
>>> |
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from machine import Clock, PWM, Pin | |
import time | |
Clock(Clock.PWM, enable=False, source=Clock.OSC, divi=6, divf=0, mash=0) | |
Clock(Clock.PWM, enable=True) | |
# set PWM to serializer mode, inverted (1 = L, 0 = H), FIFO enabled | |
p0 = PWM(Pin(18), mode=PWM.MODE_SERIALIZER, active=0, tick_hz=3200000, duty_ticks=0, period=32, ms=PWM.MS_ENABLE, polarity=1, use_fifo=1, fifo_repeat=0) | |
p1 = PWM(1, active=0, period=32, use_fifo=1) # both two PWMs must be fifo enabled (chip bug?) |
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def uint32(x): | |
if x & 0x8000000: | |
x = x - 0xffffffff - 1 | |
return x | |
def byte2pwm(b): | |
bits = "{:08b}".format(b) | |
data = 0 | |
for c in bits: | |
data = (data << 4) | (0b1000 if c == '0' else 0b1110) |
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import gpu | |
import framebuf | |
class RPiScreen(framebuf.FrameBuffer): | |
def __init__(self, width, height): | |
self.width = width | |
self.height = height | |
gpu.fb_init(width,height,screen_w=1920,screen_h=1080) | |
super().__init__(gpu.fb_data(),width,height,framebuf.RGB565) | |
self |
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import os | |
from fbconsole import FBConsole | |
from rpi import RPiScreen | |
scr = FBConsole(RPiScreen(480,270)) | |
os.dupterm(scr) |
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import framebuf | |
import uio | |
HEX="0123456789ABCDEF" | |
class DumpConsole(uio.IOBase): | |
def __init__(self, fb, bgcolor=0, fgcolor=-1, width=-1, height=-1, readobj=None): | |
self.readobj = readobj | |
self.fb = fb | |
if width > 0: |
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from machine import SD | |
import os | |
sd = SD() | |
sd.ioctl(1,0) | |
def pr(buf): | |
l=len(buf) | |
c=0 | |
while(c<l): |
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from machine import SD | |
import os | |
sd = SD() | |
os.mount(sd, '/sd') | |
os.chdir('/sd') | |
os.listdir() | |
f=open('wtest2.txt','w') | |
f.write("MicroPython!") |
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# Set TXON and/or RXON to begin operation. | |
mem32[CS_A] |= 1 | |
mem32[CS_A] |= 1<<15 | 1<<16 | |
mem32[CS_A] |= 1<<2 | |
# Poll TXW writing sample words to PCMFIFO and RXR reading sample words from PCMFIFO | |
# until all data is transferred. | |
print("transmit start") | |
while True: | |
while(mem32[CS_A] & (1<<17))==0: |
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# Set the EN bit to enable the PCM block. | |
mem32[CS_A] = 1 | |
# Set all operational values to define the frame and channel settings. | |
mem32[MODE_A] = 1<<24 | 1<<22 | 1<<20 | 31<<10 | 16 | |
mem32[TXC_A] = 1<<30 | 1<<20 | (16-8)<<16 | 1<<14 | 17<<4 | (16-8) | |
# Assert RXCLR and/or TXCLR wait for 2 PCM clocks to ensure the FIFOs are reset. | |
mem32[CS_A] |= 1<<4 | 1<<3 | |
# The SYNC bit can be used to determine when 2 clocks have passed. | |
mem32[CS_A] |= 1<<24 | |
while (mem32[CS_A] & 1<<24) == 0: |