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@bugobliterator
Created November 16, 2023 23:57
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```
# This is an STM32H757I-EVAL board with a single STM32H757XIHx chip
#
# Generated by STM32CubeIDE
# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s)
source [find interface/stlink.cfg]
transport select swd
set WORKAREASIZE 0x8000
#transport select "dapdirect_swd"
# set CHIPNAME STM32H757XIHx
#set BOARDNAME STM32H757I-EVAL
# Enable debug when in low power modes
set ENABLE_LOW_POWER 1
# Stop Watchdog counters when halt
set STOP_WATCHDOG 1
# STlink Debug clock frequency
set CLOCK_FREQ 8000
# Reset configuration
# use hardware reset, connect under reset
# connect_assert_srst needed if low power mode application running (WFI...)
# reset_config trst_and_srst srst_nogate connect_assert_srst
# set CONNECT_UNDER_RESET 1
# set CORE_RESET 0
# ACCESS PORT NUMBER
set AP_NUM 0
# GDB PORT
set GDB_PORT 3333
set DUAL_BANK 1
set DUAL_CORE 1
# BCTM CPU variables
source [find target/stm32h7x_dual_bank.cfg]
#SWV trace
tpiu config disable
gdb_memory_map disable
init
#stm32h7x mass_erase 0
$_CHIPNAME.cpu0 configure -rtos chibios
$_CHIPNAME.cpu1 configure -rtos chibios
```
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