GBA.md

http://www.z80.info/zip/z80cpu_um.pdf

http://marc.rawer.de/Gameboy/Docs/GBCPUman.pdf

• http://clrhome.org/table/
• http://z80-heaven.wikidot.com/opcode-reference-chart

http://www.devrs.com/gb/files/opcodes.html

http://pastraiser.com/cpu/gameboy/gameboy_opcodes.html

// #include "cpu.h"
#include <stdio.h>

#define REG_AMOUNT 6

static unsigned short cache[REG_AMOUNT] = {};

// 1 BYTE REG
#define ADDR_F  0
#define ADDR_A  1
#define ADDR_B  3
#define ADDR_C  2
#define ADDR_D  5
#define ADDR_E  4
#define ADDR_H  7
#define ADDR_L  6

// 2 BYTE REG
#define ADDR_BC 1
#define ADDR_DE 2
#define ADDR_HL 3
#define ADDR_SP 4
#define ADDR_PC 5

// 8-bit registers
#define F   ((unsigned char *)cache)[ADDR_F]
#define A   ((unsigned char *)cache)[ADDR_A]
#define B   ((unsigned char *)cache)[ADDR_B]
#define C   ((unsigned char *)cache)[ADDR_C]
#define D   ((unsigned char *)cache)[ADDR_D]
#define E   ((unsigned char *)cache)[ADDR_E]
#define H   ((unsigned char *)cache)[ADDR_H]
#define L   ((unsigned char *)cache)[ADDR_L]

// 16-bit registers
#define BC  cache[ADDR_BC]
#define DE  cache[ADDR_DE]
#define HL  cache[ADDR_HL]
#define SP  cache[ADDR_SP]  // stack pointer
#define PC  cache[ADDR_PC]  // program counter

// Flag register (F) bits:
#define F_Z_BIT 7   // Zero Flag
#define F_N_BIT 6   // Subtract Flag
#define F_H_BIT 5   // Half Carry Flag
#define F_C_BIT 4   // Carry Flag
#define F_Z     F>>F_Z_BIT&0x01;
#define F_N     F>>F_N_BIT&0x01;
#define F_H     F>>F_H_BIT&0x01;
#define F_C     F>>F_C_BIT&0x01;


int main()
{
    F = 0xF;
    A = 0xA;
    B = 0xB;
    C = 0xC;
    D = 0xD;
    E = 0xE;
    H = 0x1;
    L = 0x2;
    SP = 0x0F;
    PC = 0xF0;
    printf("hello\n");
    printf("00:\t%04X\n", cache[0]);
    printf("02:\t%04X\n", cache[1]);
    printf("04:\t%04X\n", cache[2]);
    printf("06:\t%04X\n", cache[3]);
    printf("08:\t%04X\n", cache[4]);
    printf("0A:\t%04X\n", cache[5]);
    return 0;
}

void (*op_map[0xFF])(void) = {};

static void NOP() {
    f_m = 1;
    f_t = 4;
}

void (*op_map[0xFF])(void) = {
    NOP
};

unsigned char ROM[0xFF];

void exe() {
    op_map[ROM[PC++]]();
    c_m += f_m;
    c_t += f_t;
    f_m = f_t = 0;
}

#define WASM_EXPORT __attribute__((visibility("default")))


#define REG_AMOUNT 6

static unsigned short cache[REG_AMOUNT] = {};

// 1 BYTE REG
#define ADDR_F  0
#define ADDR_A  1
#define ADDR_B  3
#define ADDR_C  2
#define ADDR_D  5
#define ADDR_E  4
#define ADDR_H  7
#define ADDR_L  6

// 2 BYTE REG
#define ADDR_BC 1
#define ADDR_DE 2
#define ADDR_HL 3
#define ADDR_SP 4
#define ADDR_PC 5

// 8-bit registers
#define F   ((unsigned char *)cache)[ADDR_F]
#define A   ((unsigned char *)cache)[ADDR_A]
#define B   ((unsigned char *)cache)[ADDR_B]
#define C   ((unsigned char *)cache)[ADDR_C]
#define D   ((unsigned char *)cache)[ADDR_D]
#define E   ((unsigned char *)cache)[ADDR_E]
#define H   ((unsigned char *)cache)[ADDR_H]
#define L   ((unsigned char *)cache)[ADDR_L]

// 16-bit registers
#define BC  cache[ADDR_BC]
#define DE  cache[ADDR_DE]
#define HL  cache[ADDR_HL]
#define SP  cache[ADDR_SP]  // stack pointer
#define PC  cache[ADDR_PC]  // program counter

// Flag register (F) bits:
#define F_Z_BIT 7   // Zero Flag
#define F_N_BIT 6   // Subtract Flag
#define F_H_BIT 5   // Half Carry Flag
#define F_C_BIT 4   // Carry Flag
#define F_Z     F>>F_Z_BIT&0x01
#define F_N     F>>F_N_BIT&0x01
#define F_H     F>>F_H_BIT&0x01
#define F_C     F>>F_C_BIT&0x01

#define Flag_zero(n) do {\
    if(n == 0) {\
        F |= 1<<F_Z_BIT;\
    } else {\
        F &= ~(1<<F_Z_BIT);\
    }\
} while(0)

#define Flag_carry(n) do {\
    if(n > 255) {\
        F |= 1<<F_C_BIT;\
    } else {\
        F &= ~(1<<F_C_BIT);\
    }\
} while(0)\

#define Flag_hcarry(n) do {\
    if(n > 15) {\
        F |= 1<<F_H_BIT;\
    } else {\
        F &= ~(1<<F_H_BIT);\
    }\
} while(0)\

WASM_EXPORT
int main()
{
    F = 0xF;
    A = 0xA;
    B = 0xB;
    C = 0xC;
    D = 0xD;
    E = 0xE;
    H = 0x1;
    L = 0x2;
    SP = 0x0F;
    PC = 0xF0;
    // printf("hello\n");
    // printf("00:\t%04X\n", cache[0]);
    // printf("02:\t%04X\n", cache[1]);
    // printf("04:\t%04X\n", cache[2]);
    // printf("06:\t%04X\n", cache[3]);
    // printf("08:\t%04X\n", cache[4]);
    // printf("0A:\t%04X\n", cache[5]);
    return 0;
}

static unsigned char ft;
static unsigned char ct;

void (*CB[0x100])() = {};

static void NOP() {
    ft = 4;
}

void (*op_map[])() = {
    NOP
};

unsigned char ROM[0xFF];

void exe() {
    op_map[ROM[PC++]]();
    ct += ft;
    ft = 0;
}


#define _d8     (ROM[PC++])
#define _d16    (ROM[PC++]|ROM[PC++]<<8)
#define _a8     (ROM[0xFF00|_d8])
#define _a16    (ROM[_d16])

// 8-Bit Loads
// NOTE: ld r, n
static void ld_A_d8() {A = _d8;ft = 8;}
static void ld_B_d8() {B = _d8;ft = 8;}
static void ld_C_d8() {C = _d8;ft = 8;}
static void ld_D_d8() {D = _d8;ft = 8;}
static void ld_E_d8() {E = _d8;ft = 8;}
static void ld_H_d8() {H = _d8;ft = 8;}
static void ld_L_d8() {L = _d8;ft = 8;}

// NOTE: ld r, r'
static void ld_A_A() {A = A;ft = 4;}
static void ld_A_B() {A = B;ft = 4;}
static void ld_A_C() {A = C;ft = 4;}
static void ld_A_D() {A = D;ft = 4;}
static void ld_A_E() {A = E;ft = 4;}
static void ld_A_H() {A = H;ft = 4;}
static void ld_A_L() {A = L;ft = 4;}

// NOTE: ld r, r'
static void ld_B_A() {B = A;ft = 4;}
static void ld_B_B() {B = B;ft = 4;}
static void ld_B_C() {B = C;ft = 4;}
static void ld_B_D() {B = D;ft = 4;}
static void ld_B_E() {B = E;ft = 4;}
static void ld_B_H() {B = H;ft = 4;}
static void ld_B_L() {B = L;ft = 4;}

// NOTE: ld r, r'
static void ld_C_A() {C = A;ft = 4;}
static void ld_C_B() {C = B;ft = 4;}
static void ld_C_C() {C = C;ft = 4;}
static void ld_C_D() {C = D;ft = 4;}
static void ld_C_E() {C = E;ft = 4;}
static void ld_C_H() {C = H;ft = 4;}
static void ld_C_L() {C = L;ft = 4;}

// NOTE: ld r, r'
static void ld_D_A() {D = A;ft = 4;}
static void ld_D_B() {D = B;ft = 4;}
static void ld_D_C() {D = C;ft = 4;}
static void ld_D_D() {D = D;ft = 4;}
static void ld_D_E() {D = E;ft = 4;}
static void ld_D_H() {D = H;ft = 4;}
static void ld_D_L() {D = L;ft = 4;}

// NOTE: ld r, r'
static void ld_E_A() {E = A;ft = 4;}
static void ld_E_B() {E = B;ft = 4;}
static void ld_E_C() {E = C;ft = 4;}
static void ld_E_D() {E = D;ft = 4;}
static void ld_E_E() {E = E;ft = 4;}
static void ld_E_H() {E = H;ft = 4;}
static void ld_E_L() {E = L;ft = 4;}

// NOTE: ld r, r'
static void ld_H_A() {H = A;ft = 4;}
static void ld_H_B() {H = B;ft = 4;}
static void ld_H_C() {H = C;ft = 4;}
static void ld_H_D() {H = D;ft = 4;}
static void ld_H_E() {H = E;ft = 4;}
static void ld_H_H() {H = H;ft = 4;}
static void ld_H_L() {H = L;ft = 4;}

// NOTE: ld r, r'
static void ld_L_A() {L = A;ft = 4;}
static void ld_L_B() {L = B;ft = 4;}
static void ld_L_C() {L = C;ft = 4;}
static void ld_L_D() {L = D;ft = 4;}
static void ld_L_E() {L = E;ft = 4;}
static void ld_L_H() {L = H;ft = 4;}
static void ld_L_L() {L = L;ft = 4;}

// NOTE: LD r, (HL)
static void ld_B_HL() {B = ROM[HL];ft = 8;}
static void ld_C_HL() {C = ROM[HL];ft = 8;}
static void ld_D_HL() {D = ROM[HL];ft = 8;}
static void ld_E_HL() {E = ROM[HL];ft = 8;}
static void ld_H_HL() {H = ROM[HL];ft = 8;}
static void ld_L_HL() {L = ROM[HL];ft = 8;}


// NOTE: LD (HL), r
static void ld_HL_A() {ROM[HL] = A;ft = 8;}
static void ld_HL_B() {ROM[HL] = B;ft = 8;}
static void ld_HL_C() {ROM[HL] = C;ft = 8;}
static void ld_HL_D() {ROM[HL] = D;ft = 8;}
static void ld_HL_E() {ROM[HL] = E;ft = 8;}
static void ld_HL_H() {ROM[HL] = H;ft = 8;}
static void ld_HL_L() {ROM[HL] = L;ft = 8;}
static void ld_HL_d8() {ROM[HL] = _d8;ft = 12;}

// NOTE: LD A, n
// n = A,B,C,D,E,H,L,(BC),(DE),(HL),(nn),#
// nn = two byte immediate value. (LS byte first.)
static void ld_A_a16() {A = _a16;ft = 16;}
static void ld_A_BC() {A = ROM[BC];ft = 8;}
static void ld_A_DE() {A = ROM[DE];ft = 8;}
static void ld_A_HL() {A = ROM[HL];ft = 8;}

// NOTE: LD n, A
static void ld_a16_A() {_a16 = A;ft = 16;}
static void ld_BC_A() {ROM[BC] = A;ft = 8;}
static void ld_DE_A() {ROM[DE] = A;ft = 8;}

// LD A, (C)
// Same as: LD A, ($FF00+C)
static void ld_A_rC() {A = ROM[0xFF00|C];ft = 8;}
// LD (C), A
static void ld_rC_A() {ROM[0xFF00|C] = A;ft = 8;}

// LD A, (HL[x])    x: [I]ncrement / [D]ecrement
static void ld_A_HLD() {A = ROM[HL--];ft = 8;}
static void ld_A_HLI() {A = ROM[HL++];ft = 8;}
// LD (HL[x]), A    x: [I]ncrement / [D]ecrement
static void ld_HLD_A() {ROM[HL--] = A;ft = 8;}
static void ld_HLI_A() {ROM[HL++] = A;ft = 8;}

// LDH (n), A
static void ld_a8_A() {_a8 = A;ft = 12;}
// LDH A, (n)
static void ld_A_a8() {A = _a8;ft = 12;}


// NOTE: 16-Bit Loads
// LD n, nn
static void ld_BC_d16() {BC = _d16;ft = 12;}

// LD SP, HL
static void ld_SP_HL() {SP = HL;ft = 8;}

// LD HL, SP+n  (AKA LDHL SP, n)
static void ldhl_SP_d8() {HL = SP + _d8;ft = 12;F &= 0x3F;}

// LD (nn), SP
static void ld_a16_SP() {_a16 = SP;ft = 20;}

// PUSH nn
static void push_AF() {ROM[SP--] = A;ROM[SP--] = F;ft = 16;}
static void push_BC() {ROM[SP--] = B;ROM[SP--] = C;ft = 16;}
static void push_DE() {ROM[SP--] = D;ROM[SP--] = E;ft = 16;}
static void push_HL() {ROM[SP--] = H;ROM[SP--] = L;ft = 16;}

// POP nn
static void pop_AF() {F = ROM[SP++];A = ROM[SP++];ft = 12;}
static void pop_BC() {C = ROM[SP++];B = ROM[SP++];ft = 12;}
static void pop_DE() {E = ROM[SP++];D = ROM[SP++];ft = 12;}
static void pop_HL() {L = ROM[SP++];H = ROM[SP++];ft = 12;}

// NOTE: 8-Bit ALU

#define ADD_FLAG(n) do {\
    Flag_zero(n);\
    Flag_carry(n);\
    Flag_hcarry(n);\
} while(0)
// ADD A, n
static unsigned short sum;
static void add_A_A() {ADD_FLAG(sum=A+A);A=sum;ft = 4;}
static void add_A_B() {ADD_FLAG(sum=A+B);A=sum;ft = 4;}
static void add_A_C() {ADD_FLAG(sum=A+C);A=sum;ft = 4;}
static void add_A_D() {ADD_FLAG(sum=A+D);A=sum;ft = 4;}
static void add_A_H() {ADD_FLAG(sum=A+H);A=sum;ft = 4;}
static void add_A_L() {ADD_FLAG(sum=A+L);A=sum;ft = 4;}
static void add_A_HL() {ADD_FLAG(sum=A+ROM[HL]);A=sum;ft = 8;}
static void add_A_d8() {ADD_FLAG(sum=A+_d8);A=(unsigned char)sum;ft = 8;}