A simple Makefile-based project template

Makefile

# A simple Makefile-based project
MAKE_FLAGS += --no-print-directory

CC = gcc
CXX = g++
LD = $(CXX)

ifneq (, $(shell which ccache 2>/dev/null))
CC := ccache $(CC)
CXX := ccache $(CXX)
endif

FLAGS = -Wall -Wextra -O3 -isystem $(realpath third-party)
CCFLAGS = $(FLAGS) -std=c17
CXXFLAGS = $(FLAGS) -std=c++20
LDFLAGS =

SOURCES = $(wildcard src/*.cpp) $(wildcard src/*.c) $(wildcard third-party/*/*.cpp) $(wildcard third-party/*/*.c)
OBJECTS = $(SOURCES:%=build/%.o)

.PHONY: all clean rebuild
all: build/app
clean:
	rm -rf build/
rebuild:
	@$(MAKE) clean
	@$(MAKE) all

build/app: $(OBJECTS) Makefile
	$(LD) -o $@ $(LDFLAGS) $(OBJECTS)

build/%.cpp.o: %.cpp Makefile
	mkdir -p $(@D)/
	$(CXX) -c $< $(CXXFLAGS) -MD -MP -o $@
build/%.c.o: %.c Makefile
	mkdir -p $(@D)/
	$(CC) -c $< $(CCFLAGS) -MD -MP -o $@

-include $(OBJECTS:.o=.d)

• Mixed C and C++ project.
• Support third-party code.
• Automatic dependency.
• Use ccache if available.
• Out-of-tree build.