Created
January 4, 2017 14:42
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Linux 4.9 kernel log during echo A > /dev/ttymxc4 followed by echo B > /dev/ttymxc4
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[ 29.059025] mxs-dma 110000.dma-apbh: private_candidate: wrong capabilities | |
[ 29.059042] imx-sdma 20ec000.sdma: private_candidate: dma1chan0 busy | |
[ 29.059054] imx-sdma 20ec000.sdma: private_candidate: dma1chan1 busy | |
[ 29.059149] dmaengine: __dma_request_channel: success (dma1chan2) | |
[ 29.059168] imx-sdma 20ec000.sdma: load_address = 6722 | |
[ 29.059177] imx-sdma 20ec000.sdma: wml = 0x00000008 | |
[ 29.059187] imx-sdma 20ec000.sdma: shp_addr = 0x021f4000 | |
[ 29.059197] imx-sdma 20ec000.sdma: per_addr = 0x00000000 | |
[ 29.059206] imx-sdma 20ec000.sdma: event_mask0 = 0x00000000 | |
[ 29.059215] imx-sdma 20ec000.sdma: event_mask1 = 0x00000002 | |
[ 29.059298] mxs-dma 110000.dma-apbh: private_candidate: wrong capabilities | |
[ 29.059308] imx-sdma 20ec000.sdma: private_candidate: dma1chan0 busy | |
[ 29.059317] imx-sdma 20ec000.sdma: private_candidate: dma1chan1 busy | |
[ 29.059325] imx-sdma 20ec000.sdma: private_candidate: dma1chan2 busy | |
[ 29.059462] dmaengine: __dma_request_channel: success (dma1chan3) | |
[ 29.059479] imx-sdma 20ec000.sdma: load_address = 747 | |
[ 29.059489] imx-sdma 20ec000.sdma: wml = 0x00000008 | |
[ 29.059498] imx-sdma 20ec000.sdma: shp_addr = 0x021f4040 | |
[ 29.059508] imx-sdma 20ec000.sdma: per_addr = 0x00000000 | |
[ 29.059516] imx-sdma 20ec000.sdma: event_mask0 = 0x00000000 | |
[ 29.059524] imx-sdma 20ec000.sdma: event_mask1 = 0x00000004 | |
[ 29.059858] imx-sdma 20ec000.sdma: setting up 1 entries for channel 4. | |
[ 29.059869] imx-sdma 20ec000.sdma: load_address = 747 | |
[ 29.059878] imx-sdma 20ec000.sdma: wml = 0x00000008 | |
[ 29.059886] imx-sdma 20ec000.sdma: shp_addr = 0x021f4040 | |
[ 29.059894] imx-sdma 20ec000.sdma: per_addr = 0x00000000 | |
[ 29.059902] imx-sdma 20ec000.sdma: event_mask0 = 0x00000000 | |
[ 29.059909] imx-sdma 20ec000.sdma: event_mask1 = 0x00000004 | |
[ 29.059971] imx-sdma 20ec000.sdma: entry 0: count: 2 dma: 0x4e3ed000 intr | |
[ 29.059983] imx-uart 21f4000.serial: TX: prepare to send 2 bytes by DMA. | |
[ 29.067166] imx-uart 21f4000.serial: we finish the TX DMA. | |
[ 29.072896] imx-sdma 20ec000.sdma: setting up 2 entries for channel 4. | |
[ 29.072908] imx-sdma 20ec000.sdma: load_address = 747 | |
[ 29.072917] imx-sdma 20ec000.sdma: wml = 0x00000008 | |
[ 29.072925] imx-sdma 20ec000.sdma: shp_addr = 0x021f4040 | |
[ 29.072934] imx-sdma 20ec000.sdma: per_addr = 0x00000000 | |
[ 29.072941] imx-sdma 20ec000.sdma: event_mask0 = 0x00000000 | |
[ 29.072949] imx-sdma 20ec000.sdma: event_mask1 = 0x00000004 | |
[ 29.073036] imx-sdma 20ec000.sdma: entry 0: count: 4092 dma: 0x4e3ed004 | |
[ 29.073048] imx-sdma 20ec000.sdma: entry 1: count: 2 dma: 0x4e3ed000 intr | |
[ 29.073057] imx-uart 21f4000.serial: TX: prepare to send 4094 bytes by DMA. | |
[ 33.359405] imx-uart 21f4000.serial: we finish the TX DMA. | |
[ 33.365067] imx-sdma 20ec000.sdma: setting up 2 entries for channel 4. | |
[ 33.365080] imx-sdma 20ec000.sdma: load_address = 747 | |
[ 33.365089] imx-sdma 20ec000.sdma: wml = 0x00000008 | |
[ 33.365098] imx-sdma 20ec000.sdma: shp_addr = 0x021f4040 | |
[ 33.365108] imx-sdma 20ec000.sdma: per_addr = 0x00000000 | |
[ 33.365116] imx-sdma 20ec000.sdma: event_mask0 = 0x00000000 | |
[ 33.365125] imx-sdma 20ec000.sdma: event_mask1 = 0x00000004 | |
[ 33.365150] imx-sdma 20ec000.sdma: entry 0: count: 4070 dma: 0x4e3ed01a | |
[ 33.365162] imx-sdma 20ec000.sdma: entry 1: count: 2 dma: 0x4e3ed000 intr | |
[ 33.365173] imx-uart 21f4000.serial: TX: prepare to send 4072 bytes by DMA. | |
[ 37.603551] imx-uart 21f4000.serial: we finish the TX DMA. | |
[ 65.999450] mxs-dma 110000.dma-apbh: private_candidate: wrong capabilities | |
[ 65.999467] imx-sdma 20ec000.sdma: private_candidate: dma1chan0 busy | |
[ 65.999479] imx-sdma 20ec000.sdma: private_candidate: dma1chan1 busy | |
[ 65.999571] dmaengine: __dma_request_channel: success (dma1chan2) | |
[ 65.999590] imx-sdma 20ec000.sdma: load_address = 6722 | |
[ 65.999600] imx-sdma 20ec000.sdma: wml = 0x00000008 | |
[ 65.999611] imx-sdma 20ec000.sdma: shp_addr = 0x021f4000 | |
[ 65.999620] imx-sdma 20ec000.sdma: per_addr = 0x00000000 | |
[ 65.999629] imx-sdma 20ec000.sdma: event_mask0 = 0x00000000 | |
[ 65.999639] imx-sdma 20ec000.sdma: event_mask1 = 0x00000002 | |
[ 65.999713] mxs-dma 110000.dma-apbh: private_candidate: wrong capabilities | |
[ 65.999723] imx-sdma 20ec000.sdma: private_candidate: dma1chan0 busy | |
[ 65.999732] imx-sdma 20ec000.sdma: private_candidate: dma1chan1 busy | |
[ 65.999741] imx-sdma 20ec000.sdma: private_candidate: dma1chan2 busy | |
[ 65.999835] dmaengine: __dma_request_channel: success (dma1chan3) | |
[ 65.999941] imx-sdma 20ec000.sdma: load_address = 747 | |
[ 65.999953] imx-sdma 20ec000.sdma: wml = 0x00000008 | |
[ 65.999964] imx-sdma 20ec000.sdma: shp_addr = 0x021f4040 | |
[ 65.999973] imx-sdma 20ec000.sdma: per_addr = 0x00000000 | |
[ 65.999981] imx-sdma 20ec000.sdma: event_mask0 = 0x00000000 | |
[ 65.999990] imx-sdma 20ec000.sdma: event_mask1 = 0x00000004 | |
[ 66.000209] imx-sdma 20ec000.sdma: setting up 1 entries for channel 4. | |
[ 66.000221] imx-sdma 20ec000.sdma: load_address = 747 | |
[ 66.000229] imx-sdma 20ec000.sdma: wml = 0x00000008 | |
[ 66.000238] imx-sdma 20ec000.sdma: shp_addr = 0x021f4040 | |
[ 66.000246] imx-sdma 20ec000.sdma: per_addr = 0x00000000 | |
[ 66.000254] imx-sdma 20ec000.sdma: event_mask0 = 0x00000000 | |
[ 66.000262] imx-sdma 20ec000.sdma: event_mask1 = 0x00000004 | |
[ 66.000285] imx-sdma 20ec000.sdma: entry 0: count: 2 dma: 0x4e3ed002 intr | |
[ 66.000296] imx-uart 21f4000.serial: TX: prepare to send 2 bytes by DMA. | |
[ 66.007110] imx-uart 21f4000.serial: we finish the TX DMA. | |
[ 66.012746] imx-sdma 20ec000.sdma: setting up 2 entries for channel 4. | |
[ 66.012757] imx-sdma 20ec000.sdma: load_address = 747 | |
[ 66.012765] imx-sdma 20ec000.sdma: wml = 0x00000008 | |
[ 66.012773] imx-sdma 20ec000.sdma: shp_addr = 0x021f4040 | |
[ 66.012781] imx-sdma 20ec000.sdma: per_addr = 0x00000000 | |
[ 66.012789] imx-sdma 20ec000.sdma: event_mask0 = 0x00000000 | |
[ 66.012796] imx-sdma 20ec000.sdma: event_mask1 = 0x00000004 | |
[ 66.012819] imx-sdma 20ec000.sdma: entry 0: count: 4090 dma: 0x4e3ed006 | |
[ 66.012831] imx-sdma 20ec000.sdma: entry 1: count: 4 dma: 0x4e3ed000 intr | |
[ 66.012841] imx-uart 21f4000.serial: TX: prepare to send 4094 bytes by DMA. | |
[ 70.297051] imx-uart 21f4000.serial: we finish the TX DMA. | |
[ 70.302695] imx-sdma 20ec000.sdma: setting up 2 entries for channel 4. | |
[ 70.302707] imx-sdma 20ec000.sdma: load_address = 747 | |
[ 70.302722] imx-sdma 20ec000.sdma: wml = 0x00000008 | |
[ 70.302731] imx-sdma 20ec000.sdma: shp_addr = 0x021f4040 | |
[ 70.302739] imx-sdma 20ec000.sdma: per_addr = 0x00000000 | |
[ 70.302747] imx-sdma 20ec000.sdma: event_mask0 = 0x00000000 | |
[ 70.302755] imx-sdma 20ec000.sdma: event_mask1 = 0x00000004 | |
[ 70.302778] imx-sdma 20ec000.sdma: entry 0: count: 4068 dma: 0x4e3ed01c | |
[ 70.302789] imx-sdma 20ec000.sdma: entry 1: count: 4 dma: 0x4e3ed000 intr | |
[ 70.302798] imx-uart 21f4000.serial: TX: prepare to send 4072 bytes by DMA. | |
[ 74.539094] imx-uart 21f4000.serial: we finish the TX DMA. |
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