Created
April 13, 2023 18:31
-
-
Save cocus/8e3c54b34e7bc94ff2b03f9cd42c0703 to your computer and use it in GitHub Desktop.
IDA 80C552 CPU definition
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| ; Note, add this to the i51.cfg on your ida installation dir. | |
| ; The aim is to add support for the Phillips P80C552 CPU, which is a | |
| ; 80C51 variant. | |
| ; This is the revision 1 of this gist | |
| ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; | |
| .80C552 | |
| ; https://www.nxp.com/docs/en/data-sheet/80C552_83C552.pdf | |
| ; https://www.keil.com/dd/docs/datashts/philips/8xc5x2_ov.pdf | |
| ; http://www.keil.com/dd/docs/c51/reg52.h | |
| ; MEMORY MAP | |
| area CODE code 0x0000:0x10000 | |
| area DATA RAM 0x0000:0x0100 | |
| area DATA FSR 0x0080:0x0100 | |
| ; Interrupt and reset vector assignments | |
| entry RESET 0x0000 RESET | |
| entry X0 0x0003 External interrupt 0 | |
| entry T0 0x000B Timer 0 overflow | |
| entry X1 0x0013 External interrupt 1 | |
| entry T1 0x001B Timer 1 overflow | |
| entry S0 0x0023 SIO0 (UART) | |
| entry S1 0x002B SIO1 (I2C) | |
| entry CT0 0x0033 T2 capture 0 | |
| entry CT1 0x003B T2 capture 1 | |
| entry CT2 0x0043 T2 capture 2 | |
| entry CT3 0x004B T2 capture 3 | |
| entry ADC 0x0053 ADC completion | |
| entry CM0 0x005B T2 compare 0 | |
| entry CM1 0x0063 T2 compare 1 | |
| entry CM2 0x006B T2 compare 2 | |
| entry T2 0x0073 T2 overflow | |
| ; INPUT/OUTPUT PORTS | |
| P0 0x0080 Port 0 | |
| P0.AD7 7 | |
| P0.AD6 6 | |
| P0.AD5 5 | |
| P0.AD4 4 | |
| P0.AD3 3 | |
| P0.AD2 2 | |
| P0.AD1 1 | |
| P0.AD0 0 | |
| SP 0x0081 Stack Pointer | |
| DPL 0x0082 Data Pointer, Low Byte | |
| DPL.DPL7 7 | |
| DPL.DPL6 6 | |
| DPL.DPL5 5 | |
| DPL.DPL4 4 | |
| DPL.DPL3 3 | |
| DPL.DPL2 2 | |
| DPL.DPL1 1 | |
| DPL.DPL0 0 | |
| DPH 0x0083 Data Pointer, High Byte | |
| DPH.DPH7 7 | |
| DPH.DPH6 6 | |
| DPH.DPH5 5 | |
| DPH.DPH4 4 | |
| DPH.DPH3 3 | |
| DPH.DPH2 2 | |
| DPH.DPH1 1 | |
| DPH.DPH0 0 | |
| RESERVED0084 0x0084 RESERVED | |
| RESERVED0085 0x0085 RESERVED | |
| RESERVED0086 0x0086 RESERVED | |
| PCON 0x0087 Power control | |
| TCON 0x0088 Timer control | |
| TCON.TF1 7 | |
| TCON.TR1 6 | |
| TCON.TF0 5 | |
| TCON.TR0 4 | |
| TCON.IE1 3 | |
| TCON.IT1 2 | |
| TCON.IE0 1 | |
| TCON.IT0 0 | |
| TMOD 0x0089 Timer mode | |
| TL0 0x008A Timer low 0 | |
| TL1 0x008B Timer low 1 | |
| TH0 0x008C Timer high 0 | |
| TH1 0x008D Timer high 1 | |
| RESERVED008E 0x008E RESERVED | |
| RESERVED008F 0x008F RESERVED | |
| P1 0x0090 Port 1 | |
| P1.SDA 7 | |
| P1.SCL 6 | |
| P1.RT2 5 | |
| P1.T2 4 | |
| P1.CT3I 3 | |
| P1.CT2I 2 | |
| P1.CT1I 1 | |
| P1.CT0I 0 | |
| RESERVED0091 0x0091 RESERVED | |
| RESERVED0092 0x0092 RESERVED | |
| RESERVED0093 0x0093 RESERVED | |
| RESERVED0094 0x0094 RESERVED | |
| RESERVED0095 0x0095 RESERVED | |
| RESERVED0096 0x0096 RESERVED | |
| RESERVED0097 0x0097 RESERVED | |
| S0CON 0x0098 Serial 0 control | |
| S0CON.SM0 7 | |
| S0CON.SM1 6 | |
| S0CON.SM2 5 | |
| S0CON.REN 4 | |
| S0CON.TB8 3 | |
| S0CON.RB8 2 | |
| S0CON.TI 1 | |
| S0CON.RI 0 | |
| S0BUF 0x0099 Serial 0 data buffer | |
| RESERVED009A 0x009A RESERVED | |
| RESERVED009B 0x009B RESERVED | |
| RESERVED009C 0x009C RESERVED | |
| RESERVED009D 0x009D RESERVED | |
| RESERVED009E 0x009E RESERVED | |
| RESERVED009F 0x009F RESERVED | |
| P2 0x00A0 Port 2 | |
| P2.A15 7 | |
| P2.A14 6 | |
| P2.A13 5 | |
| P2.A12 4 | |
| P2.A11 3 | |
| P2.A10 2 | |
| P2.A9 1 | |
| P2.A8 0 | |
| RESERVED00A1 0x00A1 RESERVED | |
| RESERVED00A2 0x00A2 RESERVED | |
| RESERVED00A3 0x00A3 RESERVED | |
| RESERVED00A4 0x00A4 RESERVED | |
| RESERVED00A5 0x00A5 RESERVED | |
| RESERVED00A6 0x00A6 RESERVED | |
| RESERVED00A7 0x00A7 RESERVED | |
| IEN0 0x00A8 Interrupt enable 0 | |
| IEN0.EA 7 | |
| IEN0.EAD 6 | |
| IEN0.ES1 5 | |
| IEN0.ES0 4 | |
| IEN0.ET1 3 | |
| IEN0.EX1 2 | |
| IEN0.ET0 1 | |
| IEN0.EX0 0 | |
| CML0 0x00A9 Compare low 0 | |
| CML1 0x00AA Compare low 1 | |
| CML2 0x00AB Compare low 2 | |
| CTL0 0x00AC Capture low 0 | |
| CTL1 0x00AD Capture low 1 | |
| CTL2 0x00AE Capture low 2 | |
| CTL3 0x00AF Capture low 3 | |
| P3 0x00B0 Port 3 | |
| P3.RD 7 | |
| P3.WR 6 | |
| P3.T1 5 | |
| P3.T0 4 | |
| P3.INT1 3 | |
| P3.INT0 2 | |
| P3.TXD 1 | |
| P3.RXD 0 | |
| RESERVED00B1 0x00B1 RESERVED | |
| RESERVED00B2 0x00B2 RESERVED | |
| RESERVED00B3 0x00B3 RESERVED | |
| RESERVED00B4 0x00B4 RESERVED | |
| RESERVED00B5 0x00B5 RESERVED | |
| RESERVED00B6 0x00B6 RESERVED | |
| RESERVED00B7 0x00B7 RESERVED | |
| IP0 0x00B8 Interrupt priority 0 | |
| IP0.PAD 6 | |
| IP0.PS1 5 | |
| IP0.PS0 4 | |
| IP0.PT1 3 | |
| IP0.PX1 2 | |
| IP0.PT0 1 | |
| IP0.PX0 0 | |
| RESERVED00B9 0x00B9 RESERVED | |
| RESERVED00BA 0x00BA RESERVED | |
| RESERVED00BB 0x00BB RESERVED | |
| RESERVED00BC 0x00BC RESERVED | |
| RESERVED00BD 0x00BD RESERVED | |
| RESERVED00BE 0x00BE RESERVED | |
| RESERVED00BF 0x00BF RESERVED | |
| P4 0x00C0 Port 4 | |
| P4.CMT1 7 | |
| P4.CMT0 6 | |
| P4.CMSR5 5 | |
| P4.CMSR4 4 | |
| P4.CMSR3 3 | |
| P4.CMSR2 2 | |
| P4.CMSR1 1 | |
| P4.CMSR0 0 | |
| RESERVED00C1 0x00C1 RESERVED | |
| RESERVED00C2 0x00C2 RESERVED | |
| RESERVED00C3 0x00C3 RESERVED | |
| P5 0x00C4 Port 5 | |
| ADCON 0x00C5 Adc control | |
| ADCH 0x00C6 A/D converter high | |
| RESERVED00C7 0x00C7 RESERVED | |
| T2CON 0x00C8 Timer 2 int flag reg | |
| T2CON.T20V 7 | |
| T2CON.CMI2 6 | |
| T2CON.CMI1 5 | |
| T2CON.CMI0 4 | |
| T2CON.CTI3 3 | |
| T2CON.CTI2 2 | |
| T2CON.CTI1 1 | |
| T2CON.CTI0 0 | |
| CMH0 0x00C9 Compare high 0 | |
| CMH1 0x00CA Compare high 1 | |
| CMH2 0x00CB Compare high 2 | |
| CTH0 0x00CC Capture high 0 | |
| CTH1 0x00CD Capture high 1 | |
| CHT2 0x00CE Capture high 2 | |
| CTH3 0x00CF Capture high 3 | |
| PSW 0x00D0 Program Status Word Register | |
| PSW.CY 7 Carry Flag | |
| PSW.AC 6 Auxiliary Carry Flag | |
| PSW.F0 5 General Purpose Flag | |
| PSW.RS1 4 Register Bank Select Control Bit 1 | |
| PSW.RS0 3 Register Bank Select Control Bit 0 | |
| PSW.OV 2 Overflow Flag | |
| PSW.F1 1 General Purpose Flag | |
| PSW.P 0 Parity Flag | |
| RESERVED00D1 0x00D1 RESERVED | |
| RESERVED00D2 0x00D2 RESERVED | |
| RESERVED00D3 0x00D3 RESERVED | |
| RESERVED00D4 0x00D4 RESERVED | |
| RESERVED00D5 0x00D5 RESERVED | |
| RESERVED00D6 0x00D6 RESERVED | |
| RESERVED00D7 0x00D7 RESERVED | |
| S1CON 0x00D8 Serial 1 control | |
| S1CON.CR2 7 | |
| S1CON.ENS1 6 | |
| S1CON.STA 5 | |
| S1CON.ST0 4 | |
| S1CON.SI 3 | |
| S1CON.AA 2 | |
| S1CON.CR1 1 | |
| S1CON.CR0 0 | |
| S1STA 0x00D9 Serial 1 status | |
| S1DAT 0x00DA Serial 1 data | |
| S1ADR 0x00DB Serial 1 address | |
| RESERVED00DC 0x00DC RESERVED | |
| RESERVED00DD 0x00DD RESERVED | |
| RESERVED00DE 0x00DE RESERVED | |
| RESERVED00DF 0x00DF RESERVED | |
| ACC 0x00E0 Accumulator | |
| ACC.ACC7 7 | |
| ACC.ACC6 6 | |
| ACC.ACC5 5 | |
| ACC.ACC4 4 | |
| ACC.ACC3 3 | |
| ACC.ACC2 2 | |
| ACC.ACC1 1 | |
| ACC.ACC0 0 | |
| RESERVED00E1 0x00E1 RESERVED | |
| RESERVED00E2 0x00E2 RESERVED | |
| RESERVED00E3 0x00E3 RESERVED | |
| RESERVED00E4 0x00E4 RESERVED | |
| RESERVED00E5 0x00E5 RESERVED | |
| RESERVED00E6 0x00E6 RESERVED | |
| RESERVED00E7 0x00E7 RESERVED | |
| IEN1 0x00E8 Interrupt enable 1 | |
| IEN1.ET2 7 | |
| IEN1.ECM2 6 | |
| IEN1.ECM1 5 | |
| IEN1.ECM0 4 | |
| IEN1.ECT3 3 | |
| IEN1.ECT2 2 | |
| IEN1.ECT1 1 | |
| IEN1.ECT0 0 | |
| RESERVED00E9 0x00E9 RESERVED | |
| TM2CON 0x00EA Timer 2 control | |
| CTCON 0x00EB Capture control | |
| TML2 0x00EC Timer low 2 | |
| TMH2 0x00ED Timer high 2 | |
| STE 0x00EE Set enable | |
| RTE 0x00EF Reset/toggle enable | |
| B 0x00F0 B Register | |
| B.B7 7 | |
| B.B6 6 | |
| B.B5 5 | |
| B.B4 4 | |
| B.B3 3 | |
| B.B2 2 | |
| B.B1 1 | |
| B.B0 0 | |
| RESERVED00F1 0x00F1 RESERVED | |
| RESERVED00F2 0x00F2 RESERVED | |
| RESERVED00F3 0x00F3 RESERVED | |
| RESERVED00F4 0x00F4 RESERVED | |
| RESERVED00F5 0x00F5 RESERVED | |
| RESERVED00F6 0x00F6 RESERVED | |
| RESERVED00F7 0x00F7 RESERVED | |
| IP1 0x00F8 Interrupt priority 1 | |
| IP1.PT2 7 | |
| IP1.PCM2 6 | |
| IP1.PCM1 5 | |
| IP1.PCM0 4 | |
| IP1.PCT3 3 | |
| IP1.PCT2 2 | |
| IP1.PCT1 1 | |
| IP1.PCT0 0 | |
| RESERVED00F9 0x00F9 RESERVED | |
| RESERVED00FA 0x00FA RESERVED | |
| RESERVED00FB 0x00FB RESERVED | |
| PWM0 0x00FC PWM register 0 | |
| PWM1 0x00FD PWM register 1 | |
| PWMP 0x00FE PWM prescaler | |
| T3 0x00FF Timer 3 |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment