Supporting code for memory mapped objects

constructor.cpp

    USART()
    {
        if (this == reinterpret_cast<USART *>(USART1))
        {
            // enable clock for GPIOA and USART1
            RCC->APB2ENR |= RCC_APB2ENR_USART1EN | RCC_APB2ENR_IOPAEN;

            // reset pin configurations for PA9 and PA10
            GPIOA->CRH &= ~(GPIO_CRH_MODE10 | GPIO_CRH_MODE9 | GPIO_CRH_CNF10 | GPIO_CRH_CNF9);

            // PA9 as Output@50Hz Alternate function
            GPIOA->CRH |= GPIO_CRH_MODE9_0 | GPIO_CRH_MODE9_1 | GPIO_CRH_CNF9_1;

            // PA10 as floating input
            GPIOA->CRH |= GPIO_CRH_CNF10_0;
        }
    }

destructor.cpp

    ~USART()
    {
        if (this == reinterpret_cast<USART *>(Usart1))
        {
            // disable clock for USART1 peripheral
            RCC->APB2ENR &= ~RCC_APB2ENR_USART1EN;
        }
    }

main.cpp

int main(void)
{
	USART &ttl = *new (USART::Usart1) USART;

	ttl.set_baudrate(USART::BR_9600);
	ttl.setTransmitterState(USART::Enabled);
	ttl.setUsartState(USART::Enabled);

	while (1)
	{
		ttl.tx_str(msg);

		delay_ms(2000U);
	}
}

new-overload.cpp

    void *operator new(size_t, UsartInstance usart)
    {
        return reinterpret_cast<void *>(usart);
    }

usart.hpp

class USART{
.
.
.
private:
    /*!< USART Status register,                     Address offset: 0x00 */
    volatile uint32_t SR;
    /*!< USART Data register,                       Address offset: 0x04 */
    volatile uint32_t DR;
    /*!< USART Baud rate register,                  Address offset: 0x08 */
    volatile uint32_t BRR;
    /*!< USART Control register 1,                  Address offset: 0x0C */
    volatile uint32_t CR1;
    /*!< USART Control register 2,                  Address offset: 0x10 */
    volatile uint32_t CR2;
    /*!< USART Control register 3,                  Address offset: 0x14 */
    volatile uint32_t CR3;
    /*!< USART Guard time and prescaler register,   Address offset: 0x18 */
    volatile uint32_t GTPR;

.
.
.
  }