Skip to content

Instantly share code, notes, and snippets.

@daemonp

daemonp/encrypted-root-arch-linux-pixelbook.md

Last active August 24, 2024 20:49
Show Gist options
  • Save daemonp/ecead946317b175e3b54731a513efe94 to your computer and use it in GitHub Desktop.
Save daemonp/ecead946317b175e3b54731a513efe94 to your computer and use it in GitHub Desktop.
Download ZIP
Installing Arch Linux on a Google Pixelbook (i7 16gb 500gb NVMe)
Raw
encrypted-root-arch-linux-pixelbook.md

Overview

Stable enough for my initial use-case, light-duty laptop for travel and presentations, running Linux all the time but retain a small ChromeOS volume for firmware updates and restoring settings.

1st attempt I wiped the drive and then found that when the machine attempted to suspect when the lid closed it wiped the NVRAM with no other option to boot into legacy mode than to restore ChromeOS and enable it again.

  • Setup base system in ChromeOS
  • Fully encrypted Btrfs root partition & ext4 boot
  • Install Arch Linux
  • Configure some basics

Status

June 2nd 2018

  • boots
  • X + i3
  • usb
  • wifi
  • touch screen
  • bluetooth
  • boot process requires password to be entered in a black screen
  • trackpad
  • sound (still fiddling)
  • hibernate
  • suspend
  • suspend on lid close

ChromeOS Enable developer mode

Enabling SeaBIOS

From Chrome hit Ctrl-Alt-T to enter chrosh mode

chrosh

sudo bash

crossystem dev_boot_usb=1 dev_boot_legacy=1

Alternatively you can turn on debug mode at the start page and set a root password, select a wireless network and then ssh in without setting up an account in ChromeOS.

Install the latest SeaBIOS firmware (the stock firmware won't detect NVME hard drive) https://mrchromebox.tech/#fwscript

cd; curl -LO https://mrchromebox.tech/firmware-util.sh && sudo bash firmware-util.sh

Run the command in the terminal, and select:

  • "Install/Update the RW_LEGACY firmware" option
  • The script will prompt you to enable USB boot by default, select YES

You can now start SeaBIOS by pressing Ctrl + L at the white boot splash screen.

Resize the partition map to add BOOT-C and KERN-C

curl -O https://raw.githubusercontent.com/ethanmad/chromeos-resize/master/cros-resize.sh
sudo bash cros-resize.sh

Got /dev/nvme0n1 as the target drive.
WARNING! All data on this device will be wiped out! Continue at your own risk!
Press [Enter] to proceed on /dev/nvme0n1 or CTRL+C to quit


To resize the KERN-C and ROOT-C partitions, we will shrink the STATE
partition (Chrome OS's data partition). You will specify how much size to
allocate to the STATE partition and KERN-C, and the rest of the space will be
allocated to ROOT-C.
There are 480040 MiB (468.79 GiB) available to work with.
The sum of the following two partition sizes must be less than this amount.
You have the option of modifying your STATE partition using either MiB or GiB(default) precision.

Would you like to use MiB or GiB? [m/G] G

How big should the STATE partition be in GiB (default: 5)? 25

KERN-C is where you can store kernels and should be mounted at /boot.
More space means you can keep more copies of kernels for rolling back, in case
something goes wrong.

How big should the KERN-C partition be in MiB (default: 64)? 128

You chose to allocate 25 GiB for the state partition and 128 MiB for
the KERN-C partition. ROOT-C will be allocated to the remaining space available
space. The size of the STATE and KERN-C partitions must be integers.

Is everything correct? [y/N] y

STATE will be allocated 52428800 sectors, or 25600 MiB, or 25 GiB.
KERN-C will be allocated 262144 sectors, or 128 MiB, or 0.12 GiB.
ROOT-C will be allocated 930431631 sectors, or 454312 MiB, or 443.66 GiB.
Afer this point, your disk will be repartitioned and wiped.

Does this look good? [y/N] y

Unmounting stateful partition...
Editing partition table...
Zeroing stateful partition...
26198671360 bytes (26 GB, 24 GiB) copied, 19.0005 s, 1.4 GB/s
25600+0 records in
25600+0 records out
26843545600 bytes (27 GB, 25 GiB) copied, 19.586 s, 1.4 GB/s

Now reboot and allow Chrome OS to repair itself.  You may have to run
this program again with the same values before they stick.

After rebooting lsblk

NAME          MAJ:MIN RM   SIZE RO TYPE MOUNTPOINT
loop0           7:0    0   7.4G  0 loop
`-encstateful 253:1    0   7.4G  0 dm   /mnt/stateful_partition/encrypted
loop1           7:1    0 683.3M  1 loop /opt/google/containers/android/rootfs/ro
loop2           7:2    0     4K  1 loop /opt/google/containers/arc-removable-med
loop3           7:3    0     4K  1 loop /opt/google/containers/arc-sdcard/mountp
loop4           7:4    0     4K  1 loop /opt/google/containers/arc-obb-mounter/m
loop5           7:5    0  91.3M  1 loop
zram0         252:0    0  22.8G  0 disk [SWAP]
nvme0n1       259:0    0   477G  0 disk
|-nvme0n1p1   259:1    0    25G  0 part /mnt/stateful_partition
|-nvme0n1p2   259:2    0    16M  0 part
|-nvme0n1p3   259:3    0     4G  0 part /
|-nvme0n1p4   259:4    0    16M  0 part
|-nvme0n1p5   259:5    0     4G  0 part
|-nvme0n1p6   259:6    0   128M  0 part
|-nvme0n1p7   259:7    0 443.7G  0 part
|-nvme0n1p8   259:8    0    16M  0 part /usr/share/oem
|-nvme0n1p9   259:9    0   512B  0 part
|-nvme0n1p10  259:10   0   512B  0 part
|-nvme0n1p11  259:11   0     8M  0 part
`-nvme0n1p12  259:12   0    32M  0 part

Install Arch

Prep USB for installing Arch

sudo dd if=archlinux-2018.05.01-x86_64.iso of=/dev/sda bs=4M

Boot USB to install Ctrl + L

set a bigger font

setfont sun12x22

Setup wifi

wifi-menu

Enable SSH to simplify the installation process (optional)

  • Set a root password
passwd root
  • Enable sshd
systemctl start sshd

Now you should be able ssh to this box from another one which has a font which you can see.

Preparing the System Drive

Encrypting the System Drive

  • Find out how fast are ciphers on your machine (AES should have hardware acceleration therefore win)

cryptsetup benchmark

# Tests are approximate using memory only (no storage IO).
PBKDF2-sha1      1519675 iterations per second for 256-bit key
PBKDF2-sha256    1667052 iterations per second for 256-bit key
PBKDF2-sha512    1264868 iterations per second for 256-bit key
PBKDF2-ripemd160 1026003 iterations per second for 256-bit key
PBKDF2-whirlpool  728177 iterations per second for 256-bit key
argon2i       4 iterations, 1048576 memory, 4 parallel threads (CPUs) for 256-bit key (requested 2000 ms time)
argon2id      4 iterations, 1048576 memory, 4 parallel threads (CPUs) for 256-bit key (requested 2000 ms time)
#     Algorithm | Key |  Encryption |  Decryption
        aes-cbc   128b  1032.1 MiB/s  3005.4 MiB/s
    serpent-cbc   128b    82.9 MiB/s   588.8 MiB/s
    twofish-cbc   128b   183.5 MiB/s   308.3 MiB/s
        aes-cbc   256b   811.6 MiB/s  2399.1 MiB/s
    serpent-cbc   256b    82.9 MiB/s   576.8 MiB/s
    twofish-cbc   256b   149.5 MiB/s   254.5 MiB/s
        aes-xts   256b  1333.9 MiB/s  1359.7 MiB/s
    serpent-xts   256b   429.3 MiB/s   424.2 MiB/s
    twofish-xts   256b   234.1 MiB/s   234.9 MiB/s
        aes-xts   512b  1241.6 MiB/s  1237.0 MiB/s
    serpent-xts   512b   438.0 MiB/s   426.5 MiB/s
    twofish-xts   512b   237.2 MiB/s   240.1 MiB/s
cryptsetup benchmark  14.79s user 24.55s system 124% cpu 31.648 total
  • Make data partition LUKS formatted
cryptsetup --cipher aes-xts-plain64 --key-size 512 --use-random --verify-passphrase luksFormat /dev/nvme0n1p7
  • Check if everything looks good
cryptsetup luksDump /dev/nvme0n1p7
  • Open encrypted partition
cryptsetup open --type luks /dev/nvme0n1p7 cryptroot
  • Create BTRFS on cryptdata volume
mkfs.btrfs -L data /dev/mapper/cryptroot
  • Mount BTRFS with flags
mount /dev/mapper/cryptroot /mnt -t btrfs -o defaults,noatime,nodiratime,discard,autodefrag,ssd,compress=lzo,space_cache
  • Create subvolumes
btrfs subvolume create /mnt/@
btrfs subvolume create /mnt/@home
btrfs subvolume create /mnt/@snapshots
  • Create boot partition
mkfs.ext4 /dev/nvme0n1p6
  • Mount sub-volumes and boot partition
umount /mnt
mount -o defaults,noatime,nodiratime,discard,autodefrag,ssd,compress=lzo,space_cache,subvol=@ /dev/mapper/cryptroot /mnt
mkdir /mnt/home
mount -o defaults,noatime,nodiratime,discard,autodefrag,ssd,compress=lzo,space_cache,subvol=@home /dev/mapper/cryptroot /mnt/home
mkdir /mnt/.snapshots
mount -o compress=lzo,discard,noatime,nodiratime,subvol=@snapshots /dev/mapper/cryptroot /mnt/.snapshots
mkdir /mnt/boot
mount /dev/nvme0n1p6 /mnt/boot
  • create nested subvolumes for special folders
mkdir -p /mnt/var/cache/pacman
btrfs subvolume create /mnt/var/cache/pacman/pkg
btrfs subvolume create /mnt/var/log
btrfs subvolume create /mnt/var/tmp

Arch Installation

  • use reflector to speed up install (optional)
pacman -Syy reflector
reflector --sort rate --save /etc/pacman.d/mirrorlist -f 5 -n 10 -p https
  • synchronize clock
timedatectl set-ntp true
  • install base packages
pacstrap /mnt base base-devel btrfs-progs sshd
  • generate fstab
genfstab -Up /mnt >> /mnt/etc/fstab
  • optional: add ramdisk tmp
echo "tmpfs     /tmp         tmpfs  defaults,noatime,mode=1777  0 0" >> /mnt/etc/fstab
  • change into installation root
arch-chroot /mnt
  • There is only SSD, so we want to reduce swapping as much as possible
echo "vm.swappiness=10" > /etc/sysctl.d/99-sysctl.conf
  • add modules, binaries, files, and hooks to mkinitcpio.conf

vi /etc/mkinitcpio.conf

... MODULES=(btrfs loop) ... BINARIES=(/usr/bin/btrfs) ... HOOKS=(base udev autodetect modconf keyboard encrypt block filesystems fsck)

  • Generate initial ramdisk image
mkinitcpio -p linux

Bootloader Installation

Hours were spent trying to use grub, 15 minutes and syslinux is working like a charm. If you want/need to use grub good luck!

pacman -S syslinux intel-ucode gptfdisk

syslinux-install_update -iam

Syslinux BIOS install successful Attribute Legacy Bios Bootable Set - /dev/nvme0n1p6 Installed MBR (/usr/lib/syslinux/bios/gptmbr.bin) to /dev/nvme0n1

Configure syslinux

vi /boot/syslinux/syslinux.cfg

LABEL arch
    MENU LABEL Arch Linux
    LINUX ../vmlinuz-linux
    APPEND rootflags=subvol=@ root=/dev/mapper/cryptroot cryptdevice=/dev/nvme0n1p7:cryptroot zswap.enabled=1 rw
    INITRD ../intel-ucode.img,../initramfs-linux.img

LABEL archfallback
    MENU LABEL Arch Linux Fallback
    LINUX ../vmlinuz-linux
    APPEND rootflags=subvol=@ root=/dev/mapper/cryptroot cryptdevice=/dev/nvme0n1p7:cryptroot rw
    INITRD ../initramfs-linux-fallback.img

System Configuration

  • synchronize clock
timedatectl set-ntp true
  • Set locale
cat >/etc/locale.gen <<END
en_US.UTF-8 UTF-8
END

locale-gen
echo LANG=en_US.UTF-8 > /etc/locale.conf
  • Set timezone
ln -sf /usr/share/zoneinfo/Europe/London /etc/localtime
hwclock --systohc --utc
  • set hostname
echo pixelarch > /etc/hostname
  • Add some more useful packages and setup reflector
pacman -Suy base-devel git iw wpa_supplicant dialog zsh sudo reflector vim
reflector --sort rate --save /etc/pacman.d/mirrorlist -f 5 -n 10 -p https
  • add a new user account
useradd -m -g users -G wheel,storage,power -s /bin/zsh damon
passwd damon
  • enable sudo for your user account

uncomment the following line

%wheel ALL=(ALL) ALL

  • disable root account
passwd -l root

zmem for swap

I'm not a huge fan of swap these days, and let OOM killer do it's job. It's not safe to run a swapfile in the event that you find yourself needing swap for some reason so zmem provides a nice way to turn a bit of memory into swap.

pacman -S systemd-swap

vi /etc/systemd/swap.conf

zswap_enabled=0 zram_enabled=1

Tidy up and reboot

exit
umount -R /mnt
swapoff -a
reboot

Hit Ctrl+L at the developer screen and it should boot to syslinux, the menu has some screen tearing but the arrow navigation works, press enter on the first entry and you should be promoted to decrypt your root drive and then boot right to the login prompt.

Post-install steps

install, configure and enable Snapper

sudo pacman -S snapper
sudo umount /.snapshots
sudo rm -r /.snapshots
sudo snapper -c root create-config /
sudo mount -o compression=lzo,discard,noatime,nodiratime,subvol=@snapshots /dev/mapper/cryptroot /.snapshots
sudo systemctl start snapper-timeline.timer

install & enable power management

sudo pacman -S tlp x86_energy_perf_policy tlp-rdw
sudo systemctl enable tlp.service
sudo systemctl enable tlp-sleep.service
sudo systemctl enable NetworkManager-dispatcher.service
sudo systemctl mask systemd-rfkill.service
sudo systemctl mask systemd-rfkill.socket

enable bluetooth

pacman -S bluez bluez-firmware bluez-utils blueman
sudo systemctl enable --now bluetooth.service

Misc

Quick paste to open and mount drives when booting off USB, useful for trying to install grub or when something is hosed up.

cryptsetup open --type luks /dev/nvme0n1p7 cryptroot
mount -o defaults,noatime,nodiratime,discard,autodefrag,ssd,compress=lzo,space_cache,subvol=@ /dev/mapper/cryptroot /mnt
mount -o defaults,noatime,nodiratime,discard,autodefrag,ssd,compress=lzo,space_cache,subvol=@home /dev/mapper/cryptroot /mnt/home
mount -o compress=lzo,discard,noatime,nodiratime,subvol=@snapshots /dev/mapper/cryptroot /mnt/.snapshots
mount /dev/nvme0n1p6 /mnt/boot

Firmware tarball

A tarball of the /lib/firmware directory of ChromeOS for future inspection

https://s3.eu-west-1.amazonaws.com/petta.org/firmware.tar.gz

Trackpad

The trackpad is funky out of the box and is still in need of some fine-tuning.

There is quite a bit of dislike for synaptics driver, but it does the job better than anything else I tested (mtrack and libinput)

pacman -S xf86-input-synaptics

/etc/X11/xorg.conf.d/70-synaptics.conf

Section "InputClass"
    Identifier "touchpad"
    Driver "synaptics"
    MatchIsTouchpad "on"
        Option "TapButton1" "1"
        Option "TapButton2" "3"
        Option "TapButton3" "2"
        Option "VertEdgeScroll" "on"
        Option "VertTwoFingerScroll" "on"
        Option "HorizEdgeScroll" "on"
        Option "HorizTwoFingerScroll" "on"
        Option "EmulateTwoFingerMinZ" "40"
        Option "EmulateTwoFingerMinW" "8"
        Option "CoastingSpeed" "0"
        Option "MaxTapTime" "125"
        # Enable clickpad/multitouch support
        Option "ClickPad" "true"
        # Middle-button emulation is not supported
        Option "EmulateMidButtonTime" "0"
        # Define right soft button at the bottom
        Option "SoftButtonAreas"  "50% 0 82% 0 0 0 0 0"
EndSection

Sound Modules

Still very much WIP, Kaby Lake AoC isn't quite in mainline yet

GalliumOS/galliumos-distro#379

lsmod | grep snd

snd_soc_kbl_rt5663_rt5514_max98927    24576  3
snd_soc_hdac_hdmi      24576  1 snd_soc_kbl_rt5663_rt5514_max98927
snd_soc_skl_ssp_clk    16384  3
snd_soc_dmic           16384  0
snd_soc_skl            65536  3 snd_soc_skl_ssp_clk
snd_soc_skl_ipc        32768  1 snd_soc_skl
snd_soc_sst_ipc        16384  1 snd_soc_skl_ipc
snd_soc_sst_dsp        32768  1 snd_soc_skl_ipc
snd_soc_sst_match      16384  1 snd_soc_skl
snd_hda_ext_core       20480  2 snd_soc_hdac_hdmi,snd_soc_skl
snd_hda_core           57344  3 snd_hda_ext_core,snd_soc_hdac_hdmi,snd_soc_skl
snd_soc_rt5514         40960  1
snd_soc_max98927       24576  2
snd_soc_rt5663         65536  2 snd_soc_kbl_rt5663_rt5514_max98927
snd_soc_rt5514_spi     16384  3 snd_soc_rt5514
snd_soc_rl6231         16384  2 snd_soc_rt5514,snd_soc_rt5663
snd_seq_dummy          16384  0
snd_seq                57344  5 snd_seq_dummy
snd_seq_device         16384  1 snd_seq

References

https://gist.github.com/JindrichPilar/e22ed9c316f7dc1e4f20 https://github.com/markitoxs/pixelbook https://github.com/EmbeddedAndroid/linux-eve https://www.syslinux.org/wiki/index.php?title=Filesystem https://github.com/bparmentier/www/blob/master/posts/how-to-install-arch-linux-on-an-encrypted-btrfs-partition.md https://bbs.archlinux.org/viewtopic.php?id=222985 https://wiki.archlinux.org/index.php/microcode -- syslinux microcode https://github.com/GalliumOS/galliumos-skylake -- skylake bits and bobs https://www.codentium.com/category/chromebooks.html -- audio bits

Raw
usr_share_alsa_topology_broadwell_broadwell.conf
# Dynamic Firmware Configuration for Broadwell
# TLV
SectionTLV."hsw_vol_tlv" {
Comment "TLV used by both global and stream volumes"
scale {
min "-9000"
step "300"
mute "1"
}
}
# Controls
SectionControlMixer."Master Playback Volume" {
Comment "Global DSP volume"
# control belongs to this index group
index "1"
# Channel register and shift for Front Left/Right
channel."FL" {
reg "0"
shift "0"
}
channel."FR" {
reg "0"
shift "8"
}
# max control value and whether value is inverted
max "31"
invert "false"
# control uses bespoke driver get/put/info ID 0
ops."ctl" {
info "volsw"
get "256"
put "256"
}
# uses TLV data above
tlv "hsw_vol_tlv"
}
SectionControlMixer."Media0 Playback Volume" {
Comment "Offload 0 volume"
# control belongs to this index group
index "1"
# Channel register and shift for Front Left/Right
channel."FL" {
reg "1"
shift "0"
}
channel."FR" {
reg "1"
shift "8"
}
# max control value and whether value is inverted
max "31"
invert "false"
# control uses bespoke driver get/put/info ID 0
ops."ctl" {
info "volsw"
get "257"
put "257"
}
# uses TLV data above
tlv "hsw_vol_tlv"
}
SectionControlMixer."Media1 Playback Volume" {
Comment "Offload 1 volume"
# control belongs to this index group
index "1"
# Channel register and shift for Front Left/Right
channel."FL" {
reg "2"
shift "0"
}
channel."FR" {
reg "2"
shift "8"
}
# max control value and whether value is inverted
max "31"
invert "false"
# control uses bespoke driver get/put/info ID 0
ops."ctl" {
info "volsw"
get "257"
put "257"
}
# uses TLV data above
tlv "hsw_vol_tlv"
}
SectionControlMixer."Mic Capture Volume" {
Comment "Mic Capture volume"
# control belongs to this index group
index "1"
# Channel register and shift for Front Left/Right
channel."FL" {
reg "0"
shift "0"
}
channel."FR" {
reg "0"
shift "8"
}
# max control value and whether value is inverted
max "31"
invert "false"
# control uses bespoke driver get/put/info ID 0
ops."ctl" {
info "volsw"
get "257"
put "257"
}
# uses TLV data above
tlv "hsw_vol_tlv"
}
SectionWidget."SSP0 CODEC IN" {
index "1"
type "aif_in"
no_pm "true"
shift "0"
invert "0"
}
SectionWidget."SSP0 CODEC OUT" {
index "1"
type "aif_out"
no_pm "true"
shift "0"
invert "0"
}
SectionWidget."SSP1 BT IN" {
index "1"
type "aif_in"
no_pm "true"
shift "0"
invert "0"
}
SectionWidget."SSP1 BT OUT" {
index "1"
type "aif_out"
no_pm "true"
shift "0"
invert "0"
}
SectionWidget."Playback VMixer" {
index "1"
type "mixer"
no_pm "true"
shift "0"
invert "0"
}
# PCM Configurations supported by FW
SectionPCMConfig."PCM 48k Stereo 24bit" {
config."playback" {
format "S24_LE"
rate "48000"
channels "2"
tdm_slot "0xf"
}
config."capture" {
format "S24_LE"
rate "48000"
channels "2"
tdm_slot "0xf"
}
}
SectionPCMConfig."PCM 48k Stereo 16bit" {
config."playback" {
format "S16_LE"
rate "48000"
channels "2"
tdm_slot "0xf"
}
config."capture" {
format "S16_LE"
rate "48000"
channels "2"
tdm_slot "0xf"
}
}
SectionPCMConfig."PCM 48k 2P/4C 16bit" {
config."playback" {
format "S16_LE"
rate "48000"
channels "2"
tdm_slot "0xf"
}
config."capture" {
format "S16_LE"
rate "48000"
channels "4"
tdm_slot "0xf"
}
}
# PCM capabilities supported by FW
SectionPCMCapabilities."System Playback" {
formats "S24_LE,S16_LE"
rate_min "48000"
rate_max "48000"
channels_min "2"
channels_max "2"
}
SectionPCMCapabilities."Analog Capture" {
formats "S24_LE,S16_LE"
rate_min "48000"
rate_max "48000"
channels_min "2"
channels_max "4"
}
SectionPCMCapabilities."Loopback Capture" {
formats "S24_LE,S16_LE"
rate_min "48000"
rate_max "48000"
channels_min "2"
channels_max "2"
}
SectionPCMCapabilities."Offload0 Playback" {
formats "S24_LE,S16_LE"
rate_min "8000"
rate_max "192000"
channels_min "2"
channels_max "2"
}
SectionPCMCapabilities."Offload1 Playback" {
formats "S24_LE,S16_LE"
rate_min "8000"
rate_max "192000"
channels_min "2"
channels_max "2"
}
# PCM devices exported by Firmware
SectionPCM."System Playback/Capture" {
index "1"
# used for binding to the PCM
id "0"
dai."System Pin" {
id "0"
}
pcm."playback" {
capabilities "System Playback"
configs [
"PCM 48k Stereo 24bit"
"PCM 48k Stereo 16bit"
]
}
pcm."capture" {
capabilities "Analog Capture"
configs [
"PCM 48k Stereo 24bit"
"PCM 48k Stereo 16bit"
"PCM 48k 2P/4C 16bit"
]
}
}
SectionPCM."Offload0 Playback" {
index "1"
# used for binding to the PCM
id "1"
dai."Offload0 Pin" {
id "1"
}
pcm."playback" {
capabilities "Offload0 Playback"
configs [
"PCM 48k Stereo 24bit"
"PCM 48k Stereo 16bit"
]
}
}
SectionPCM."Offload1 Playback" {
index "1"
# used for binding to the PCM
id "2"
dai."Offload1 Pin" {
id "2"
}
pcm."playback" {
capabilities "Offload1 Playback"
configs [
"PCM 48k Stereo 24bit"
"PCM 48k Stereo 16bit"
]
}
}
SectionPCM."Loopback PCM" {
index "1"
# used for binding to the PCM
id "3"
dai."Loopback Pin" {
id "3"
}
pcm."capture" {
capabilities "Loopback Capture"
configs [
"PCM 48k Stereo 24bit"
"PCM 48k Stereo 16bit"
]
}
}
SectionGraph."dsp" {
index "1"
lines [
"Playback VMixer, , System Playback"
"Playback VMixer, , Offload0 Playback"
"Playback VMixer, , Offload1 Playback"
"SSP0 CODEC OUT, , Playback VMixer"
"Loopback Capture, , Playback VMixer"
"Analog Capture, , SSP0 CODEC IN"
]
}
SectionHWConfig."CodecHWConfig" {
id "1"
format "I2S" # physical audio format.
bclk "master" # Platform is master of bit clock
fsync "master" # platform is master of fsync
}
SectionLink."Codec" {
# used for binding to the physical link
id "0"
hw_configs [
"CodecHWConfig"
]
default_hw_conf_id "1"
}
Raw
usr_share_alsa_topology_bxtrt298_bxt_i2s.conf
SectionVendorTokens."skl_tokens" {
SKL_TKN_UUID "1"
SKL_TKN_U8_NUM_BLOCKS "2"
SKL_TKN_U8_BLOCK_TYPE "3"
SKL_TKN_U8_IN_PIN_TYPE "4"
SKL_TKN_U8_OUT_PIN_TYPE "5"
SKL_TKN_U8_DYN_IN_PIN "6"
SKL_TKN_U8_DYN_OUT_PIN "7"
SKL_TKN_U8_IN_QUEUE_COUNT "8"
SKL_TKN_U8_OUT_QUEUE_COUNT "9"
SKL_TKN_U8_TIME_SLOT "10"
SKL_TKN_U8_CORE_ID "11"
SKL_TKN_U8_MODULE_TYPE "12"
SKL_TKN_U8_CONN_TYPE "13"
SKL_TKN_U8_DEV_TYPE "14"
SKL_TKN_U8_HW_CONN_TYPE "15"
SKL_TKN_U16_MOD_INST_ID "16"
SKL_TKN_U16_BLOCK_SIZE "17"
SKL_TKN_U32_MAX_MCPS "18"
SKL_TKN_U32_MEM_PAGES "19"
SKL_TKN_U32_OBS "20"
SKL_TKN_U32_IBS "21"
SKL_TKN_U32_VBUS_ID "22"
SKL_TKN_U32_PARAMS_FIXUP "23"
SKL_TKN_U32_CONVERTER "24"
SKL_TKN_U32_PIPE_ID "25"
SKL_TKN_U32_PIPE_CONN_TYPE "26"
SKL_TKN_U32_PIPE_PRIORITY "27"
SKL_TKN_U32_PIPE_MEM_PGS "28"
SKL_TKN_U32_DIR_PIN_COUNT "29"
SKL_TKN_U32_FMT_CH "30"
SKL_TKN_U32_FMT_FREQ "31"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "33"
SKL_TKN_U32_FMT_CH_CONFIG "34"
SKL_TKN_U32_FMT_INTERLEAVE "35"
SKL_TKN_U32_FMT_SAMPLE_TYPE "36"
SKL_TKN_U32_FMT_CH_MAP "37"
SKL_TKN_U32_PIN_MOD_ID "38"
SKL_TKN_U32_PIN_INST_ID "39"
SKL_TKN_U32_MOD_SET_PARAMS "40"
SKL_TKN_U32_MOD_PARAM_ID "41"
SKL_TKN_U32_CAPS_SET_PARAMS "42"
SKL_TKN_U32_CAPS_PARAMS_ID "43"
SKL_TKN_U32_CAPS_SIZE "44"
SKL_TKN_U32_PROC_DOMAIN "45"
SKL_TKN_U32_LIB_COUNT "46"
SKL_TKN_STR_LIB_NAME "47"
}
SectionVendorTuples."media0_in cpr 0 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."media0_in cpr 0_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "516"
}
}
SectionVendorTuples."media0_in cpr 0" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "1"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "5"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "0"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "1"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."media0_in mi num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."media0_in mi_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "420"
}
}
SectionVendorTuples."media0_in mi" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "178, 110, 101, 57, 113, 59,
73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "1"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "0"
SKL_TKN_U8_CONN_TYPE "0"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "6"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "0"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "1"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."codec0_in cpr 1 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."codec0_in cpr 1_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "516"
}
}
SectionVendorTuples."codec0_in cpr 1" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "2"
SKL_TKN_U8_HW_CONN_TYPE "2"
SKL_TKN_U8_DEV_TYPE "2"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "1"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0x5"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "2"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."codec0_in mi num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."codec0_in mi_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "420"
}
}
SectionVendorTuples."codec0_in mi" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "178, 110, 101, 57, 113, 59,
73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "1"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "0"
SKL_TKN_U8_CONN_TYPE "0"
SKL_TKN_U8_HW_CONN_TYPE "2"
SKL_TKN_U8_DEV_TYPE "6"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "1"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "2"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."codec0_out mo num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."codec0_out mo_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "1092"
}
}
SectionVendorTuples."codec0_out mo" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "90, 80, 86, 60, 215, 36,
143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "8"
SKL_TKN_U8_OUT_QUEUE_COUNT "1"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "0"
SKL_TKN_U8_CONN_TYPE "0"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "6"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "0"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "3"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "16"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_2" {
SKL_TKN_U32_DIR_PIN_COUNT "32"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_3" {
SKL_TKN_U32_DIR_PIN_COUNT "48"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_4" {
SKL_TKN_U32_DIR_PIN_COUNT "64"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_5" {
SKL_TKN_U32_DIR_PIN_COUNT "80"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_6" {
SKL_TKN_U32_DIR_PIN_COUNT "96"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_7" {
SKL_TKN_U32_DIR_PIN_COUNT "112"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "16"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_2" {
SKL_TKN_U32_DIR_PIN_COUNT "32"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_3" {
SKL_TKN_U32_DIR_PIN_COUNT "48"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_4" {
SKL_TKN_U32_DIR_PIN_COUNT "64"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_5" {
SKL_TKN_U32_DIR_PIN_COUNT "80"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_6" {
SKL_TKN_U32_DIR_PIN_COUNT "96"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_7" {
SKL_TKN_U32_DIR_PIN_COUNT "112"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."codec0_out cpr 2 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."codec0_out cpr 2_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "516"
}
}
SectionVendorTuples."codec0_out cpr 2" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "2"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "2"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "2"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0x5"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "3"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."media0_out mo num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."media0_out mo_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "1092"
}
}
SectionVendorTuples."media0_out mo" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "90, 80, 86, 60, 215, 36,
143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "8"
SKL_TKN_U8_OUT_QUEUE_COUNT "1"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "0"
SKL_TKN_U8_CONN_TYPE "0"
SKL_TKN_U8_HW_CONN_TYPE "2"
SKL_TKN_U8_DEV_TYPE "6"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "1"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "4"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "16"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_2" {
SKL_TKN_U32_DIR_PIN_COUNT "32"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_3" {
SKL_TKN_U32_DIR_PIN_COUNT "48"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_4" {
SKL_TKN_U32_DIR_PIN_COUNT "64"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_5" {
SKL_TKN_U32_DIR_PIN_COUNT "80"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_6" {
SKL_TKN_U32_DIR_PIN_COUNT "96"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_7" {
SKL_TKN_U32_DIR_PIN_COUNT "112"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "16"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_2" {
SKL_TKN_U32_DIR_PIN_COUNT "32"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_3" {
SKL_TKN_U32_DIR_PIN_COUNT "48"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_4" {
SKL_TKN_U32_DIR_PIN_COUNT "64"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_5" {
SKL_TKN_U32_DIR_PIN_COUNT "80"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_6" {
SKL_TKN_U32_DIR_PIN_COUNT "96"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_7" {
SKL_TKN_U32_DIR_PIN_COUNT "112"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."media0_out cpr 3 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."media0_out cpr 3_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "516"
}
}
SectionVendorTuples."media0_out cpr 3" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "0"
SKL_TKN_U8_HW_CONN_TYPE "2"
SKL_TKN_U8_DEV_TYPE "5"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "3"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "4"
SKL_TKN_U32_CONVERTER "4"
SKL_TKN_U32_PIPE_ID "4"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."dmic01_hifi_in cpr 4 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."dmic01_hifi_in cpr 4_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "516"
}
}
SectionVendorTuples."dmic01_hifi_in cpr 4" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "2"
SKL_TKN_U8_HW_CONN_TYPE "2"
SKL_TKN_U8_DEV_TYPE "1"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "4"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0x0"
SKL_TKN_U32_PARAMS_FIXUP "4"
SKL_TKN_U32_CONVERTER "4"
SKL_TKN_U32_PIPE_ID "5"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."dmic01_hifi_in mi num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."dmic01_hifi_in mi_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "420"
}
}
SectionVendorTuples."dmic01_hifi_in mi" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "178, 110, 101, 57, 113, 59,
73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "1"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "0"
SKL_TKN_U8_CONN_TYPE "0"
SKL_TKN_U8_HW_CONN_TYPE "2"
SKL_TKN_U8_DEV_TYPE "6"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "2"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "5"
SKL_TKN_U32_PIPE_CONN_TYPE "0"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."codec1_out mo num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."codec1_out mo_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "1092"
}
}
SectionVendorTuples."codec1_out mo" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "90, 80, 86, 60, 215, 36,
143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "8"
SKL_TKN_U8_OUT_QUEUE_COUNT "1"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "0"
SKL_TKN_U8_CONN_TYPE "0"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "6"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "2"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "6"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "16"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_2" {
SKL_TKN_U32_DIR_PIN_COUNT "32"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_3" {
SKL_TKN_U32_DIR_PIN_COUNT "48"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_4" {
SKL_TKN_U32_DIR_PIN_COUNT "64"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_5" {
SKL_TKN_U32_DIR_PIN_COUNT "80"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_6" {
SKL_TKN_U32_DIR_PIN_COUNT "96"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_7" {
SKL_TKN_U32_DIR_PIN_COUNT "112"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "16"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_2" {
SKL_TKN_U32_DIR_PIN_COUNT "32"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_3" {
SKL_TKN_U32_DIR_PIN_COUNT "48"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_4" {
SKL_TKN_U32_DIR_PIN_COUNT "64"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_5" {
SKL_TKN_U32_DIR_PIN_COUNT "80"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_6" {
SKL_TKN_U32_DIR_PIN_COUNT "96"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_7" {
SKL_TKN_U32_DIR_PIN_COUNT "112"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."codec1_out cpr 5 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."codec1_out cpr 5_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "516"
}
}
SectionVendorTuples."codec1_out cpr 5" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "2"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "2"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "5"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0x5"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "6"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."hdmi1_pt_out cpr 6 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."hdmi1_pt_out cpr 6_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "516"
}
}
SectionVendorTuples."hdmi1_pt_out cpr 6" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "1"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "5"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "6"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "7"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "7"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."hdmi1_pt_out cpr 7 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."hdmi1_pt_out cpr 7_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "516"
}
}
SectionVendorTuples."hdmi1_pt_out cpr 7" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "1"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "4"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "7"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "7"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "7"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."hdmi2_pt_out cpr 8 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."hdmi2_pt_out cpr 8_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "516"
}
}
SectionVendorTuples."hdmi2_pt_out cpr 8" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "1"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "5"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "8"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "7"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "8"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."hdmi2_pt_out cpr 9 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."hdmi2_pt_out cpr 9_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "516"
}
}
SectionVendorTuples."hdmi2_pt_out cpr 9" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "1"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "4"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "9"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "7"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "8"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."hdmi3_pt_out cpr 10 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."hdmi3_pt_out cpr 10_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "516"
}
}
SectionVendorTuples."hdmi3_pt_out cpr 10" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "1"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "5"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "10"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "7"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "9"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."hdmi3_pt_out cpr 11 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."hdmi3_pt_out cpr 11_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "516"
}
}
SectionVendorTuples."hdmi3_pt_out cpr 11" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "1"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "4"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "11"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "7"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "9"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."mch_cap_in cpr 12 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."mch_cap_in cpr 12_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "516"
}
}
SectionVendorTuples."mch_cap_in cpr 12" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "2"
SKL_TKN_U8_HW_CONN_TYPE "2"
SKL_TKN_U8_DEV_TYPE "1"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "12"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "200000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "768"
SKL_TKN_U32_IBS "768"
SKL_TKN_U32_VBUS_ID "0x0"
SKL_TKN_U32_PARAMS_FIXUP "4"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "10"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "4"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffff4320"
SKL_TKN_U32_FMT_CH_CONFIG "0x5"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "4"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffff4320"
SKL_TKN_U32_FMT_CH_CONFIG "0x5"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "4"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffff4320"
SKL_TKN_U32_FMT_CH_CONFIG "0x5"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."mch_cap_in cpr 13 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."mch_cap_in cpr 13_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "516"
}
}
SectionVendorTuples."mch_cap_in cpr 13" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "2"
SKL_TKN_U8_HW_CONN_TYPE "2"
SKL_TKN_U8_DEV_TYPE "5"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "13"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "768"
SKL_TKN_U32_IBS "768"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "4"
SKL_TKN_U32_CONVERTER "4"
SKL_TKN_U32_PIPE_ID "10"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
SKL_TKN_U32_PROC_DOMAIN "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "4"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffff4320"
SKL_TKN_U32_FMT_CH_CONFIG "0x5"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "4"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffff4320"
SKL_TKN_U32_FMT_CH_CONFIG "0x5"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "4"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffff4320"
SKL_TKN_U32_FMT_CH_CONFIG "0x5"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."lib_data num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."lib_data_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "56"
}
}
SectionVendorTuples."lib_data" {
tokens "skl_tokens"
tuples."word.lib_name" {
SKL_TKN_U32_LIB_COUNT "1"
}
tuples."string.lib_name_0" {
SKL_TKN_STR_LIB_NAME "base_fw"
}
}
SectionData."media0_in cpr 0 num_desc" {
tuples "media0_in cpr 0 num_desc"
}
SectionData."media0_in cpr 0_size_desc" {
tuples "media0_in cpr 0_size_desc"
}
SectionData."media0_in cpr 0" {
tuples "media0_in cpr 0"
}
SectionData."media0_in mi num_desc" {
tuples "media0_in mi num_desc"
}
SectionData."media0_in mi_size_desc" {
tuples "media0_in mi_size_desc"
}
SectionData."media0_in mi" {
tuples "media0_in mi"
}
SectionData."codec0_in cpr 1 num_desc" {
tuples "codec0_in cpr 1 num_desc"
}
SectionData."codec0_in cpr 1_size_desc" {
tuples "codec0_in cpr 1_size_desc"
}
SectionData."codec0_in cpr 1" {
tuples "codec0_in cpr 1"
}
SectionData."codec0_in mi num_desc" {
tuples "codec0_in mi num_desc"
}
SectionData."codec0_in mi_size_desc" {
tuples "codec0_in mi_size_desc"
}
SectionData."codec0_in mi" {
tuples "codec0_in mi"
}
SectionData."codec0_out mo num_desc" {
tuples "codec0_out mo num_desc"
}
SectionData."codec0_out mo_size_desc" {
tuples "codec0_out mo_size_desc"
}
SectionData."codec0_out mo" {
tuples "codec0_out mo"
}
SectionData."codec0_out cpr 2 num_desc" {
tuples "codec0_out cpr 2 num_desc"
}
SectionData."codec0_out cpr 2_size_desc" {
tuples "codec0_out cpr 2_size_desc"
}
SectionData."codec0_out cpr 2" {
tuples "codec0_out cpr 2"
}
SectionData."media0_out mo num_desc" {
tuples "media0_out mo num_desc"
}
SectionData."media0_out mo_size_desc" {
tuples "media0_out mo_size_desc"
}
SectionData."media0_out mo" {
tuples "media0_out mo"
}
SectionData."media0_out cpr 3 num_desc" {
tuples "media0_out cpr 3 num_desc"
}
SectionData."media0_out cpr 3_size_desc" {
tuples "media0_out cpr 3_size_desc"
}
SectionData."media0_out cpr 3" {
tuples "media0_out cpr 3"
}
SectionData."dmic01_hifi_in cpr 4 num_desc" {
tuples "dmic01_hifi_in cpr 4 num_desc"
}
SectionData."dmic01_hifi_in cpr 4_size_desc" {
tuples "dmic01_hifi_in cpr 4_size_desc"
}
SectionData."dmic01_hifi_in cpr 4" {
tuples "dmic01_hifi_in cpr 4"
}
SectionData."dmic01_hifi_in mi num_desc" {
tuples "dmic01_hifi_in mi num_desc"
}
SectionData."dmic01_hifi_in mi_size_desc" {
tuples "dmic01_hifi_in mi_size_desc"
}
SectionData."dmic01_hifi_in mi" {
tuples "dmic01_hifi_in mi"
}
SectionData."codec1_out mo num_desc" {
tuples "codec1_out mo num_desc"
}
SectionData."codec1_out mo_size_desc" {
tuples "codec1_out mo_size_desc"
}
SectionData."codec1_out mo" {
tuples "codec1_out mo"
}
SectionData."codec1_out cpr 5 num_desc" {
tuples "codec1_out cpr 5 num_desc"
}
SectionData."codec1_out cpr 5_size_desc" {
tuples "codec1_out cpr 5_size_desc"
}
SectionData."codec1_out cpr 5" {
tuples "codec1_out cpr 5"
}
SectionData."hdmi1_pt_out cpr 6 num_desc" {
tuples "hdmi1_pt_out cpr 6 num_desc"
}
SectionData."hdmi1_pt_out cpr 6_size_desc" {
tuples "hdmi1_pt_out cpr 6_size_desc"
}
SectionData."hdmi1_pt_out cpr 6" {
tuples "hdmi1_pt_out cpr 6"
}
SectionData."hdmi1_pt_out cpr 7 num_desc" {
tuples "hdmi1_pt_out cpr 7 num_desc"
}
SectionData."hdmi1_pt_out cpr 7_size_desc" {
tuples "hdmi1_pt_out cpr 7_size_desc"
}
SectionData."hdmi1_pt_out cpr 7" {
tuples "hdmi1_pt_out cpr 7"
}
SectionData."hdmi2_pt_out cpr 8 num_desc" {
tuples "hdmi2_pt_out cpr 8 num_desc"
}
SectionData."hdmi2_pt_out cpr 8_size_desc" {
tuples "hdmi2_pt_out cpr 8_size_desc"
}
SectionData."hdmi2_pt_out cpr 8" {
tuples "hdmi2_pt_out cpr 8"
}
SectionData."hdmi2_pt_out cpr 9 num_desc" {
tuples "hdmi2_pt_out cpr 9 num_desc"
}
SectionData."hdmi2_pt_out cpr 9_size_desc" {
tuples "hdmi2_pt_out cpr 9_size_desc"
}
SectionData."hdmi2_pt_out cpr 9" {
tuples "hdmi2_pt_out cpr 9"
}
SectionData."hdmi3_pt_out cpr 10 num_desc" {
tuples "hdmi3_pt_out cpr 10 num_desc"
}
SectionData."hdmi3_pt_out cpr 10_size_desc" {
tuples "hdmi3_pt_out cpr 10_size_desc"
}
SectionData."hdmi3_pt_out cpr 10" {
tuples "hdmi3_pt_out cpr 10"
}
SectionData."hdmi3_pt_out cpr 11 num_desc" {
tuples "hdmi3_pt_out cpr 11 num_desc"
}
SectionData."hdmi3_pt_out cpr 11_size_desc" {
tuples "hdmi3_pt_out cpr 11_size_desc"
}
SectionData."hdmi3_pt_out cpr 11" {
tuples "hdmi3_pt_out cpr 11"
}
SectionData."mch_cap_in cpr 12 num_desc" {
tuples "mch_cap_in cpr 12 num_desc"
}
SectionData."mch_cap_in cpr 12_size_desc" {
tuples "mch_cap_in cpr 12_size_desc"
}
SectionData."mch_cap_in cpr 12" {
tuples "mch_cap_in cpr 12"
}
SectionData."mch_cap_in cpr 13 num_desc" {
tuples "mch_cap_in cpr 13 num_desc"
}
SectionData."mch_cap_in cpr 13_size_desc" {
tuples "mch_cap_in cpr 13_size_desc"
}
SectionData."mch_cap_in cpr 13" {
tuples "mch_cap_in cpr 13"
}
SectionData."lib_data num_desc" {
tuples "lib_data num_desc"
}
SectionData."lib_data_size_desc" {
tuples "lib_data_size_desc"
}
SectionData."lib_data" {
tuples "lib_data"
}
SectionControlMixer."media0_in mi Switch" {
index"0"
invert "false"
max "1"
min"0"
no_pm "true"
channel."fl" {
reg "-1"
shift "0"
}
channel."fr" {
reg "-1"
shift "0"
}
ops."ctl" {
get "64"
put "64"
info "64"
}
}
SectionControlMixer."dmic01_hifi_in mi Switch" {
index"0"
invert "false"
max "1"
min"0"
no_pm "true"
channel."fl" {
reg "-1"
shift "0"
}
channel."fr" {
reg "-1"
shift "0"
}
ops."ctl" {
get "64"
put "64"
info "64"
}
}
SectionControlMixer."codec0_in mi Switch" {
index"0"
invert "false"
max "1"
min"0"
no_pm "true"
channel."fl" {
reg "-1"
shift "0"
}
channel."fr" {
reg "-1"
shift "0"
}
ops."ctl" {
get "64"
put "64"
info "64"
}
}
SectionWidget."media0_in cpr 0" {
index"0"
type"mixer"
no_pm "true"
event_type "3"
event_flags "9"
data [
"media0_in cpr 0 num_desc"
"media0_in cpr 0_size_desc"
"media0_in cpr 0"
]
}
SectionWidget."media0_in mi" {
index"0"
type"pga"
no_pm "true"
event_type "4"
event_flags "9"
subseq "10"
data [
"media0_in mi num_desc"
"media0_in mi_size_desc"
"media0_in mi"
]
}
SectionWidget."codec0_in cpr 1" {
index"0"
type"mixer"
no_pm "true"
event_type "3"
event_flags "9"
data [
"codec0_in cpr 1 num_desc"
"codec0_in cpr 1_size_desc"
"codec0_in cpr 1"
]
}
SectionWidget."codec0_in mi" {
index"0"
type"pga"
no_pm "true"
event_type "4"
event_flags "9"
subseq "10"
data [
"codec0_in mi num_desc"
"codec0_in mi_size_desc"
"codec0_in mi"
]
}
SectionWidget."codec0_in" {
index"0"
type"aif_in"
no_pm "true"
}
SectionWidget."codec0_out mo" {
index"0"
type"mixer"
no_pm "true"
event_type "1"
event_flags "15"
subseq "10"
data [
"codec0_out mo num_desc"
"codec0_out mo_size_desc"
"codec0_out mo"
]
mixer [
"media0_in mi Switch"
"dmic01_hifi_in mi Switch"
"codec0_in mi Switch"
]
}
SectionWidget."codec0_out cpr 2" {
index"0"
type"pga"
no_pm "true"
event_type "4"
data [
"codec0_out cpr 2 num_desc"
"codec0_out cpr 2_size_desc"
"codec0_out cpr 2"
]
}
SectionWidget."codec0_out" {
index"0"
type"aif_out"
no_pm "true"
}
SectionWidget."media0_out mo" {
index"0"
type"mixer"
no_pm "true"
event_type "1"
event_flags "15"
subseq "10"
data [
"media0_out mo num_desc"
"media0_out mo_size_desc"
"media0_out mo"
]
mixer [
"media0_in mi Switch"
"dmic01_hifi_in mi Switch"
"codec0_in mi Switch"
]
}
SectionWidget."media0_out cpr 3" {
index"0"
type"pga"
no_pm "true"
event_type "4"
data [
"media0_out cpr 3 num_desc"
"media0_out cpr 3_size_desc"
"media0_out cpr 3"
]
}
SectionWidget."dmic01_hifi_in cpr 4" {
index"0"
type"mixer"
no_pm "true"
event_type "3"
event_flags "9"
data [
"dmic01_hifi_in cpr 4 num_desc"
"dmic01_hifi_in cpr 4_size_desc"
"dmic01_hifi_in cpr 4"
]
}
SectionWidget."dmic01_hifi_in mi" {
index"0"
type"pga"
no_pm "true"
event_type "4"
event_flags "9"
subseq "10"
data [
"dmic01_hifi_in mi num_desc"
"dmic01_hifi_in mi_size_desc"
"dmic01_hifi_in mi"
]
}
SectionWidget."dmic01_hifi" {
index"0"
type"aif_in"
no_pm "true"
}
SectionWidget."codec1_out mo" {
index"0"
type"mixer"
no_pm "true"
event_type "1"
event_flags "15"
subseq "10"
data [
"codec1_out mo num_desc"
"codec1_out mo_size_desc"
"codec1_out mo"
]
mixer [
"media0_in mi Switch"
"dmic01_hifi_in mi Switch"
"codec0_in mi Switch"
]
}
SectionWidget."codec1_out cpr 5" {
index"0"
type"pga"
no_pm "true"
event_type "4"
data [
"codec1_out cpr 5 num_desc"
"codec1_out cpr 5_size_desc"
"codec1_out cpr 5"
]
}
SectionWidget."codec1_out" {
index"0"
type"aif_out"
no_pm "true"
}
SectionWidget."hdmi1_pt_out cpr 6" {
index"0"
type"mixer"
no_pm "true"
event_type "3"
event_flags "9"
data [
"hdmi1_pt_out cpr 6 num_desc"
"hdmi1_pt_out cpr 6_size_desc"
"hdmi1_pt_out cpr 6"
]
}
SectionWidget."hdmi1_pt_out cpr 7" {
index"0"
type"pga"
no_pm "true"
event_type "4"
data [
"hdmi1_pt_out cpr 7 num_desc"
"hdmi1_pt_out cpr 7_size_desc"
"hdmi1_pt_out cpr 7"
]
}
SectionWidget."iDisp1_out" {
index"0"
type"aif_out"
no_pm "true"
}
SectionWidget."hdmi2_pt_out cpr 8" {
index"0"
type"mixer"
no_pm "true"
event_type "3"
event_flags "9"
data [
"hdmi2_pt_out cpr 8 num_desc"
"hdmi2_pt_out cpr 8_size_desc"
"hdmi2_pt_out cpr 8"
]
}
SectionWidget."hdmi2_pt_out cpr 9" {
index"0"
type"pga"
no_pm "true"
event_type "4"
data [
"hdmi2_pt_out cpr 9 num_desc"
"hdmi2_pt_out cpr 9_size_desc"
"hdmi2_pt_out cpr 9"
]
}
SectionWidget."iDisp2_out" {
index"0"
type"aif_out"
no_pm "true"
}
SectionWidget."hdmi3_pt_out cpr 10" {
index"0"
type"mixer"
no_pm "true"
event_type "3"
event_flags "9"
data [
"hdmi3_pt_out cpr 10 num_desc"
"hdmi3_pt_out cpr 10_size_desc"
"hdmi3_pt_out cpr 10"
]
}
SectionWidget."hdmi3_pt_out cpr 11" {
index"0"
type"pga"
no_pm "true"
event_type "4"
data [
"hdmi3_pt_out cpr 11 num_desc"
"hdmi3_pt_out cpr 11_size_desc"
"hdmi3_pt_out cpr 11"
]
}
SectionWidget."iDisp3_out" {
index"0"
type"aif_out"
no_pm "true"
}
SectionWidget."mch_cap_in cpr 12" {
index"0"
type"mixer"
no_pm "true"
event_type "3"
event_flags "9"
data [
"mch_cap_in cpr 12 num_desc"
"mch_cap_in cpr 12_size_desc"
"mch_cap_in cpr 12"
]
}
SectionWidget."mch_cap_in cpr 13" {
index"0"
type"pga"
no_pm "true"
event_type "4"
data [
"mch_cap_in cpr 13 num_desc"
"mch_cap_in cpr 13_size_desc"
"mch_cap_in cpr 13"
]
}
SectionManifest."lib_data" {
data [
"lib_data num_desc"
"lib_data_size_desc"
"lib_data"
]
}
SectionGraph."Pipeline 1 Graph" {
index"0"
lines [
"media0_in mi, , media0_in cpr 0"
"media0_in cpr 0, , System Playback"
"codec0_in mi, , codec0_in cpr 1"
"codec0_in cpr 1, , codec0_in"
"codec0_out mo, media0_in mi Switch, media0_in mi"
"codec0_out mo, dmic01_hifi_in mi Switch, dmic01_hifi_in mi"
"codec0_out mo, codec0_in mi Switch, codec0_in mi"
"codec0_out cpr 2, , codec0_out mo"
"codec0_out, , codec0_out cpr 2"
"media0_out mo, media0_in mi Switch, media0_in mi"
"media0_out mo, dmic01_hifi_in mi Switch, dmic01_hifi_in mi"
"media0_out mo, codec0_in mi Switch, codec0_in mi"
"media0_out cpr 3, , media0_out mo"
"System Capture, , media0_out cpr 3"
"dmic01_hifi_in mi, , dmic01_hifi_in cpr 4"
"dmic01_hifi_in cpr 4, , dmic01_hifi"
"codec1_out mo, media0_in mi Switch, media0_in mi"
"codec1_out mo, dmic01_hifi_in mi Switch, dmic01_hifi_in mi"
"codec1_out mo, codec0_in mi Switch, codec0_in mi"
"codec1_out cpr 5, , codec1_out mo"
"codec1_out, , codec1_out cpr 5"
"hdmi1_pt_out cpr 7, , hdmi1_pt_out cpr 6"
"hdmi1_pt_out cpr 6, , HDMI1 Playback"
"iDisp1_out, , hdmi1_pt_out cpr 7"
"hdmi2_pt_out cpr 9, , hdmi2_pt_out cpr 8"
"hdmi2_pt_out cpr 8, , HDMI2 Playback"
"iDisp2_out, , hdmi2_pt_out cpr 9"
"hdmi3_pt_out cpr 11, , hdmi3_pt_out cpr 10"
"hdmi3_pt_out cpr 10, , HDMI3 Playback"
"iDisp3_out, , hdmi3_pt_out cpr 11"
"mch_cap_in cpr 13, , mch_cap_in cpr 12"
"DMIC Capture, , mch_cap_in cpr 13"
"mch_cap_in cpr 12, , dmic01_hifi"
]
}
Raw
usr_share_alsa_topology_sklrt286_skl_i2s.conf
SectionVendorTokens."skl_tokens" {
SKL_TKN_UUID "1"
SKL_TKN_U8_NUM_BLOCKS "2"
SKL_TKN_U8_BLOCK_TYPE "3"
SKL_TKN_U8_IN_PIN_TYPE "4"
SKL_TKN_U8_OUT_PIN_TYPE "5"
SKL_TKN_U8_DYN_IN_PIN "6"
SKL_TKN_U8_DYN_OUT_PIN "7"
SKL_TKN_U8_IN_QUEUE_COUNT "8"
SKL_TKN_U8_OUT_QUEUE_COUNT "9"
SKL_TKN_U8_TIME_SLOT "10"
SKL_TKN_U8_CORE_ID "11"
SKL_TKN_U8_MODULE_TYPE "12"
SKL_TKN_U8_CONN_TYPE "13"
SKL_TKN_U8_DEV_TYPE "14"
SKL_TKN_U8_HW_CONN_TYPE "15"
SKL_TKN_U16_MOD_INST_ID "16"
SKL_TKN_U16_BLOCK_SIZE "17"
SKL_TKN_U32_MAX_MCPS "18"
SKL_TKN_U32_MEM_PAGES "19"
SKL_TKN_U32_OBS "20"
SKL_TKN_U32_IBS "21"
SKL_TKN_U32_VBUS_ID "22"
SKL_TKN_U32_PARAMS_FIXUP "23"
SKL_TKN_U32_CONVERTER "24"
SKL_TKN_U32_PIPE_ID "25"
SKL_TKN_U32_PIPE_CONN_TYPE "26"
SKL_TKN_U32_PIPE_PRIORITY "27"
SKL_TKN_U32_PIPE_MEM_PGS "28"
SKL_TKN_U32_DIR_PIN_COUNT "29"
SKL_TKN_U32_FMT_CH "30"
SKL_TKN_U32_FMT_FREQ "31"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "33"
SKL_TKN_U32_FMT_CH_CONFIG "34"
SKL_TKN_U32_FMT_INTERLEAVE "35"
SKL_TKN_U32_FMT_SAMPLE_TYPE "36"
SKL_TKN_U32_FMT_CH_MAP "37"
SKL_TKN_U32_PIN_MOD_ID "38"
SKL_TKN_U32_PIN_INST_ID "39"
SKL_TKN_U32_MOD_SET_PARAMS "40"
SKL_TKN_U32_MOD_PARAM_ID "41"
SKL_TKN_U32_CAPS_SET_PARAMS "42"
SKL_TKN_U32_CAPS_PARAMS_ID "43"
SKL_TKN_U32_CAPS_SIZE "44"
}
SectionVendorTuples."media0_in cpr 0 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."media0_in cpr 0_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "508"
}
}
SectionVendorTuples."media0_in cpr 0" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "1"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "5"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "0"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "1"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."media0_in mi num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."media0_in mi_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "412"
}
}
SectionVendorTuples."media0_in mi" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "178, 110, 101, 57, 113, 59,
73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "1"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "0"
SKL_TKN_U8_CONN_TYPE "0"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "6"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "0"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "1"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."media0_out mo num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."media0_out mo_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "1084"
}
}
SectionVendorTuples."media0_out mo" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "90, 80, 86, 60, 215, 36,
143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "8"
SKL_TKN_U8_OUT_QUEUE_COUNT "1"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "0"
SKL_TKN_U8_CONN_TYPE "0"
SKL_TKN_U8_HW_CONN_TYPE "2"
SKL_TKN_U8_DEV_TYPE "6"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "2"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "2"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "16"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_2" {
SKL_TKN_U32_DIR_PIN_COUNT "32"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_3" {
SKL_TKN_U32_DIR_PIN_COUNT "48"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_4" {
SKL_TKN_U32_DIR_PIN_COUNT "64"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_5" {
SKL_TKN_U32_DIR_PIN_COUNT "80"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_6" {
SKL_TKN_U32_DIR_PIN_COUNT "96"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_7" {
SKL_TKN_U32_DIR_PIN_COUNT "112"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "16"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_2" {
SKL_TKN_U32_DIR_PIN_COUNT "32"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_3" {
SKL_TKN_U32_DIR_PIN_COUNT "48"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_4" {
SKL_TKN_U32_DIR_PIN_COUNT "64"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_5" {
SKL_TKN_U32_DIR_PIN_COUNT "80"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_6" {
SKL_TKN_U32_DIR_PIN_COUNT "96"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_7" {
SKL_TKN_U32_DIR_PIN_COUNT "112"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."media0_out cpr 6 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."media0_out cpr 6_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "508"
}
}
SectionVendorTuples."media0_out cpr 6" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "0"
SKL_TKN_U8_HW_CONN_TYPE "2"
SKL_TKN_U8_DEV_TYPE "5"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "6"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "2"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."codec0_out mo num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."codec0_out mo_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "1084"
}
}
SectionVendorTuples."codec0_out mo" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "90, 80, 86, 60, 215, 36,
143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "8"
SKL_TKN_U8_OUT_QUEUE_COUNT "1"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "0"
SKL_TKN_U8_CONN_TYPE "0"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "6"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "0"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "3"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "4"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "16"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_2" {
SKL_TKN_U32_DIR_PIN_COUNT "32"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_3" {
SKL_TKN_U32_DIR_PIN_COUNT "48"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_4" {
SKL_TKN_U32_DIR_PIN_COUNT "64"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_5" {
SKL_TKN_U32_DIR_PIN_COUNT "80"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_6" {
SKL_TKN_U32_DIR_PIN_COUNT "96"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_7" {
SKL_TKN_U32_DIR_PIN_COUNT "112"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "16"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_2" {
SKL_TKN_U32_DIR_PIN_COUNT "32"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_3" {
SKL_TKN_U32_DIR_PIN_COUNT "48"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_4" {
SKL_TKN_U32_DIR_PIN_COUNT "64"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_5" {
SKL_TKN_U32_DIR_PIN_COUNT "80"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_6" {
SKL_TKN_U32_DIR_PIN_COUNT "96"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_7" {
SKL_TKN_U32_DIR_PIN_COUNT "112"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."codec0_out cpr 4 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."codec0_out cpr 4_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "508"
}
}
SectionVendorTuples."codec0_out cpr 4" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "2"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "2"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "4"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0x0"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "3"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "4"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."codec1_out mo num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."codec1_out mo_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "1084"
}
}
SectionVendorTuples."codec1_out mo" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "90, 80, 86, 60, 215, 36,
143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "8"
SKL_TKN_U8_OUT_QUEUE_COUNT "1"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "0"
SKL_TKN_U8_CONN_TYPE "0"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "6"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "1"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "4"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "16"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_2" {
SKL_TKN_U32_DIR_PIN_COUNT "32"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_3" {
SKL_TKN_U32_DIR_PIN_COUNT "48"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_4" {
SKL_TKN_U32_DIR_PIN_COUNT "64"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_5" {
SKL_TKN_U32_DIR_PIN_COUNT "80"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_6" {
SKL_TKN_U32_DIR_PIN_COUNT "96"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_fmt_7" {
SKL_TKN_U32_DIR_PIN_COUNT "112"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "16"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_2" {
SKL_TKN_U32_DIR_PIN_COUNT "32"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_3" {
SKL_TKN_U32_DIR_PIN_COUNT "48"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_4" {
SKL_TKN_U32_DIR_PIN_COUNT "64"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_5" {
SKL_TKN_U32_DIR_PIN_COUNT "80"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_6" {
SKL_TKN_U32_DIR_PIN_COUNT "96"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.in_pin_7" {
SKL_TKN_U32_DIR_PIN_COUNT "112"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."codec1_out cpr 5 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."codec1_out cpr 5_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "508"
}
}
SectionVendorTuples."codec1_out cpr 5" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "2"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "2"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "2"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "5"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0x0"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "4"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."codec0_in cpr 1 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."codec0_in cpr 1_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "508"
}
}
SectionVendorTuples."codec0_in cpr 1" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "2"
SKL_TKN_U8_HW_CONN_TYPE "2"
SKL_TKN_U8_DEV_TYPE "2"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "1"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0x0"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "5"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."codec0_in mi num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."codec0_in mi_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "412"
}
}
SectionVendorTuples."codec0_in mi" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "178, 110, 101, 57, 113, 59,
73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "1"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "0"
SKL_TKN_U8_CONN_TYPE "0"
SKL_TKN_U8_HW_CONN_TYPE "2"
SKL_TKN_U8_DEV_TYPE "6"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "1"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "5"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."dmic01_hifi_in cpr 3 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."dmic01_hifi_in cpr 3_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "508"
}
}
SectionVendorTuples."dmic01_hifi_in cpr 3" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "2"
SKL_TKN_U8_HW_CONN_TYPE "2"
SKL_TKN_U8_DEV_TYPE "1"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "3"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0x0"
SKL_TKN_U32_PARAMS_FIXUP "4"
SKL_TKN_U32_CONVERTER "4"
SKL_TKN_U32_PIPE_ID "6"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."dmic01_hifi_in mi num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."dmic01_hifi_in mi_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "412"
}
}
SectionVendorTuples."dmic01_hifi_in mi" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "178, 110, 101, 57, 113, 59,
73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "1"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "0"
SKL_TKN_U8_CONN_TYPE "0"
SKL_TKN_U8_HW_CONN_TYPE "2"
SKL_TKN_U8_DEV_TYPE "6"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "3"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "0"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "6"
SKL_TKN_U32_PIPE_CONN_TYPE "2"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."hdmi1_pt_out cpr 7 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."hdmi1_pt_out cpr 7_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "508"
}
}
SectionVendorTuples."hdmi1_pt_out cpr 7" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "1"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "5"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "7"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "7"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "7"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."hdmi1_pt_out cpr 8 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."hdmi1_pt_out cpr 8_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "508"
}
}
SectionVendorTuples."hdmi1_pt_out cpr 8" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "1"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "4"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "8"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "7"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "7"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."hdmi2_pt_out cpr 9 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."hdmi2_pt_out cpr 9_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "508"
}
}
SectionVendorTuples."hdmi2_pt_out cpr 9" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "1"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "5"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "9"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "7"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "8"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."hdmi2_pt_out cpr 10 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."hdmi2_pt_out cpr 10_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "508"
}
}
SectionVendorTuples."hdmi2_pt_out cpr 10" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "1"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "4"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "10"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "7"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "8"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."hdmi3_pt_out cpr 11 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."hdmi3_pt_out cpr 11_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "508"
}
}
SectionVendorTuples."hdmi3_pt_out cpr 11" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "1"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "5"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "11"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "7"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "9"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionVendorTuples."hdmi3_pt_out cpr 12 num_desc" {
tokens "skl_tokens"
tuples."byte.u8_num_blocks" {
SKL_TKN_U8_NUM_BLOCKS "1"
}
}
SectionVendorTuples."hdmi3_pt_out cpr 12_size_desc" {
tokens "skl_tokens"
tuples."byte.u8_block_type"{
SKL_TKN_U8_BLOCK_TYPE "0"
}
tuples."short.u16_size_desc"{
SKL_TKN_U16_BLOCK_SIZE "508"
}
}
SectionVendorTuples."hdmi3_pt_out cpr 12" {
tokens "skl_tokens"
tuples."uuid" {
SKL_TKN_UUID "131, 12, 160, 155, 18, 202,
131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
}
tuples."byte.u8_data" {
SKL_TKN_U8_IN_PIN_TYPE "0"
SKL_TKN_U8_OUT_PIN_TYPE "0"
SKL_TKN_U8_IN_QUEUE_COUNT "1"
SKL_TKN_U8_OUT_QUEUE_COUNT "2"
SKL_TKN_U8_DYN_IN_PIN "1"
SKL_TKN_U8_DYN_OUT_PIN "1"
SKL_TKN_U8_TIME_SLOT "0"
SKL_TKN_U8_CORE_ID "0"
SKL_TKN_U8_MODULE_TYPE "1"
SKL_TKN_U8_CONN_TYPE "1"
SKL_TKN_U8_HW_CONN_TYPE "1"
SKL_TKN_U8_DEV_TYPE "4"
}
tuples."short.u16_data" {
SKL_TKN_U16_MOD_INST_ID "12"
}
tuples."word.u32_data" {
SKL_TKN_U32_MAX_MCPS "100000"
SKL_TKN_U32_MEM_PAGES "1"
SKL_TKN_U32_OBS "384"
SKL_TKN_U32_IBS "384"
SKL_TKN_U32_VBUS_ID "0xffffffff"
SKL_TKN_U32_PARAMS_FIXUP "7"
SKL_TKN_U32_CONVERTER "0"
SKL_TKN_U32_PIPE_ID "9"
SKL_TKN_U32_PIPE_CONN_TYPE "1"
SKL_TKN_U32_PIPE_PRIORITY "0"
SKL_TKN_U32_PIPE_MEM_PGS "2"
SKL_TKN_U32_CAPS_SIZE "0"
}
tuples."word.in_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.out_fmt_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_FMT_CH "2"
SKL_TKN_U32_FMT_FREQ "48000"
SKL_TKN_U32_FMT_BIT_DEPTH "32"
SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
SKL_TKN_U32_FMT_INTERLEAVE "0"
SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
SKL_TKN_U32_FMT_CH_MAP "0xffffff10"
SKL_TKN_U32_FMT_CH_CONFIG "0x1"
}
tuples."word.in_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "0"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_0" {
SKL_TKN_U32_DIR_PIN_COUNT "1"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
tuples."word.out_pin_1" {
SKL_TKN_U32_DIR_PIN_COUNT "17"
SKL_TKN_U32_PIN_MOD_ID "0"
SKL_TKN_U32_PIN_INST_ID "0"
}
}
SectionData."media0_in cpr 0 num_desc" {
tuples "media0_in cpr 0 num_desc"
}
SectionData."media0_in cpr 0_size_desc" {
tuples "media0_in cpr 0_size_desc"
}
SectionData."media0_in cpr 0" {
tuples "media0_in cpr 0"
}
SectionData."media0_in mi num_desc" {
tuples "media0_in mi num_desc"
}
SectionData."media0_in mi_size_desc" {
tuples "media0_in mi_size_desc"
}
SectionData."media0_in mi" {
tuples "media0_in mi"
}
SectionData."media0_out mo num_desc" {
tuples "media0_out mo num_desc"
}
SectionData."media0_out mo_size_desc" {
tuples "media0_out mo_size_desc"
}
SectionData."media0_out mo" {
tuples "media0_out mo"
}
SectionData."media0_out cpr 6 num_desc" {
tuples "media0_out cpr 6 num_desc"
}
SectionData."media0_out cpr 6_size_desc" {
tuples "media0_out cpr 6_size_desc"
}
SectionData."media0_out cpr 6" {
tuples "media0_out cpr 6"
}
SectionData."codec0_out mo num_desc" {
tuples "codec0_out mo num_desc"
}
SectionData."codec0_out mo_size_desc" {
tuples "codec0_out mo_size_desc"
}
SectionData."codec0_out mo" {
tuples "codec0_out mo"
}
SectionData."codec0_out cpr 4 num_desc" {
tuples "codec0_out cpr 4 num_desc"
}
SectionData."codec0_out cpr 4_size_desc" {
tuples "codec0_out cpr 4_size_desc"
}
SectionData."codec0_out cpr 4" {
tuples "codec0_out cpr 4"
}
SectionData."codec1_out mo num_desc" {
tuples "codec1_out mo num_desc"
}
SectionData."codec1_out mo_size_desc" {
tuples "codec1_out mo_size_desc"
}
SectionData."codec1_out mo" {
tuples "codec1_out mo"
}
SectionData."codec1_out cpr 5 num_desc" {
tuples "codec1_out cpr 5 num_desc"
}
SectionData."codec1_out cpr 5_size_desc" {
tuples "codec1_out cpr 5_size_desc"
}
SectionData."codec1_out cpr 5" {
tuples "codec1_out cpr 5"
}
SectionData."codec0_in cpr 1 num_desc" {
tuples "codec0_in cpr 1 num_desc"
}
SectionData."codec0_in cpr 1_size_desc" {
tuples "codec0_in cpr 1_size_desc"
}
SectionData."codec0_in cpr 1" {
tuples "codec0_in cpr 1"
}
SectionData."codec0_in mi num_desc" {
tuples "codec0_in mi num_desc"
}
SectionData."codec0_in mi_size_desc" {
tuples "codec0_in mi_size_desc"
}
SectionData."codec0_in mi" {
tuples "codec0_in mi"
}
SectionData."dmic01_hifi_in cpr 3 num_desc" {
tuples "dmic01_hifi_in cpr 3 num_desc"
}
SectionData."dmic01_hifi_in cpr 3_size_desc" {
tuples "dmic01_hifi_in cpr 3_size_desc"
}
SectionData."dmic01_hifi_in cpr 3" {
tuples "dmic01_hifi_in cpr 3"
}
SectionData."dmic01_hifi_in mi num_desc" {
tuples "dmic01_hifi_in mi num_desc"
}
SectionData."dmic01_hifi_in mi_size_desc" {
tuples "dmic01_hifi_in mi_size_desc"
}
SectionData."dmic01_hifi_in mi" {
tuples "dmic01_hifi_in mi"
}
SectionData."hdmi1_pt_out cpr 7 num_desc" {
tuples "hdmi1_pt_out cpr 7 num_desc"
}
SectionData."hdmi1_pt_out cpr 7_size_desc" {
tuples "hdmi1_pt_out cpr 7_size_desc"
}
SectionData."hdmi1_pt_out cpr 7" {
tuples "hdmi1_pt_out cpr 7"
}
SectionData."hdmi1_pt_out cpr 8 num_desc" {
tuples "hdmi1_pt_out cpr 8 num_desc"
}
SectionData."hdmi1_pt_out cpr 8_size_desc" {
tuples "hdmi1_pt_out cpr 8_size_desc"
}
SectionData."hdmi1_pt_out cpr 8" {
tuples "hdmi1_pt_out cpr 8"
}
SectionData."hdmi2_pt_out cpr 9 num_desc" {
tuples "hdmi2_pt_out cpr 9 num_desc"
}
SectionData."hdmi2_pt_out cpr 9_size_desc" {
tuples "hdmi2_pt_out cpr 9_size_desc"
}
SectionData."hdmi2_pt_out cpr 9" {
tuples "hdmi2_pt_out cpr 9"
}
SectionData."hdmi2_pt_out cpr 10 num_desc" {
tuples "hdmi2_pt_out cpr 10 num_desc"
}
SectionData."hdmi2_pt_out cpr 10_size_desc" {
tuples "hdmi2_pt_out cpr 10_size_desc"
}
SectionData."hdmi2_pt_out cpr 10" {
tuples "hdmi2_pt_out cpr 10"
}
SectionData."hdmi3_pt_out cpr 11 num_desc" {
tuples "hdmi3_pt_out cpr 11 num_desc"
}
SectionData."hdmi3_pt_out cpr 11_size_desc" {
tuples "hdmi3_pt_out cpr 11_size_desc"
}
SectionData."hdmi3_pt_out cpr 11" {
tuples "hdmi3_pt_out cpr 11"
}
SectionData."hdmi3_pt_out cpr 12 num_desc" {
tuples "hdmi3_pt_out cpr 12 num_desc"
}
SectionData."hdmi3_pt_out cpr 12_size_desc" {
tuples "hdmi3_pt_out cpr 12_size_desc"
}
SectionData."hdmi3_pt_out cpr 12" {
tuples "hdmi3_pt_out cpr 12"
}
SectionControlMixer."media0_in mi Switch" {
index"0"
invert "false"
max "1"
min"0"
no_pm "true"
channel."fl" {
reg "-1"
shift "0"
}
channel."fr" {
reg "-1"
shift "0"
}
ops."ctl" {
get "64"
put "64"
info "64"
}
}
SectionControlMixer."codec0_in mi Switch" {
index"0"
invert "false"
max "1"
min"0"
no_pm "true"
channel."fl" {
reg "-1"
shift "0"
}
channel."fr" {
reg "-1"
shift "0"
}
ops."ctl" {
get "64"
put "64"
info "64"
}
}
SectionControlMixer."dmic01_hifi_in mi Switch" {
index"0"
invert "false"
max "1"
min"0"
no_pm "true"
channel."fl" {
reg "-1"
shift "0"
}
channel."fr" {
reg "-1"
shift "0"
}
ops."ctl" {
get "64"
put "64"
info "64"
}
}
SectionWidget."media0_in cpr 0" {
index"0"
type"mixer"
no_pm "true"
event_type "3"
event_flags "9"
data [
"media0_in cpr 0 num_desc"
"media0_in cpr 0_size_desc"
"media0_in cpr 0"
]
}
SectionWidget."media0_in mi" {
index"0"
type"pga"
no_pm "true"
event_type "4"
event_flags "9"
subseq "10"
data [
"media0_in mi num_desc"
"media0_in mi_size_desc"
"media0_in mi"
]
}
SectionWidget."media0_out mo" {
index"0"
type"mixer"
no_pm "true"
event_type "1"
event_flags "15"
subseq "10"
data [
"media0_out mo num_desc"
"media0_out mo_size_desc"
"media0_out mo"
]
mixer [
"media0_in mi Switch"
"codec0_in mi Switch"
"dmic01_hifi_in mi Switch"
]
}
SectionWidget."media0_out cpr 6" {
index"0"
type"pga"
no_pm "true"
event_type "4"
data [
"media0_out cpr 6 num_desc"
"media0_out cpr 6_size_desc"
"media0_out cpr 6"
]
}
SectionWidget."codec0_out mo" {
index"0"
type"mixer"
no_pm "true"
event_type "1"
event_flags "15"
subseq "10"
data [
"codec0_out mo num_desc"
"codec0_out mo_size_desc"
"codec0_out mo"
]
mixer [
"media0_in mi Switch"
"codec0_in mi Switch"
"dmic01_hifi_in mi Switch"
]
}
SectionWidget."codec0_out cpr 4" {
index"0"
type"pga"
no_pm "true"
event_type "4"
data [
"codec0_out cpr 4 num_desc"
"codec0_out cpr 4_size_desc"
"codec0_out cpr 4"
]
}
SectionWidget."codec0_out" {
index"0"
type"aif_out"
no_pm "true"
}
SectionWidget."codec1_out mo" {
index"0"
type"mixer"
no_pm "true"
event_type "1"
event_flags "15"
subseq "10"
data [
"codec1_out mo num_desc"
"codec1_out mo_size_desc"
"codec1_out mo"
]
mixer [
"media0_in mi Switch"
"codec0_in mi Switch"
"dmic01_hifi_in mi Switch"
]
}
SectionWidget."codec1_out cpr 5" {
index"0"
type"pga"
no_pm "true"
event_type "4"
data [
"codec1_out cpr 5 num_desc"
"codec1_out cpr 5_size_desc"
"codec1_out cpr 5"
]
}
SectionWidget."codec1_out" {
index"0"
type"aif_out"
no_pm "true"
}
SectionWidget."codec0_in cpr 1" {
index"0"
type"mixer"
no_pm "true"
event_type "3"
event_flags "9"
data [
"codec0_in cpr 1 num_desc"
"codec0_in cpr 1_size_desc"
"codec0_in cpr 1"
]
}
SectionWidget."codec0_in mi" {
index"0"
type"pga"
no_pm "true"
event_type "4"
event_flags "9"
subseq "10"
data [
"codec0_in mi num_desc"
"codec0_in mi_size_desc"
"codec0_in mi"
]
}
SectionWidget."codec0_in" {
index"0"
type"aif_in"
no_pm "true"
}
SectionWidget."dmic01_hifi_in cpr 3" {
index"0"
type"mixer"
no_pm "true"
event_type "3"
event_flags "9"
data [
"dmic01_hifi_in cpr 3 num_desc"
"dmic01_hifi_in cpr 3_size_desc"
"dmic01_hifi_in cpr 3"
]
}
SectionWidget."dmic01_hifi_in mi" {
index"0"
type"pga"
no_pm "true"
event_type "4"
event_flags "9"
subseq "10"
data [
"dmic01_hifi_in mi num_desc"
"dmic01_hifi_in mi_size_desc"
"dmic01_hifi_in mi"
]
}
SectionWidget."dmic01_hifi" {
index"0"
type"aif_in"
no_pm "true"
}
SectionWidget."hdmi1_pt_out cpr 7" {
index"0"
type"mixer"
no_pm "true"
event_type "3"
event_flags "9"
data [
"hdmi1_pt_out cpr 7 num_desc"
"hdmi1_pt_out cpr 7_size_desc"
"hdmi1_pt_out cpr 7"
]
}
SectionWidget."hdmi1_pt_out cpr 8" {
index"0"
type"pga"
no_pm "true"
event_type "4"
data [
"hdmi1_pt_out cpr 8 num_desc"
"hdmi1_pt_out cpr 8_size_desc"
"hdmi1_pt_out cpr 8"
]
}
SectionWidget."iDisp1_out" {
index"0"
type"aif_out"
no_pm "true"
}
SectionWidget."hdmi2_pt_out cpr 9" {
index"0"
type"mixer"
no_pm "true"
event_type "3"
event_flags "9"
data [
"hdmi2_pt_out cpr 9 num_desc"
"hdmi2_pt_out cpr 9_size_desc"
"hdmi2_pt_out cpr 9"
]
}
SectionWidget."hdmi2_pt_out cpr 10" {
index"0"
type"pga"
no_pm "true"
event_type "4"
data [
"hdmi2_pt_out cpr 10 num_desc"
"hdmi2_pt_out cpr 10_size_desc"
"hdmi2_pt_out cpr 10"
]
}
SectionWidget."iDisp2_out" {
index"0"
type"aif_out"
no_pm "true"
}
SectionWidget."hdmi3_pt_out cpr 11" {
index"0"
type"mixer"
no_pm "true"
event_type "3"
event_flags "9"
data [
"hdmi3_pt_out cpr 11 num_desc"
"hdmi3_pt_out cpr 11_size_desc"
"hdmi3_pt_out cpr 11"
]
}
SectionWidget."hdmi3_pt_out cpr 12" {
index"0"
type"pga"
no_pm "true"
event_type "4"
data [
"hdmi3_pt_out cpr 12 num_desc"
"hdmi3_pt_out cpr 12_size_desc"
"hdmi3_pt_out cpr 12"
]
}
SectionGraph."Pipeline 1 Graph" {
index"0"
lines [
"media0_in mi, , media0_in cpr 0"
"media0_in cpr 0, , System Playback"
"media0_out mo, media0_in mi Switch, media0_in mi"
"media0_out mo, codec0_in mi Switch, codec0_in mi"
"media0_out mo, dmic01_hifi_in mi Switch, dmic01_hifi_in mi"
"media0_out cpr 6, , media0_out mo"
"System Capture, , media0_out cpr 6"
"codec0_out mo, media0_in mi Switch, media0_in mi"
"codec0_out mo, codec0_in mi Switch, codec0_in mi"
"codec0_out mo, dmic01_hifi_in mi Switch, dmic01_hifi_in mi"
"codec0_out cpr 4, , codec0_out mo"
"codec0_out, , codec0_out cpr 4"
"codec1_out mo, media0_in mi Switch, media0_in mi"
"codec1_out mo, codec0_in mi Switch, codec0_in mi"
"codec1_out mo, dmic01_hifi_in mi Switch, dmic01_hifi_in mi"
"codec1_out cpr 5, , codec1_out mo"
"codec1_out, , codec1_out cpr 5"
"codec0_in mi, , codec0_in cpr 1"
"codec0_in cpr 1, , codec0_in"
"dmic01_hifi_in mi, , dmic01_hifi_in cpr 3"
"dmic01_hifi_in cpr 3, , dmic01_hifi"
"hdmi1_pt_out cpr 8, , hdmi1_pt_out cpr 7"
"hdmi1_pt_out cpr 7, , HDMI1 Playback"
"iDisp1_out, , hdmi1_pt_out cpr 8"
"hdmi2_pt_out cpr 10, , hdmi2_pt_out cpr 9"
"hdmi2_pt_out cpr 9, , HDMI2 Playback"
"iDisp2_out, , hdmi2_pt_out cpr 10"
"hdmi3_pt_out cpr 12, , hdmi3_pt_out cpr 11"
"hdmi3_pt_out cpr 11, , HDMI3 Playback"
"iDisp1_out, , hdmi3_pt_out cpr 12"
]
}
Raw
usr_share_alsa_ucm_kbl_r5514_5663_max_HiFi.conf
SectionVerb {
Value {
OutputDspName "speaker_eq"
FullySpecifiedUCM "1"
}
EnableSequence [
cdev "hw:kblr55145663max"
cset "name='codec1_out mo hs_pb_in mi Switch' off"
cset "name='Left DAI Sel Mux' Left"
cset "name='Right DAI Sel Mux' Right"
cset "name='Left Speaker Volume' 5"
cset "name='Right Speaker Volume' 5"
cset "name='Left Digital Volume' 61"
cset "name='Right Digital Volume' 61"
cset "name='Left Spk Switch' on"
cset "name='Right Spk Switch' on"
cset "name='Left Boost Output Voltage' 28"
cset "name='Right Boost Output Voltage' 28"
cset "name='Left Current Limit' 20"
cset "name='Right Current Limit' 20"
cset "name='Headphone Playback Volume' 16"
cset "name='Headset Mic Switch' off"
cset "name='DMIC Switch' on"
cset "name='STO1 ADC MIXL ADC1 Switch' on"
cset "name='Pin 5 Mux' 1"
cset "name='Pin 6 Mux' 2"
cset "name='Pin 7 Mux' 3"
cset "name='ADC1 Capture Volume' 55"
cset "name='ADC2 Capture Volume' 55"
cset "name='DAC L Mux' STO DAC MIXL"
cset "name='DAC R Mux' STO DAC MIXR"
cset "name='STO1 DAC MIXL DAC L Switch' on"
cset "name='STO1 DAC MIXR DAC R Switch' on"
cset-tlv "name='spk_pb_in dsm 0 dsm_params params' /opt/google/dsm/dsmparam.bin"
]
DisableSequence [
]
}
SectionDevice."Speaker".0 {
Value {
PlaybackPCM "hw:kblr55145663max,0"
}
EnableSequence [
cdev "hw:kblr55145663max"
]
DisableSequence [
cdev "hw:kblr55145663max"
]
}
SectionDevice."Headphone".0 {
Value {
PlaybackPCM "hw:kblr55145663max,2"
MixerName "DAC"
JackType "gpio"
JackName "kbl_r5514_5663_max Headset Jack"
OutputDspName ""
}
EnableSequence [
cdev "hw:kblr55145663max"
cset "name='codec1_out mo hs_pb_in mi Switch' on"
cset "name='Headphone Jack Switch' on"
]
DisableSequence [
cdev "hw:kblr55145663max"
cset "name='codec1_out mo hs_pb_in mi Switch' off"
cset "name='Headphone Jack Switch' off"
]
}
SectionDevice."Internal Mic".0 {
Value {
CapturePCM "hw:kblr55145663max,4"
CaptureChannelMap "2 3 0 1 -1 -1 -1 -1 -1 -1 -1"
MixerName "ADC2"
DefaultNodeGain "700"
PreemptHotword "1"
}
EnableSequence [
cdev "hw:kblr55145663max"
cset "name='Sto1 ADC MIXL DMIC Switch' on"
cset "name='Sto1 ADC MIXR DMIC Switch' on"
cset "name='Sto2 ADC MIXL DMIC Switch' on"
cset "name='Sto2 ADC MIXR DMIC Switch' on"
]
DisableSequence [
cdev "hw:kblr55145663max"
cset "name='Sto1 ADC MIXL DMIC Switch' off"
cset "name='Sto1 ADC MIXR DMIC Switch' off"
cset "name='Sto2 ADC MIXL DMIC Switch' off"
cset "name='Sto2 ADC MIXR DMIC Switch' off"
]
}
SectionDevice."Mic".0 {
Value {
CapturePCM "hw:kblr55145663max,1"
JackType "gpio"
JackName "kbl_r5514_5663_max Headset Jack"
}
EnableSequence [
cdev "hw:kblr55145663max"
cset "name='Headset Mic Switch' on"
]
DisableSequence [
cdev "hw:kblr55145663max"
cset "name='Headset Mic Switch' off"
]
}
SectionDevice."HDMI1".0 {
Value {
PlaybackPCM "hw:kblr55145663max,6"
JackName "kbl_r5514_5663_max HDMI/DP, pcm=6 Jack"
JackType "gpio"
OutputDspName ""
}
EnableSequence [
]
DisableSequence [
]
}
SectionDevice."HDMI2".0 {
Value {
PlaybackPCM "hw:kblr55145663max,7"
JackName "kbl_r5514_5663_max HDMI/DP, pcm=7 Jack"
JackType "gpio"
OutputDspName ""
}
EnableSequence [
]
DisableSequence [
]
}
SectionDevice."Wake on Voice".0 {
Value {
CapturePCM "hw:kblr55145663max,5"
}
EnableSequence [
cdev "hw:kblr55145663max"
cset "name='DMIC Switch' off"
cset "name='DSP Voice Wake Up' off"
cset "name='DSP Voice Wake Up' on"
]
DisableSequence [
cdev "hw:kblr55145663max"
cset "name='DSP Voice Wake Up' off"
cset "name='DMIC Switch' on"
]
}
SectionModifier."Hotword Model ar_eg".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/ar_eg.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model cmn_cn".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/cmn_hans_cn.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model cmn_tw".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/cmn_hant_tw.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model cs_cz".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/cs_cz.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model da_dk".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/da_dk.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model de_de".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/de_de.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model en_au".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/en_au.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model en_gb".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/en_gb.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model en_ie".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/en_ie.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model en_in".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/en_in.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model en_ph".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/en_ph.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model en_us".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/en_us.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model es_419".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/es_419.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model es_ar".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/es_ar.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model es_es".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/es_es.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model es_mx".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/es_mx.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model es_us".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/es_us.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model fa_ir".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/fa_ir.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model fi_fi".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/fi_fi.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model fil_ph".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/fil_ph.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model fr_fr".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/fr_fr.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model hi_in".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/hi_in.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model hr_hr".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/hr_hr.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model id_id".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/id_id.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model it_it".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/it_it.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model ja_jp".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/ja_jp.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model ko_kr".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/ko_kr.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model ms_my".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/ms_my.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model nb_no".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/nb_no.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model nl_nl".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/nl_nl.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model pl_pl".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/pl_pl.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model pt_br".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/pt_br.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model ro_ro".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/ro_ro.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model ru_ru".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/ru_ru.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model sv_se".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/sv_se.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model th_th".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/th_th.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model tr_tr".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/tr_tr.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model vi_vn".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/vi_vn.hwd-blob"
]
DisableSequence [
]
}
SectionModifier."Hotword Model yue_hk".0 {
EnableSequence [
cdev "hw:kblr55145663max"
cset-tlv "name='Hotword Model' /opt/google/kbl-rt5514-hotword-support/yue_hant_hk.hwd-blob"
]
DisableSequence [
]
}
Raw
usr_share_alsa_ucm_kbl_r5514_5663_max_kbl_r5514_5663_max.conf
Comment "Eve internal card"
SectionUseCase."HiFi" {
File "HiFi.conf"
Comment "Default"
}
@da-moon
Copy link

da-moon commented Sep 6, 2020

This gist is amazing, thank you . you just forgot to add Linux kernel installation in you pacstrap command i.e pacstrap /mnt base base-devel btrfs-progs openssh linux linux-firmware

@elzii
Copy link

elzii commented Mar 14, 2023

S3 link for firmware is down FYI.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment