darksylinc

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 2a4cd7d377bf..62c6934a6244 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -1215,6 +1215,33 @@ static const struct drm_prop_enum_list amdgpu_dither_enum_list[] =
 	{ AMDGPU_FMT_DITHER_ENABLE, "on" },
 };
 
+static const struct drm_prop_enum_list amdgpu_user_pixenc_list[] = {
+	{ 0, "auto" },

darksylinc

#!/bin/bash

OGRE_BRANCH_NAME="v2-1"

if test ! -d ogre-next-deps; then
	mkdir ogre-next-deps
	echo "--- Cloning ogre-next-deps ---"
	git clone --recurse-submodules --shallow-submodules https://github.com/OGRECave/ogre-next-deps || exit $?
else
	echo "--- ogre-next-deps repo detected. Cloning skipped ---"

darksylinc

// Compiling this code with:
// fxc.exe /T ps_5_0 /O0 /E main broken_min16float.hlsl
// Will result in the following:
// error X8000: D3D11 Internal Compiler Error: Invalid Bytecode: Incompatible min precision type for operand #1 of opcode #6 (counts are 1-based). Expected int or uint.
//
// Works if compiled with Od for no optimizations

#define _h( x ) min16float( ( x ) )

cbuffer PassBuffer : register( b0 )

darksylinc

What this proposal is about

• Creating a Compositor that will handle rendering and compute
• Make ordering tasks around MUCH easier
• Fixing barrier problem

What this proposal isn't

• It's not about exposing the Compositor to the user

darksylinc

#include <assert.h>
#include <stddef.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <algorithm>
#include <deque>

darksylinc

Godot Shader System Proposal

Godot 4's current shader/PSO system assumes the following:

1. Specialization Constants reduce compilation time (true) but are not free.
2. Specialization Constants are well optimized by Driver (blatantly false on Android),
3. Uniform Static branches are free. They're very cheap but I am seeing incremental improvements when removed entirely via #ifdef. Sometimes major improvements.

Godot 4 wants these assumptions to be true because they help reduce the number of shader & PSO variants, which are key to reducing compilation stutter.

darksylinc

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 30755ce4002d..3183d8306653 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -1328,6 +1328,33 @@ static const struct drm_prop_enum_list amdgpu_dither_enum_list[] = {
 	{ AMDGPU_FMT_DITHER_ENABLE, "on" },
 };
 
+static const struct drm_prop_enum_list amdgpu_user_pixenc_list[] = {
+	{ 0, "auto" },

darksylinc

From 5f25a263089447259f6a769d7f5e463c32adadfd Mon Sep 17 00:00:00 2001
From: "Matias N. Goldberg" <dark_sylinc@yahoo.com.ar>
Date: Thu, 14 Jul 2022 18:16:05 -0300
Subject: [PATCH] dark_sylinc: AMD RGB Patch 5.18.11

---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   |  35 +++
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h   |   3 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h      |   2 +
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 215 +++++++++++++++++-

darksylinc

From 6806baac51f1ac2028c49bcab216c19f26a7e92b Mon Sep 17 00:00:00 2001
From: "Matias N. Goldberg" <dark_sylinc@yahoo.com.ar>
Date: Sun, 6 Oct 2024 21:04:11 -0300
Subject: [PATCH] [amdgpu] Add "pixel_encoding" to switch between RGB & YUV
 color modes

Usage:
xrandr --output DisplayPort-1 --set "pixel encoding" rgb

Supported options are: "auto" (Default), "rgb", "ycbcr444", and

darksylinc

Back when I was studying the Double Entry (DE) system felt like "why why why?" because it felt like an overly-complicated way of performing transaction and storing financial records. But now I feel like it's something that can't be missing.

Also take in mind that Double Entry was invented 400 years before computers. However even with computers, it's still useful for its properties of guaranteeing transactions make sense.

The best way to explain it from a programmer perspective is CRC and Error Check Codes.

Imagine we had to store a value in ECC RAM, but we have to manually calculate the ECC bits.

For the sake of simplicity I'm going to deviate a bit from how real RAM works, and assume the following: