- with 0 voltage two back to back diode exist in series between drain and source. This prevent current to flow.
- When just apply voltage at the gate, this effect will push all the hole charge on the surface down to the bottom and allow all negative charge to bubble up to the surface.
- .When a sufficient number of electrons accumulate near the surface of the substrate under the gate, an n region is in effect created, connecting the source and drain regions, as indicated in Fig.5.2
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Note that n-channel MOSFET is form in a p-type subtrate. The channel is created by inverting the subtrate from p type to n-type. The induced channel is called an inversion layer
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When Vds=0V_{ds} = 0Vds=0, the voltage at every point along the channel is zero, and the voltage across the oside is uniform and equal to VGSV_{GS}VGS
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The excess of VGSV_{GS}VGS over VtV_tVt is termed override voltage
VGS−Vt=VOV V_{GS} - V_t = V_{OV} VGS−Vt=VOV -
Magnitude of electron charge in the channel
∣Q∣=Cox(WL)vOV |Q| = C_{ox} (WL) v_{OV} ∣Q∣=Cox(WL)vOV
where CoxC_{ox}Cox, called the oxide capacitance is the capacitance of the parallel-plate cappacitor(unit $\frac{F}{m^2})
Cox=ϵoxtox C_{ox} = \frac{\epsilon_{ox}}{t_{ox}} Cox=toxϵox
where ϵox\epsilon_{ox}ϵox is the permitivity of the silicon dioxide.
ϵox=3.9ϵo=3.45e−11Fm \epsilon_{ox} = 3.9\epsilon_{o} = 3.45e-11 \frac{F}{m} ϵox=3.9ϵo=3.45e−11mF
- Now we will apply small positive voltage between drain and source
current idi_did can be found from the formula
id=[(μnCox)WLvOV]vDS
i_d = [(\mu_nC_{ox}) \frac{W}{L}v_{OV}]v_{DS}
id=[(μnCox)LWvOV]vDS
Process transconducance, kn′k_n'kn′ parameter determined by the process technology used to fabricate denoted as
kn′=μnCox
k_n' = \mu_nC_{ox}
kn′=μnCox
MOSFET transconductance parameter, k_n is the product of process transconductance, kn′k_n'kn′ and the transitor ratio, WL\frac{W}{L}LW follow by and have unit as A/V^2
kn=(μnCox)WL
k_n = (\mu_nC_{ox})\frac{W}{L}
kn=(μnCox)LW
The conductance gDSg_{DS}gDS of the channel is
gDS=kn′WLvOV
g_{DS} = k_n'\frac{W}{L}v_{OV}
gDS=kn′LWvOV
Linear resistance, rDSr_{DS}rDS is defined as
rDS=1gDSrDS=1kn′WLvOV
r_{DS} = \frac{1}{g_{DS}}\\
r_{DS} = \frac{1}{k_n'\frac{W}{L}v_{OV}}
rDS=gDS1rDS=kn′LWvOV1
Note: vOV=vDS−Vtv_{OV} = v_{DS} - V_tvOV=vDS−Vt
As vDSv_{DS}vDS increase, the channel becoms more tapered and its resistance increases. Thus, the iDi_DiD and vDSv_{DS}vDS curve does not continue as a straight line. New formula is
id=kn′WL(vOV−12vDS)vDS i_d = k_n' \frac{W}{L}(v_{OV}-\frac{1}{2}v_{DS})v_{DS} id=kn′LW(vOV−21vDS)vDS
Figure below explain idi_did vs vDSv_{DS}vDS curve of difference region. red indicate region with small vDSv_{DS}vDS.
At vDS≥VOVv_{DS} \geq V_{OV}vDS≥VOV, this result in no effect on the channel shape and charge. The drain current thus saturate at the value found by setting vDS=VOVv_{DS} = V_{OV}vDS=VOV:
id=12kn′WLvOV2 i_d = \frac{1}{2}k_n' \frac{W}{L}v_{OV}^2 id=21kn′LWvOV2
- Everything is the same. Voltage sign will be flipped.
For NMOS
Table 5.1 provide compilation of condition and formula for operaition of NMOS transistor in each 3 possible region:
- cutoff
- triode
- Saturation
cutoff and triode region are useful and utilized as a switch. On the other hand, if MOSDET is tobe used to design amplifier, it must be operated in the saturated region.
As VOVV_{OV}VOV increase we have difference level of iDi_DiD vs vDSv_{DS}vDS curve as in figure 5.13 indicate.
- When MOSFET is used to design amplifier, it is operated in saturation.
- the MOSFET operates as a constant-current source where the value of the current is determined by vGSv_{GS}vGS
