| Instruction Name | Operation ID | Format | Binary |
|---|---|---|---|
| (0) noOperation | 0000 | do not anything | 0000 0000 0000 0000 |
| (1) ALU+ | 0001 | RegC <- ALU+(RegA, RegB) | 0001 xxxx xxxx xxxx |
| (2) ALU- | 0010 | RegC <- ALU-(RegA, RegB) | 0010 xxxx xxxx xxxx |
| (3) ALU* | 0011 | RegC <- ALU*(RegA, RegB) | 0011 xxxx xxxx xxxx |
| (4) ALU/ | 0100 | RegC <- ALU/(RegA, RegB) | 0100 xxxx xxxx xxxx |
| (5) Store Register | 0101 | RegC <- MBR | 0101 xxxx 0000 0000 |
| (6) Load Register | 0110 | MBR <- RegC | 0110 xxxx 0000 0000 |
| (7) Store Memory | 0111 | RAM(Memory Address) <- MBR | 0111 xxxx xxxx xxxx |
| (8) Load Memory | 1000 | MBR <- RAM(Memory Address) | 1000 xxxx xxxx xxxx |
| (9) Jump | 1001 | PCR <- RegC | 1001 xxxx 0000 0000 |
| (10) Branch Equal | 1010 | if Reg A == B, PCR <- RegC operands order are RegC, RegA, RegB |
1010 xxxx xxxx xxxx |
| (11) Branch Greater Than | 1011 | if Reg A> B, PCR <- RegC operands order are RegC, RegA, RegB |
1011 xxxx xxxx xxxx |
| (12) Register Set Value | 1100 | RegC <- immediate value operands order are RegC, imm |
1100 xxxx xxxx xxxx |
Special Purpose Registers are PCR(Program Counter Register), MAR(Memory Address Register), MBR(Memory Buffer Register), etc....