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dev-zzo/Generic_ONFI_NAND_LGA52.lib

Last active February 15, 2021 07:58
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Generic_ONFI_NAND_LGA52.lib
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Generic_ONFI_NAND_LGA52
#
DEF Generic_ONFI_NAND_LGA52 U 0 40 Y Y 1 F N
F0 "U" 0 2650 50 H V L BNN
F1 "Generic_ONFI_NAND_LGA52" 0 -100 50 H V L BNN
F2 "Memory:LGA52C100P7X13_UNI" 0 0 50 H I L BNN
F3 "" 0 0 50 H I L BNN
DRAW
S 0 0 800 2600 1 1 0 f
X ~CE2 A1 -200 2000 200 R 40 40 0 0 I
X CLE A3 -200 1500 200 R 40 40 0 0 I
X ~CE0 A5 -200 2200 200 R 40 40 0 0 I
X ~R/B2 A7 -200 800 200 R 40 40 0 0 C
X VSS B2 1000 200 200 L 40 40 0 0 W
X VCC B6 1000 2500 200 L 40 40 0 0 P
X ALE C1 -200 1400 200 R 40 40 0 0 I
X ~CE1 C5 -200 2100 200 R 40 40 0 0 I
X ~RE C7 -200 1700 200 R 40 40 0 0 I
X ~WE E3 -200 1600 200 R 40 40 0 0 I
X ~R/B0 E5 -200 1000 200 R 40 40 0 0 C
X ~R/B1 E7 -200 900 200 R 40 40 0 0 C
X ~WP F2 -200 1200 200 R 40 40 0 0 I
X VSS F6 1000 200 200 L 40 40 0 0 W N
X I/O_8 G1 1000 1300 200 L 40 40 0 0 B
X I/O_0 G3 1000 2200 200 L 40 40 0 0 B
X I/O_15 G7 1000 600 200 L 40 40 0 0 B
X I/O_1 H2 1000 2100 200 L 40 40 0 0 B
X I/O_7 H6 1000 1500 200 L 40 40 0 0 B
X I/O_9 J1 1000 1200 200 L 40 40 0 0 B
X I/O_2 J3 1000 2000 200 L 40 40 0 0 B
X I/O_6 J5 1000 1600 200 L 40 40 0 0 B
X I/O_14 J7 1000 700 200 L 40 40 0 0 B
X I/O_3 K2 1000 1900 200 L 40 40 0 0 B
X I/O_5 K6 1000 1700 200 L 40 40 0 0 B
X I/O_10 L1 1000 1100 200 L 40 40 0 0 B
X VSS L3 1000 200 200 L 40 40 0 0 W N
X I/O_4 L5 1000 1800 200 L 40 40 0 0 B
X I/O_13 L7 1000 800 200 L 40 40 0 0 B
X VSSQ M2 1000 100 200 L 40 40 0 0 W
X VCC M6 1000 2500 200 L 40 40 0 0 P N
X VCCQ N1 1000 2400 200 L 40 40 0 0 P
X I/O_11 N3 1000 1000 200 L 40 40 0 0 B
X I/O_12 N5 1000 900 200 L 40 40 0 0 B
X VCCQ N7 1000 2400 200 L 40 40 0 0 P N
X ~CE3 OA0 -200 1900 200 R 40 40 0 0 I
X ~R/B3 OA8 -200 700 200 R 40 40 0 0 C
X VDDi OB8 1000 400 200 L 40 40 0 0 P
X VSSQ OE8 1000 100 200 L 40 40 0 0 W N
ENDDRAW
ENDDEF
Raw
LGA52C100P7X13_UNI.kicad_mod
(module LGA52C100P7X13_UNI (layer F.Cu) (tedit 6027CF83)
(fp_text reference REF** (at -4.5 -10) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value LGA52P13X7_1400X1800X100 (at 0 10.25) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -7 -9) (end 7 -9) (layer F.SilkS) (width 0.12))
(fp_line (start 7 -9) (end 7 9) (layer F.SilkS) (width 0.12))
(fp_line (start 7 9) (end -7 9) (layer F.SilkS) (width 0.12))
(fp_line (start -7 9) (end -7 -9) (layer F.SilkS) (width 0.12))
(fp_circle (center -7.5 -9.5) (end -7.3 -9.5) (layer F.SilkS) (width 0.2))
(fp_line (start 7.25 -9.25) (end 7.25 9.25) (layer F.CrtYd) (width 0.12))
(fp_line (start 7.25 9.25) (end -7.25 9.25) (layer F.CrtYd) (width 0.12))
(fp_line (start -7.25 9.25) (end -7.25 -9.25) (layer F.CrtYd) (width 0.12))
(fp_line (start -7.25 -9.25) (end 7.25 -9.25) (layer F.CrtYd) (width 0.12))
(fp_line (start -6 -8.5) (end 6 -8.5) (layer F.SilkS) (width 0.12))
(fp_line (start 6 -8.5) (end 6 8.5) (layer F.SilkS) (width 0.12))
(fp_line (start 6 8.5) (end -6 8.5) (layer F.SilkS) (width 0.12))
(fp_line (start -6 8.5) (end -6 -8.5) (layer F.SilkS) (width 0.12))
(pad G5 smd circle (at 1 0) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad G3 smd circle (at -1 0) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad F2 smd circle (at -2 -1) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad G1 smd circle (at -3 0) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad F6 smd circle (at 2 -1) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad G7 smd circle (at 3 0) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad H6 smd circle (at 2 1) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad E5 smd circle (at 1 -2) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad J5 smd circle (at 1 2) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad K6 smd circle (at 2 3) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad L5 smd circle (at 1 4) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad M6 smd circle (at 2 5) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad N5 smd circle (at 1 6) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad N7 smd circle (at 3 6) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad L7 smd circle (at 3 4) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad J7 smd circle (at 3 2) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad E7 smd circle (at 3 -2) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad D6 smd circle (at 2 -3) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad C7 smd circle (at 3 -4) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad C5 smd circle (at 1 -4) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad B6 smd circle (at 2 -5) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad A5 smd circle (at 1 -6) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad A7 smd circle (at 3 -6) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad E1 smd circle (at -3 -2) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad E3 smd circle (at -1 -2) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad D2 smd circle (at -2 -3) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad C1 smd circle (at -3 -4) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad C3 smd circle (at -1 -4) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad B2 smd circle (at -2 -5) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad A3 smd circle (at -1 -6) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad A1 smd circle (at -3 -6) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad H2 smd circle (at -2 1) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad J1 smd circle (at -3 2) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad J3 smd circle (at -1 2) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad K2 smd circle (at -2 3) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad L1 smd circle (at -3 4) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad L3 smd circle (at -1 4) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad M2 smd circle (at -2 5) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad N1 smd circle (at -3 6) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad N3 smd circle (at -1 6) (size 0.7 0.7) (layers F.Cu F.Paste F.Mask))
(pad OC8 smd circle (at 5 -2.5) (size 1 1) (layers F.Cu F.Paste F.Mask))
(pad OD8 smd circle (at 5 2.5) (size 1 1) (layers F.Cu F.Paste F.Mask))
(pad OB8 smd circle (at 5 -4.5) (size 1 1) (layers F.Cu F.Paste F.Mask))
(pad OA8 smd circle (at 5 -6.5) (size 1 1) (layers F.Cu F.Paste F.Mask))
(pad OE8 smd circle (at 5 4.5) (size 1 1) (layers F.Cu F.Paste F.Mask))
(pad OF8 smd circle (at 5 6.5) (size 1 1) (layers F.Cu F.Paste F.Mask))
(pad OC0 smd circle (at -5 -2.5) (size 1 1) (layers F.Cu F.Paste F.Mask))
(pad OB0 smd circle (at -5 -4.5) (size 1 1) (layers F.Cu F.Paste F.Mask))
(pad OA0 smd circle (at -5 -6.5) (size 1 1) (layers F.Cu F.Paste F.Mask))
(pad OD0 smd circle (at -5 2.5) (size 1 1) (layers F.Cu F.Paste F.Mask))
(pad OE0 smd circle (at -5 4.5) (size 1 1) (layers F.Cu F.Paste F.Mask))
(pad OF0 smd circle (at -5 6.5) (size 1 1) (layers F.Cu F.Paste F.Mask))
)
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