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Created June 6, 2011 04:53
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Conway's Game of Life in Verilog
/*
Conway's Game of Life modeled in Verilog by Adam Thomas / devdsp
*/
/*
* ----------------------------------------------------------------------------
* "THE BEER-WARE LICENSE" (Revision 42):
* <github.com/devdsp> wrote this file. As long as you retain this notice you
* can do whatever you want with this stuff. If we meet some day, and you think
* this stuff is worth it, you can buy me a beer in return. - Adam
* ----------------------------------------------------------------------------
*/
module count_neighbours (neighbours,sum);
input [7:0] neighbours;
output [3:0] sum;
wire [3:0] sum;
assign sum = neighbours[7] +
neighbours[6] +
neighbours[5] +
neighbours[4] +
neighbours[3] +
neighbours[2] +
neighbours[1] +
neighbours[0];
endmodule
module rules (pop_count, current_state, next_state);
input [3:0] pop_count;
input current_state;
output next_state;
wire next_state;
assign next_state = (pop_count == 2 & current_state) | pop_count == 3;
endmodule
module gol_cell( neighbours, clk, rst, seed, state );
input [7:0] neighbours;
input clk;
input rst;
input seed;
output state;
wire [3:0] pop;
wire next_state;
reg state;
count_neighbours cn(neighbours, pop);
rules r(pop, state, next_state);
always @(posedge clk or negedge rst) begin
if(~rst) begin
state = seed;
end else begin
state = next_state;
end
end
endmodule
module gol_cel_tb;
reg [7:0] neighbours;
reg clk;
reg rst;
reg seed;
wire state;
initial begin
$dumpfile("gol.vcd");
$dumpvars(0, top);
neighbours = 0;
clk = 0;
rst = 1;
seed = 0;
#5 rst = 0;
#15 rst = 1;
#10 neighbours = 8'b00000000;
#10 neighbours = 8'b00000100;
#10 neighbours = 8'b00010010;
#10 neighbours = 8'b01100100;
#10 neighbours = 8'b00100100;
#10 neighbours = 8'b00000000;
#10 neighbours = 8'b00110100;
#10 neighbours = 8'b00111100;
#10 neighbours = 8'b00101000;
#10 seed = 1;
#10 rst = 0;
#10 rst = 1;
#10 neighbours = 8'b00110100;
#10 neighbours = 8'b00101000;
#10 neighbours = 8'b00000000;
#10 $finish;
end
always begin
#5 clk = ! clk;
end
gol_cell top( neighbours, clk, rst, seed, state );
endmodule
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