Created
January 31, 2014 16:32
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diff --git a/spi.c b/spi.c | |
index 94a76a7..b5c4bde 100644 | |
--- a/spi.c | |
+++ b/spi.c | |
@@ -104,18 +104,18 @@ int default_spi_write_256(struct flashctx *flash, uint8_t *buf, | |
int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, | |
unsigned int len) | |
{ | |
- unsigned int addrbase = 0; | |
+ unsigned long long addrbase = 0; | |
/* Check if the chip fits between lowest valid and highest possible | |
* address. Highest possible address with the current SPI implementation | |
- * means 0xffffff, the highest unsigned 24bit number. | |
+ * means 0xffffffff | |
*/ | |
addrbase = spi_get_valid_read_addr(flash); | |
- if (addrbase + flash->chip->total_size * 1024 > (1 << 24)) { | |
+ if (addrbase + flash->chip->total_size * 1024 > (1ULL << 32)) { | |
msg_perr("Flash chip size exceeds the allowed access window. "); | |
msg_perr("Read will probably fail.\n"); | |
/* Try to get the best alignment subject to constraints. */ | |
- addrbase = (1 << 24) - flash->chip->total_size * 1024; | |
+ addrbase = (1ULL << 32) - flash->chip->total_size * 1024; | |
} | |
/* Check if alignment is native (at least the largest power of two which | |
* is a factor of the mapped size of the chip). |
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