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Last active January 14, 2026 16:50
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A list of RISC-V standard extensions
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riscv-extensions.md

RISC-V Extensions

Base Description
RV32E Base 32-bit ISA with 16 registers
RV32I Base 32-bit ISA
RV64I Base 64-bit ISA
RV128I Base 128-bit ISA
Extension Description
A Atomic instructions
B Bit manipulation
C Compressed instructions
D Double-precision floating-point
F Single-precision floating-point
G Shorthand for IMAFD extensions
H Hypervisor extension
J Dynamically translated languages
L Decimal floating-point
M Integer multiplication and division
N User-level interrupts
P Packed-SIMD instructions
Q Quad-precision floating-point
S Supervisor mode
T Transactional memory
V Vector operations

Examples

Name Description
RV32I Supports only basic operations natively on 32 bits
RV32GC General purpose uses on 32 bits with support for compressed instructions
RV64IMACV For intensive and parallel integer-only computing
RV64GCV Theoretically suitable for future personal computers
@3rfaan
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3rfaan commented Jan 3, 2026

Hey, thanks a lot for this! What about "Z-Extensions"?

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