Created
April 25, 2012 12:09
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ARM Intterrupt
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#I assume here that all the memory addresses are set up correctly. | |
IMPORT main | |
EXPORT start | |
start | |
ldr r0,=VICVectAddr0 | |
ldr r1,=irqhan | |
str r1,[r0] ; associate our interrupt handler with Vectored Interrupt 0 | |
ldr r0,=VICVectCtrl0 | |
mov r1,#Timer0ChannelNumber+(1<<IRQslot_en) | |
str r1,[r0] ; make Timer 0 interrupts the source of Vectored Interrupt 0 | |
ldr r0,=VICIntEnable | |
mov r1,#Timer0Mask | |
str r1,[r0] ; enable Timer 0 interrupts to be recognised by the VIC | |
ldr r0,=VICVectAddr | |
mov r1,#0 | |
str r1,[r0] ; remove any pending interrupt (may not be needed) | |
; Initialise Timer 0 | |
ldr r0,=T0TCR | |
mov r1,#TimerCommandReset | |
str r1,[r0] | |
ldr r0,=T0IR | |
mov r1,#TimerResetAllInterrupts | |
str r1,[r0] | |
ldr r0,=T0MR0 | |
ldr r1,=(#Freq/200)-1 ; 5 ms = 1/200 second | |
str r1,[r0] | |
ldr r0,=T0MCR | |
mov r1,#TimerModeResetAndInterrupt | |
str r1,[r0] | |
ldr r0,=T0TCR | |
mov r1,#TimerCommandRun | |
str r1,[r0] | |
#Begin writing code here | |
;blah | |
;blah | |
;blah | |
STOP B STOP | |
AREA InterruptStuff, CODE, READONLY | |
irqhan sub lr,lr,#4 | |
stmfd sp!,{r0-r1,lr} ; the lr will be restored to the pc | |
; | |
;CODE GOES HERE | |
; | |
;Reset interrupt | |
ldr r0,=T0IR | |
mov r1,#TimerResetTimer0Interrupt | |
str r1,[r0] ; remove MR0 interrupt request from timer | |
ldr r0,=VICVectAddr | |
mov r1,#0 | |
str r1,[r0] ; reset VIC | |
ldmfd sp!,{r0-r1,pc}^ ; return from interrupt, restoring pc from lr |
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