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sx1278_from_doriji: 2016-03-05 it's works. from hama to mangwon-dong han river.
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#define RF_RESET 11 | |
#define RF_DIO0 12 | |
#define RF_SCK 13 | |
#define RF_MISO 14 | |
#define RF_MOSI 15 | |
#define RF_NSEL 16 | |
#define LED1 PIN_LED1 | |
#define LED2 22 // | |
unsigned char mode; //lora --1 / FSK --0 | |
unsigned char Freq_Sel; // | |
unsigned char Power_Sel; // | |
unsigned char Lora_Rate_Sel; // | |
unsigned char BandWide_Sel; // | |
unsigned char Fsk_Rate_Sel; // | |
int led = LED1; | |
int nsel = RF_NSEL; | |
int sck = RF_SCK; | |
int mosi = RF_MOSI; | |
int miso = RF_MISO; | |
int dio0 = RF_DIO0; | |
int reset = RF_RESET; | |
void SPICmd8bit(unsigned char WrPara) | |
{ | |
unsigned char bitcnt; | |
digitalWrite(nsel, LOW);//nSEL_L(); | |
digitalWrite(sck, LOW);//SCK_L(); | |
for(bitcnt=8; bitcnt!=0; bitcnt--) | |
{ | |
digitalWrite(sck, LOW);//SCK_L(); | |
if(WrPara&0x80) | |
digitalWrite(mosi, HIGH);//SDI_H(); | |
else | |
digitalWrite(mosi, LOW);//SDI_L(); | |
digitalWrite(sck, HIGH);//SCK_H(); | |
WrPara <<= 1; | |
} | |
digitalWrite(sck, LOW);//SCK_L(); | |
digitalWrite(mosi, HIGH);//SDI_H(); | |
} | |
unsigned char SPIRead8bit(void) | |
{ | |
unsigned char RdPara = 0; | |
unsigned char bitcnt; | |
digitalWrite(nsel, LOW);//nSEL_L(); | |
digitalWrite(mosi, HIGH);//SDI_H(); //Read one byte data from FIFO, MOSI hold to High | |
for(bitcnt=8; bitcnt!=0; bitcnt--) | |
{ | |
digitalWrite(sck, LOW);//SCK_L(); | |
RdPara <<= 1; | |
digitalWrite(sck, HIGH); //SCK_H(); | |
if(digitalRead(miso))//if(Get_SDO()) | |
RdPara |= 0x01; | |
else | |
RdPara |= 0x00; | |
} | |
digitalWrite(sck, LOW);//SCK_L(); | |
return(RdPara); | |
} | |
unsigned char SPIRead(unsigned char adr) | |
{ | |
unsigned char tmp; | |
SPICmd8bit(adr); //Send address first | |
tmp = SPIRead8bit(); | |
digitalWrite(nsel, HIGH);//nSEL_H(); | |
return(tmp); | |
} | |
void SPIWrite(unsigned char adr, unsigned char WrPara) | |
{ | |
digitalWrite(nsel, LOW);//nSEL_L(); | |
SPICmd8bit(adr|0x80); //写入地址 | |
SPICmd8bit(WrPara);//写入数据 | |
digitalWrite(sck, LOW);//SCK_L(); | |
digitalWrite(mosi, HIGH);//SDI_H(); | |
digitalWrite(nsel, HIGH);//nSEL_H(); | |
} | |
void SPIBurstRead(unsigned char adr, unsigned char *ptr, unsigned char leng) | |
{ | |
unsigned char i; | |
if(leng<=1) //length must more than one | |
return; | |
else | |
{ | |
digitalWrite(sck, LOW); //SCK_L(); | |
digitalWrite(nsel, LOW);//nSEL_L(); | |
SPICmd8bit(adr); | |
for(i=0;i<leng;i++) | |
ptr[i] = SPIRead8bit(); | |
digitalWrite(nsel, HIGH);//nSEL_H(); | |
} | |
} | |
void BurstWrite(unsigned char adr, unsigned char *ptr, unsigned char leng) | |
{ | |
unsigned char i; | |
if(leng<=1) //length must more than one | |
return; | |
else | |
{ | |
digitalWrite(sck, LOW);//SCK_L(); | |
digitalWrite(nsel, LOW);//nSEL_L(); | |
SPICmd8bit(adr|0x80); | |
for(i=0;i<leng;i++) | |
SPICmd8bit(ptr[i]); | |
digitalWrite(nsel, HIGH);//nSEL_H(); | |
} | |
} | |
#define CR_4_5 | |
#ifdef CR_4_5 | |
#define CR 0x01 // 4/5 | |
#else | |
#ifdef CR_4_6 | |
#define CR 0x02 // 4/6 | |
#else | |
#ifdef CR_4_7 | |
#define CR 0x03 // 4/7 | |
#else | |
#ifdef CR_4_8 | |
#define CR 0x04 // 4/8 | |
#endif | |
#endif | |
#endif | |
#endif | |
//CRC Enable | |
#define CRC_EN | |
#ifdef CRC_EN | |
#define CRC 0x01 //CRC Enable | |
#else | |
#define CRC 0x00 | |
#endif | |
#define LR_RegFifo 0x00 | |
// Common settings | |
#define LR_RegOpMode 0x01 | |
#define LR_RegFrMsb 0x06 | |
#define LR_RegFrMid 0x07 | |
#define LR_RegFrLsb 0x08 | |
// Tx settings | |
#define LR_RegPaConfig 0x09 | |
#define LR_RegPaRamp 0x0A | |
#define LR_RegOcp 0x0B | |
// Rx settings | |
#define LR_RegLna 0x0C | |
// LoRa registers | |
#define LR_RegFifoAddrPtr 0x0D | |
#define LR_RegFifoTxBaseAddr 0x0E | |
#define LR_RegFifoRxBaseAddr 0x0F | |
#define LR_RegFifoRxCurrentaddr 0x10 | |
#define LR_RegIrqFlagsMask 0x11 | |
#define LR_RegIrqFlags 0x12 | |
#define LR_RegRxNbBytes 0x13 | |
#define LR_RegRxHeaderCntValueMsb 0x14 | |
#define LR_RegRxHeaderCntValueLsb 0x15 | |
#define LR_RegRxPacketCntValueMsb 0x16 | |
#define LR_RegRxPacketCntValueLsb 0x17 | |
#define LR_RegModemStat 0x18 | |
#define LR_RegPktSnrValue 0x19 | |
#define LR_RegPktRssiValue 0x1A | |
#define LR_RegRssiValue 0x1B | |
#define LR_RegHopChannel 0x1C | |
#define LR_RegModemConfig1 0x1D | |
#define LR_RegModemConfig2 0x1E | |
#define LR_RegSymbTimeoutLsb 0x1F | |
#define LR_RegPreambleMsb 0x20 | |
#define LR_RegPreambleLsb 0x21 | |
#define LR_RegPayloadLength 0x22 | |
#define LR_RegMaxPayloadLength 0x23 | |
#define LR_RegHopPeriod 0x24 | |
#define LR_RegFifoRxByteAddr 0x25 | |
// I/O settings | |
#define REG_LR_DIOMAPPING1 0x40 | |
#define REG_LR_DIOMAPPING2 0x41 | |
// Version | |
#define REG_LR_VERSION 0x42 | |
// Additional settings | |
#define REG_LR_PLLHOP 0x44 | |
#define REG_LR_TCXO 0x4B | |
#define REG_LR_PADAC 0x4D | |
#define REG_LR_FORMERTEMP 0x5B | |
#define REG_LR_AGCREF 0x61 | |
#define REG_LR_AGCTHRESH1 0x62 | |
#define REG_LR_AGCTHRESH2 0x63 | |
#define REG_LR_AGCTHRESH3 0x64 | |
/********************FSK/ook mode***************************/ | |
#define RegFIFO 0x00 //FIFO | |
#define RegOpMode 0x01 //Operation mode | |
#define RegBitRateMsb 0x02 //BR MSB | |
#define RegBitRateLsb 0x03 //BR LSB | |
#define RegFdevMsb 0x04 //FD MSB | |
#define RegFdevLsb 0x05 //FD LSB | |
#define RegFreqMsb 0x06 //Freq MSB | |
#define RegFreqMid 0x07 //Freq Middle byte | |
#define RegFreqLsb 0x08 //Freq LSB | |
#define RegPaConfig 0x09 | |
#define RegPaRamp 0x0a | |
#define RegOcp 0x0b | |
#define RegLna 0x0c | |
#define RegRxConfig 0x0d | |
#define RegRssiConfig 0x0e | |
#define RegRssiCollision 0x0f | |
#define RegRssiThresh 0x10 | |
#define RegRssiValue 0x11 | |
#define RegRxBw 0x12 | |
#define RegAfcBw 0x13 | |
#define RegOokPeak 0x14 | |
#define RegOokFix 0x15 | |
#define RegOokAvg 0x16 | |
#define RegAfcFei 0x1a | |
#define RegAfcMsb 0x1b | |
#define RegAfcLsb 0x1c | |
#define RegFeiMsb 0x1d | |
#define RegFeiLsb 0x1e | |
#define RegPreambleDetect 0x1f | |
#define RegRxTimeout1 0x20 | |
#define RegRxTimeout2 0x21 | |
#define RegRxTimeout3 0x22 | |
#define RegRxDelay 0x23 | |
#define RegOsc 0x24 // SET OSC | |
#define RegPreambleMsb 0x25 | |
#define RegPreambleLsb 0x26 | |
#define RegSyncConfig 0x27 | |
#define RegSyncValue1 0x28 | |
#define RegSyncValue2 0x29 | |
#define RegSyncValue3 0x2a | |
#define RegSyncValue4 0x2b | |
#define RegSyncValue5 0x2c | |
#define RegSyncValue6 0x2d | |
#define RegSyncValue7 0x2e | |
#define RegSyncValue8 0x2f | |
#define RegPacketConfig1 0x30 | |
#define RegPacketConfig2 0x31 | |
#define RegPayloadLength 0x32 | |
#define RegNodeAdrs 0x33 | |
#define RegBroadcastAdrs 0x34 | |
#define RegFifoThresh 0x35 | |
#define RegSeqConfig1 0x36 | |
#define RegSeqConfig2 0x37 | |
#define RegTimerResol 0x38 | |
#define RegTimer1Coef 0x39 | |
#define RegTimer2Coef 0x3a | |
#define RegImageCal 0x3b | |
#define RegTemp 0x3c | |
#define RegLowBat 0x3d | |
#define RegIrqFlags1 0x3e | |
#define RegIrqFlags2 0x3f | |
#define RegDioMapping1 0x40 | |
#define RegDioMapping2 0x41 | |
#define RegVersion 0x42 | |
#define RegPllHop 0x44 | |
#define RegPaDac 0x4d | |
#define RegBitRateFrac 0x5d | |
/************************************** | |
*/ | |
unsigned char sx1276_7_8FreqTbl[1][3] = | |
{ | |
{0x6C, 0x80, 0x00}, //434MHz | |
}; | |
unsigned char sx1276_7_8PowerTbl[4] = | |
{ | |
0xFF, //20dbm | |
0xFC, //17dbm | |
0xF9, //14dbm | |
0xF6, //11dbm | |
}; | |
unsigned char sx1276_7_8SpreadFactorTbl[7] = | |
{ | |
6,7,8,9,10,11,12 | |
}; | |
unsigned char sx1276_7_8LoRaBwTbl[10] = | |
{ | |
//7.8KHz,10.4KHz,15.6KHz,20.8KHz,31.2KHz,41.7KHz,62.5KHz,125KHz,250KHz,500KHz | |
0,1,2,3,4,5,6,7,8,9 | |
}; | |
unsigned char sx1276_7_8Data[] = {"Mark1 Lora sx1276_7_8"}; | |
unsigned char RxData[64]; | |
void sx1276_7_8_Standby(void) | |
{ | |
SPIWrite(LR_RegOpMode,0x09); | |
//Standby//Low Frequency Mode | |
//SPIWrite(LR_RegOpMode,0x01); | |
//Standby//High Frequency Mode | |
} | |
void sx1276_7_8_Sleep(void) | |
{ | |
SPIWrite(LR_RegOpMode,0x08); //Sleep//Low Frequency Mode | |
//SPIWrite(LR_RegOpMode,0x00); | |
//Sleep//High Frequency Mode | |
} | |
void sx1276_7_8_EntryLoRa(void) | |
{ | |
SPIWrite(LR_RegOpMode,0x88);//Low Frequency Mode | |
//SPIWrite(LR_RegOpMode,0x80);//High Frequency Mode | |
} | |
void sx1276_7_8_LoRaClearIrq(void) | |
{ | |
SPIWrite(LR_RegIrqFlags,0xFF); | |
} | |
unsigned char sx1276_7_8_LoRaEntryRx(void) | |
{ | |
unsigned char addr; | |
sx1276_7_8_Config(); //setting base parameter | |
SPIWrite(REG_LR_PADAC,0x84); //Normal and Rx | |
SPIWrite(LR_RegHopPeriod,0xFF); //RegHopPeriod NO FHSS | |
SPIWrite(REG_LR_DIOMAPPING1,0x01); //DIO0=00, DIO1=00, DIO2=00, DIO3=01 | |
SPIWrite(LR_RegIrqFlagsMask,0x3F); //Open RxDone interrupt & Timeout | |
sx1276_7_8_LoRaClearIrq(); | |
SPIWrite(LR_RegPayloadLength,21); //RegPayloadLength 21byte(this register must difine when the data long of one byte in SF is 6) | |
addr = SPIRead(LR_RegFifoRxBaseAddr); //Read RxBaseAddr | |
SPIWrite(LR_RegFifoAddrPtr,addr); //RxBaseAddr ->FiFoAddrPtr | |
SPIWrite(LR_RegOpMode,0x8d); //Continuous Rx Mode//Low Frequency Mode | |
//SPIWrite(LR_RegOpMode,0x05); //Continuous Rx Mode//High Frequency Mode | |
//SysTime = 0; | |
while(1) | |
{ | |
if((SPIRead(LR_RegModemStat)&0x04)==0x04) //Rx-on going RegModemStat | |
break; | |
/*if(SysTime>=3) | |
return 0; //over time for | |
error*/ | |
} | |
} | |
unsigned char sx1276_7_8_LoRaRxPacket(void) | |
{ | |
unsigned char i; | |
unsigned char addr; | |
unsigned char packet_size; | |
if(digitalRead(dio0))//if(Get_NIRQ()) | |
{ | |
for(i=0;i<32;i++) | |
RxData[i] = 0x00; | |
addr = SPIRead(LR_RegFifoRxCurrentaddr); //last packet addr | |
SPIWrite(LR_RegFifoAddrPtr,addr); //RxBaseAddr ->FiFoAddrPtr | |
if(sx1276_7_8SpreadFactorTbl[Lora_Rate_Sel]==6) //When SpreadFactor is six,will use Implicit Header mode(Excluding internal packet length) | |
packet_size=21; | |
else | |
packet_size = SPIRead(LR_RegRxNbBytes); //Number for received bytes | |
SPIBurstRead(0x00, RxData, packet_size); | |
sx1276_7_8_LoRaClearIrq(); | |
for(i=0;i<17;i++) | |
{ | |
if(RxData[i]!=sx1276_7_8Data[i]) | |
break; | |
} | |
if(i>=17) //Rx success | |
return(1); | |
else | |
return(0); | |
} | |
else | |
return(0); | |
} | |
unsigned char sx1276_7_8_LoRaReadRSSI(void) | |
{ | |
unsigned int temp=10; | |
temp=SPIRead(LR_RegRssiValue); //Read RegRssiValue,Rssi value | |
temp=temp+127-137; //127:Max RSSI,137:RSSI offset | |
return (unsigned char)temp; | |
} | |
unsigned char sx1276_7_8_LoRaEntryTx(void) | |
{ | |
unsigned char addr,temp; | |
sx1276_7_8_Config(); //setting baseparameter | |
SPIWrite(REG_LR_PADAC,0x87); //Tx for 20dBm | |
SPIWrite(LR_RegHopPeriod,0x00); //RegHopPeriodNO FHSS | |
SPIWrite(REG_LR_DIOMAPPING1,0x41); //DIO0=01, DIO1=00,DIO2=00, DIO3=01 | |
sx1276_7_8_LoRaClearIrq(); | |
SPIWrite(LR_RegIrqFlagsMask,0xF7); //Open TxDoneinterrupt | |
SPIWrite(LR_RegPayloadLength,21); //RegPayloadLength21byte | |
addr = SPIRead(LR_RegFifoTxBaseAddr); //RegFiFoTxBaseAddr | |
SPIWrite(LR_RegFifoAddrPtr,addr); //RegFifoAddrPtr | |
//SysTime = 0; | |
while(1) | |
{ | |
temp=SPIRead(LR_RegPayloadLength); | |
if(temp==21) | |
{ | |
break; | |
} | |
/*if(SysTime>=3) | |
return 0;*/ | |
} | |
} | |
unsigned char sx1276_7_8_LoRaTxPacket(void) | |
{ | |
unsigned char TxFlag=0; | |
unsigned char addr; | |
BurstWrite(0x00, (unsigned char *)sx1276_7_8Data, 21); | |
SPIWrite(LR_RegOpMode,0x8b); //Tx Mode | |
while(1) | |
{ | |
if(digitalRead(dio0))//if(Get_NIRQ()) //Packet send over | |
{ | |
SPIRead(LR_RegIrqFlags); | |
sx1276_7_8_LoRaClearIrq(); //Clear irq | |
sx1276_7_8_Standby(); //Entry Standbymode | |
break; | |
} | |
} | |
} | |
unsigned char sx1276_7_8_ReadRSSI(void) | |
{ | |
unsigned char temp=0xff; | |
temp=SPIRead(0x11); | |
temp>>=1; | |
temp=127-temp; //127:Max RSSI | |
return temp; | |
} | |
void sx1276_7_8_Config(void) | |
{ | |
unsigned char i; | |
sx1276_7_8_Sleep(); //Change modem mode Must in Sleep mode | |
for(i=250;i!=0;i--); //Delay | |
delay(15); | |
//lora mode | |
sx1276_7_8_EntryLoRa(); | |
//SPIWrite(0x5904); //?? Change digital regulator form 1.6V to 1.47V: see erratanote | |
BurstWrite(LR_RegFrMsb,sx1276_7_8FreqTbl[Freq_Sel],3); //setting frequency parameter | |
//setting base parameter | |
SPIWrite(LR_RegPaConfig,sx1276_7_8PowerTbl[Power_Sel]); //Settingoutput power parameter | |
SPIWrite(LR_RegOcp,0x0B); //RegOcp,Close Ocp | |
SPIWrite(LR_RegLna,0x23); //RegLNA,High & LNA Enable | |
if(sx1276_7_8SpreadFactorTbl[Lora_Rate_Sel]==6) //SFactor=6 | |
{ | |
unsigned char tmp; | |
SPIWrite(LR_RegModemConfig1,((sx1276_7_8LoRaBwTbl[BandWide_Sel]<<4)+(CR<<1)+0x01));//Implicit Enable CRC Enable(0x02) & Error Coding rate 4/5(0x01), 4/6(0x02),4/7(0x03), 4/8(0x04) | |
SPIWrite(LR_RegModemConfig2,((sx1276_7_8SpreadFactorTbl[Lora_Rate_Sel]<<4)+(CRC<<2)+0x03)); | |
tmp = SPIRead(0x31); | |
tmp &= 0xF8; | |
tmp |= 0x05; | |
SPIWrite(0x31,tmp); | |
SPIWrite(0x37,0x0C); | |
} | |
else | |
{ | |
SPIWrite(LR_RegModemConfig1,((sx1276_7_8LoRaBwTbl[BandWide_Sel]<<4)+(CR<<1)+0x00));//Explicit Enable CRC Enable(0x02) & Error Coding rate 4/5(0x01), 4/6(0x02),4/7(0x03), 4/8(0x04) | |
SPIWrite(LR_RegModemConfig2,((sx1276_7_8SpreadFactorTbl[Lora_Rate_Sel]<<4)+(CRC<<2)+0x03)); //SFactor & LNA gain set by the internal AGC loop | |
} | |
SPIWrite(LR_RegSymbTimeoutLsb,0xFF); //RegSymbTimeoutLsbTimeout = 0x3FF(Max) | |
SPIWrite(LR_RegPreambleMsb,0x00); //RegPreambleMsb | |
SPIWrite(LR_RegPreambleLsb,12); //RegPreambleLsb8+4=12byte Preamble | |
SPIWrite(REG_LR_DIOMAPPING2,0x01); //RegDioMapping2DIO5=00, DIO4=01 | |
sx1276_7_8_Standby(); //Entry standby mode | |
} | |
void setup() { | |
// put your setup code here, to run once: | |
pinMode(led, OUTPUT); | |
pinMode(nsel, OUTPUT); | |
pinMode(sck, OUTPUT); | |
pinMode(mosi, OUTPUT); | |
pinMode(miso, INPUT); | |
pinMode(reset, OUTPUT); | |
pinMode(dio0, INPUT); | |
digitalWrite(reset, HIGH); | |
digitalWrite(reset, LOW); | |
delay(100); | |
digitalWrite(reset, HIGH); | |
Serial.begin(9600); | |
delay(5000) ; | |
} | |
void loop() { | |
// put your main code here, to run repeatedly: | |
mode = 0x01;//lora mode | |
Freq_Sel = 0x00;//433M | |
Power_Sel = 0x00;// | |
Lora_Rate_Sel = 0x06;// | |
BandWide_Sel = 0x07; | |
Fsk_Rate_Sel = 0x00; | |
Serial.println("Will config"); | |
sx1276_7_8_Config();// | |
Serial.println("Will entry rx"); | |
sx1276_7_8_LoRaEntryRx(); | |
Serial.println("Did entry rx"); | |
digitalWrite(led, HIGH); | |
delay(500); | |
digitalWrite(led, LOW); | |
delay(500); | |
while(1) { | |
Serial.println("Loop"); | |
//Master | |
digitalWrite(led, HIGH); | |
sx1276_7_8_LoRaEntryTx(); | |
sx1276_7_8_LoRaTxPacket(); | |
digitalWrite(led, LOW); // turn the LED on (HIGH is the voltage level) | |
sx1276_7_8_LoRaEntryRx(); | |
delay(2000); | |
/* if(sx1276_7_8_LoRaRxPacket()) | |
{ | |
digitalWrite(led, HIGH); | |
delay(500); | |
digitalWrite(led, LOW); | |
delay(500); | |
}*/ | |
// turn the LED on (HIGH is the voltage level) | |
// turn the LED on (HIGH is the voltage level) | |
//slaver | |
/*if(sx1276_7_8_LoRaRxPacket()) | |
{ | |
digitalWrite(led, HIGH); delay(500); digitalWrite(led, LOW); delay(500); sx1276_7_8_LoRaEntryRx(); /*digitalWrite(led, HIGH); | |
// turn the LED on (HIGH is the voltage level) | |
// wait for a second | |
// turn the LED on (HIGH is the voltage level) | |
// wait for a second | |
// turn the LED on (HIGH is the voltage level) | |
sx1276_7_8_LoRaEntryTx(); | |
sx1276_7_8_LoRaTxPacket(); | |
digitalWrite(led, LOW); // turn the LED on (HIGH is the voltage level)* | |
sx1276_7_8_LoRaEntryRx();*/ | |
//} | |
} | |
} |
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#define RF_RESET 11 | |
#define RF_DIO0 12 | |
#define RF_SCK 13 | |
#define RF_MISO 14 | |
#define RF_MOSI 15 | |
#define RF_NSEL 16 | |
#define LED1 PIN_LED1 | |
#define LED2 22 // | |
unsigned char mode; //lora --1 / FSK --0 | |
unsigned char Freq_Sel; // | |
unsigned char Power_Sel; // | |
unsigned char Lora_Rate_Sel; // | |
unsigned char BandWide_Sel; // | |
unsigned char Fsk_Rate_Sel; // | |
int led = LED1; | |
int nsel = RF_NSEL; | |
int sck = RF_SCK; | |
int mosi = RF_MOSI; | |
int miso = RF_MISO; | |
int dio0 = RF_DIO0; | |
int reset = RF_RESET; | |
void SPICmd8bit(unsigned char WrPara) | |
{ | |
unsigned char bitcnt; | |
digitalWrite(nsel, LOW);//nSEL_L(); | |
digitalWrite(sck, LOW);//SCK_L(); | |
for(bitcnt=8; bitcnt!=0; bitcnt--) | |
{ | |
digitalWrite(sck, LOW);//SCK_L(); | |
if(WrPara&0x80) | |
digitalWrite(mosi, HIGH);//SDI_H(); | |
else | |
digitalWrite(mosi, LOW);//SDI_L(); | |
digitalWrite(sck, HIGH);//SCK_H(); | |
WrPara <<= 1; | |
} | |
digitalWrite(sck, LOW);//SCK_L(); | |
digitalWrite(mosi, HIGH);//SDI_H(); | |
} | |
unsigned char SPIRead8bit(void) | |
{ | |
unsigned char RdPara = 0; | |
unsigned char bitcnt; | |
digitalWrite(nsel, LOW);//nSEL_L(); | |
digitalWrite(mosi, HIGH);//SDI_H(); //Read one byte data from FIFO, MOSI hold to High | |
for(bitcnt=8; bitcnt!=0; bitcnt--) | |
{ | |
digitalWrite(sck, LOW);//SCK_L(); | |
RdPara <<= 1; | |
digitalWrite(sck, HIGH); //SCK_H(); | |
if(digitalRead(miso))//if(Get_SDO()) | |
RdPara |= 0x01; | |
else | |
RdPara |= 0x00; | |
} | |
digitalWrite(sck, LOW);//SCK_L(); | |
return(RdPara); | |
} | |
unsigned char SPIRead(unsigned char adr) | |
{ | |
unsigned char tmp; | |
SPICmd8bit(adr); //Send address first | |
tmp = SPIRead8bit(); | |
digitalWrite(nsel, HIGH);//nSEL_H(); | |
return(tmp); | |
} | |
void SPIWrite(unsigned char adr, unsigned char WrPara) | |
{ | |
digitalWrite(nsel, LOW);//nSEL_L(); | |
SPICmd8bit(adr|0x80); //写入地址 | |
SPICmd8bit(WrPara);//写入数据 | |
digitalWrite(sck, LOW);//SCK_L(); | |
digitalWrite(mosi, HIGH);//SDI_H(); | |
digitalWrite(nsel, HIGH);//nSEL_H(); | |
} | |
void SPIBurstRead(unsigned char adr, unsigned char *ptr, unsigned char leng) | |
{ | |
unsigned char i; | |
if(leng<=1) //length must more than one | |
return; | |
else | |
{ | |
digitalWrite(sck, LOW); //SCK_L(); | |
digitalWrite(nsel, LOW);//nSEL_L(); | |
SPICmd8bit(adr); | |
for(i=0;i<leng;i++) | |
ptr[i] = SPIRead8bit(); | |
digitalWrite(nsel, HIGH);//nSEL_H(); | |
} | |
} | |
void BurstWrite(unsigned char adr, unsigned char *ptr, unsigned char leng) | |
{ | |
unsigned char i; | |
if(leng<=1) //length must more than one | |
return; | |
else | |
{ | |
digitalWrite(sck, LOW);//SCK_L(); | |
digitalWrite(nsel, LOW);//nSEL_L(); | |
SPICmd8bit(adr|0x80); | |
for(i=0;i<leng;i++) | |
SPICmd8bit(ptr[i]); | |
digitalWrite(nsel, HIGH);//nSEL_H(); | |
} | |
} | |
#define CR_4_5 | |
#ifdef CR_4_5 | |
#define CR 0x01 // 4/5 | |
#else | |
#ifdef CR_4_6 | |
#define CR 0x02 // 4/6 | |
#else | |
#ifdef CR_4_7 | |
#define CR 0x03 // 4/7 | |
#else | |
#ifdef CR_4_8 | |
#define CR 0x04 // 4/8 | |
#endif | |
#endif | |
#endif | |
#endif | |
//CRC Enable | |
#define CRC_EN | |
#ifdef CRC_EN | |
#define CRC 0x01 //CRC Enable | |
#else | |
#define CRC 0x00 | |
#endif | |
#define LR_RegFifo 0x00 | |
// Common settings | |
#define LR_RegOpMode 0x01 | |
#define LR_RegFrMsb 0x06 | |
#define LR_RegFrMid 0x07 | |
#define LR_RegFrLsb 0x08 | |
// Tx settings | |
#define LR_RegPaConfig 0x09 | |
#define LR_RegPaRamp 0x0A | |
#define LR_RegOcp 0x0B | |
// Rx settings | |
#define LR_RegLna 0x0C | |
// LoRa registers | |
#define LR_RegFifoAddrPtr 0x0D | |
#define LR_RegFifoTxBaseAddr 0x0E | |
#define LR_RegFifoRxBaseAddr 0x0F | |
#define LR_RegFifoRxCurrentaddr 0x10 | |
#define LR_RegIrqFlagsMask 0x11 | |
#define LR_RegIrqFlags 0x12 | |
#define LR_RegRxNbBytes 0x13 | |
#define LR_RegRxHeaderCntValueMsb 0x14 | |
#define LR_RegRxHeaderCntValueLsb 0x15 | |
#define LR_RegRxPacketCntValueMsb 0x16 | |
#define LR_RegRxPacketCntValueLsb 0x17 | |
#define LR_RegModemStat 0x18 | |
#define LR_RegPktSnrValue 0x19 | |
#define LR_RegPktRssiValue 0x1A | |
#define LR_RegRssiValue 0x1B | |
#define LR_RegHopChannel 0x1C | |
#define LR_RegModemConfig1 0x1D | |
#define LR_RegModemConfig2 0x1E | |
#define LR_RegSymbTimeoutLsb 0x1F | |
#define LR_RegPreambleMsb 0x20 | |
#define LR_RegPreambleLsb 0x21 | |
#define LR_RegPayloadLength 0x22 | |
#define LR_RegMaxPayloadLength 0x23 | |
#define LR_RegHopPeriod 0x24 | |
#define LR_RegFifoRxByteAddr 0x25 | |
// I/O settings | |
#define REG_LR_DIOMAPPING1 0x40 | |
#define REG_LR_DIOMAPPING2 0x41 | |
// Version | |
#define REG_LR_VERSION 0x42 | |
// Additional settings | |
#define REG_LR_PLLHOP 0x44 | |
#define REG_LR_TCXO 0x4B | |
#define REG_LR_PADAC 0x4D | |
#define REG_LR_FORMERTEMP 0x5B | |
#define REG_LR_AGCREF 0x61 | |
#define REG_LR_AGCTHRESH1 0x62 | |
#define REG_LR_AGCTHRESH2 0x63 | |
#define REG_LR_AGCTHRESH3 0x64 | |
/********************FSK/ook mode***************************/ | |
#define RegFIFO 0x00 //FIFO | |
#define RegOpMode 0x01 //Operation mode | |
#define RegBitRateMsb 0x02 //BR MSB | |
#define RegBitRateLsb 0x03 //BR LSB | |
#define RegFdevMsb 0x04 //FD MSB | |
#define RegFdevLsb 0x05 //FD LSB | |
#define RegFreqMsb 0x06 //Freq MSB | |
#define RegFreqMid 0x07 //Freq Middle byte | |
#define RegFreqLsb 0x08 //Freq LSB | |
#define RegPaConfig 0x09 | |
#define RegPaRamp 0x0a | |
#define RegOcp 0x0b | |
#define RegLna 0x0c | |
#define RegRxConfig 0x0d | |
#define RegRssiConfig 0x0e | |
#define RegRssiCollision 0x0f | |
#define RegRssiThresh 0x10 | |
#define RegRssiValue 0x11 | |
#define RegRxBw 0x12 | |
#define RegAfcBw 0x13 | |
#define RegOokPeak 0x14 | |
#define RegOokFix 0x15 | |
#define RegOokAvg 0x16 | |
#define RegAfcFei 0x1a | |
#define RegAfcMsb 0x1b | |
#define RegAfcLsb 0x1c | |
#define RegFeiMsb 0x1d | |
#define RegFeiLsb 0x1e | |
#define RegPreambleDetect 0x1f | |
#define RegRxTimeout1 0x20 | |
#define RegRxTimeout2 0x21 | |
#define RegRxTimeout3 0x22 | |
#define RegRxDelay 0x23 | |
#define RegOsc 0x24 // SET OSC | |
#define RegPreambleMsb 0x25 | |
#define RegPreambleLsb 0x26 | |
#define RegSyncConfig 0x27 | |
#define RegSyncValue1 0x28 | |
#define RegSyncValue2 0x29 | |
#define RegSyncValue3 0x2a | |
#define RegSyncValue4 0x2b | |
#define RegSyncValue5 0x2c | |
#define RegSyncValue6 0x2d | |
#define RegSyncValue7 0x2e | |
#define RegSyncValue8 0x2f | |
#define RegPacketConfig1 0x30 | |
#define RegPacketConfig2 0x31 | |
#define RegPayloadLength 0x32 | |
#define RegNodeAdrs 0x33 | |
#define RegBroadcastAdrs 0x34 | |
#define RegFifoThresh 0x35 | |
#define RegSeqConfig1 0x36 | |
#define RegSeqConfig2 0x37 | |
#define RegTimerResol 0x38 | |
#define RegTimer1Coef 0x39 | |
#define RegTimer2Coef 0x3a | |
#define RegImageCal 0x3b | |
#define RegTemp 0x3c | |
#define RegLowBat 0x3d | |
#define RegIrqFlags1 0x3e | |
#define RegIrqFlags2 0x3f | |
#define RegDioMapping1 0x40 | |
#define RegDioMapping2 0x41 | |
#define RegVersion 0x42 | |
#define RegPllHop 0x44 | |
#define RegPaDac 0x4d | |
#define RegBitRateFrac 0x5d | |
/************************************** | |
*/ | |
unsigned char sx1276_7_8FreqTbl[1][3] = | |
{ | |
{0x6C, 0x80, 0x00}, //434MHz | |
}; | |
unsigned char sx1276_7_8PowerTbl[4] = | |
{ | |
0xFF, //20dbm | |
0xFC, //17dbm | |
0xF9, //14dbm | |
0xF6, //11dbm | |
}; | |
unsigned char sx1276_7_8SpreadFactorTbl[7] = | |
{ | |
6,7,8,9,10,11,12 | |
}; | |
unsigned char sx1276_7_8LoRaBwTbl[10] = | |
{ | |
//7.8KHz,10.4KHz,15.6KHz,20.8KHz,31.2KHz,41.7KHz,62.5KHz,125KHz,250KHz,500KHz | |
0,1,2,3,4,5,6,7,8,9 | |
}; | |
unsigned char sx1276_7_8Data[] = {"Mark1 Lora sx1276_7_8"}; | |
unsigned char RxData[64]; | |
void sx1276_7_8_Standby(void) | |
{ | |
SPIWrite(LR_RegOpMode,0x09); | |
//Standby//Low Frequency Mode | |
//SPIWrite(LR_RegOpMode,0x01); | |
//Standby//High Frequency Mode | |
} | |
void sx1276_7_8_Sleep(void) | |
{ | |
SPIWrite(LR_RegOpMode,0x08); //Sleep//Low Frequency Mode | |
//SPIWrite(LR_RegOpMode,0x00); | |
//Sleep//High Frequency Mode | |
} | |
void sx1276_7_8_EntryLoRa(void) | |
{ | |
SPIWrite(LR_RegOpMode,0x88);//Low Frequency Mode | |
//SPIWrite(LR_RegOpMode,0x80);//High Frequency Mode | |
} | |
void sx1276_7_8_LoRaClearIrq(void) | |
{ | |
SPIWrite(LR_RegIrqFlags,0xFF); | |
} | |
unsigned char sx1276_7_8_LoRaEntryRx(void) | |
{ | |
unsigned char addr; | |
sx1276_7_8_Config(); //setting base parameter | |
SPIWrite(REG_LR_PADAC,0x84); //Normal and Rx | |
SPIWrite(LR_RegHopPeriod,0xFF); //RegHopPeriod NO FHSS | |
SPIWrite(REG_LR_DIOMAPPING1,0x01); //DIO0=00, DIO1=00, DIO2=00, DIO3=01 | |
SPIWrite(LR_RegIrqFlagsMask,0x3F); //Open RxDone interrupt & Timeout | |
sx1276_7_8_LoRaClearIrq(); | |
SPIWrite(LR_RegPayloadLength,21); //RegPayloadLength 21byte(this register must difine when the data long of one byte in SF is 6) | |
addr = SPIRead(LR_RegFifoRxBaseAddr); //Read RxBaseAddr | |
SPIWrite(LR_RegFifoAddrPtr,addr); //RxBaseAddr ->FiFoAddrPtr | |
SPIWrite(LR_RegOpMode,0x8d); //Continuous Rx Mode//Low Frequency Mode | |
//SPIWrite(LR_RegOpMode,0x05); //Continuous Rx Mode//High Frequency Mode | |
//SysTime = 0; | |
while(1) | |
{ | |
if((SPIRead(LR_RegModemStat)&0x04)==0x04) //Rx-on going RegModemStat | |
break; | |
/*if(SysTime>=3) | |
return 0; //over time for | |
error*/ | |
} | |
} | |
unsigned char sx1276_7_8_LoRaRxPacket(void) | |
{ | |
unsigned char i; | |
unsigned char addr; | |
unsigned char packet_size; | |
if(digitalRead(dio0))//if(Get_NIRQ()) | |
{ | |
for(i=0;i<32;i++) | |
RxData[i] = 0x00; | |
addr = SPIRead(LR_RegFifoRxCurrentaddr); //last packet addr | |
SPIWrite(LR_RegFifoAddrPtr,addr); //RxBaseAddr ->FiFoAddrPtr | |
if(sx1276_7_8SpreadFactorTbl[Lora_Rate_Sel]==6) //When SpreadFactor is six,will use Implicit Header mode(Excluding internal packet length) | |
packet_size=21; | |
else | |
packet_size = SPIRead(LR_RegRxNbBytes); //Number for received bytes | |
SPIBurstRead(0x00, RxData, packet_size); | |
sx1276_7_8_LoRaClearIrq(); | |
for(i=0;i<17;i++) | |
{ | |
if(RxData[i]!=sx1276_7_8Data[i]) | |
break; | |
} | |
if(i>=17) //Rx success | |
return(1); | |
else | |
return(0); | |
} | |
else | |
return(0); | |
} | |
unsigned char sx1276_7_8_LoRaReadRSSI(void) | |
{ | |
unsigned int temp=10; | |
temp=SPIRead(LR_RegRssiValue); //Read RegRssiValue,Rssi value | |
temp=temp+127-137; //127:Max RSSI,137:RSSI offset | |
return (unsigned char)temp; | |
} | |
unsigned char sx1276_7_8_LoRaEntryTx(void) | |
{ | |
unsigned char addr,temp; | |
sx1276_7_8_Config(); //setting baseparameter | |
SPIWrite(REG_LR_PADAC,0x87); //Tx for 20dBm | |
SPIWrite(LR_RegHopPeriod,0x00); //RegHopPeriodNO FHSS | |
SPIWrite(REG_LR_DIOMAPPING1,0x41); //DIO0=01, DIO1=00,DIO2=00, DIO3=01 | |
sx1276_7_8_LoRaClearIrq(); | |
SPIWrite(LR_RegIrqFlagsMask,0xF7); //Open TxDoneinterrupt | |
SPIWrite(LR_RegPayloadLength,21); //RegPayloadLength21byte | |
addr = SPIRead(LR_RegFifoTxBaseAddr); //RegFiFoTxBaseAddr | |
SPIWrite(LR_RegFifoAddrPtr,addr); //RegFifoAddrPtr | |
//SysTime = 0; | |
while(1) | |
{ | |
temp=SPIRead(LR_RegPayloadLength); | |
if(temp==21) | |
{ | |
break; | |
} | |
/*if(SysTime>=3) | |
return 0;*/ | |
} | |
} | |
unsigned char sx1276_7_8_LoRaTxPacket(void) | |
{ | |
unsigned char TxFlag=0; | |
unsigned char addr; | |
BurstWrite(0x00, (unsigned char *)sx1276_7_8Data, 21); | |
SPIWrite(LR_RegOpMode,0x8b); //Tx Mode | |
while(1) | |
{ | |
if(digitalRead(dio0))//if(Get_NIRQ()) //Packet send over | |
{ | |
SPIRead(LR_RegIrqFlags); | |
sx1276_7_8_LoRaClearIrq(); //Clear irq | |
sx1276_7_8_Standby(); //Entry Standbymode | |
break; | |
} | |
} | |
} | |
unsigned char sx1276_7_8_ReadRSSI(void) | |
{ | |
unsigned char temp=0xff; | |
temp=SPIRead(0x11); | |
temp>>=1; | |
temp=127-temp; //127:Max RSSI | |
return temp; | |
} | |
void sx1276_7_8_Config(void) | |
{ | |
unsigned char i; | |
sx1276_7_8_Sleep(); //Change modem mode Must in Sleep mode | |
for(i=250;i!=0;i--); //Delay | |
delay(15); | |
//lora mode | |
sx1276_7_8_EntryLoRa(); | |
//SPIWrite(0x5904); //?? Change digital regulator form 1.6V to 1.47V: see erratanote | |
BurstWrite(LR_RegFrMsb,sx1276_7_8FreqTbl[Freq_Sel],3); //setting frequency parameter | |
//setting base parameter | |
SPIWrite(LR_RegPaConfig,sx1276_7_8PowerTbl[Power_Sel]); //Settingoutput power parameter | |
SPIWrite(LR_RegOcp,0x0B); //RegOcp,Close Ocp | |
SPIWrite(LR_RegLna,0x23); //RegLNA,High & LNA Enable | |
if(sx1276_7_8SpreadFactorTbl[Lora_Rate_Sel]==6) //SFactor=6 | |
{ | |
unsigned char tmp; | |
SPIWrite(LR_RegModemConfig1,((sx1276_7_8LoRaBwTbl[BandWide_Sel]<<4)+(CR<<1)+0x01));//Implicit Enable CRC Enable(0x02) & Error Coding rate 4/5(0x01), 4/6(0x02),4/7(0x03), 4/8(0x04) | |
SPIWrite(LR_RegModemConfig2,((sx1276_7_8SpreadFactorTbl[Lora_Rate_Sel]<<4)+(CRC<<2)+0x03)); | |
tmp = SPIRead(0x31); | |
tmp &= 0xF8; | |
tmp |= 0x05; | |
SPIWrite(0x31,tmp); | |
SPIWrite(0x37,0x0C); | |
} | |
else | |
{ | |
SPIWrite(LR_RegModemConfig1,((sx1276_7_8LoRaBwTbl[BandWide_Sel]<<4)+(CR<<1)+0x00));//Explicit Enable CRC Enable(0x02) & Error Coding rate 4/5(0x01), 4/6(0x02),4/7(0x03), 4/8(0x04) | |
SPIWrite(LR_RegModemConfig2,((sx1276_7_8SpreadFactorTbl[Lora_Rate_Sel]<<4)+(CRC<<2)+0x03)); //SFactor & LNA gain set by the internal AGC loop | |
} | |
SPIWrite(LR_RegSymbTimeoutLsb,0xFF); //RegSymbTimeoutLsbTimeout = 0x3FF(Max) | |
SPIWrite(LR_RegPreambleMsb,0x00); //RegPreambleMsb | |
SPIWrite(LR_RegPreambleLsb,12); //RegPreambleLsb8+4=12byte Preamble | |
SPIWrite(REG_LR_DIOMAPPING2,0x01); //RegDioMapping2DIO5=00, DIO4=01 | |
sx1276_7_8_Standby(); //Entry standby mode | |
} | |
void setup() { | |
// put your setup code here, to run once: | |
pinMode(led, OUTPUT); | |
pinMode(nsel, OUTPUT); | |
pinMode(sck, OUTPUT); | |
pinMode(mosi, OUTPUT); | |
pinMode(miso, INPUT); | |
pinMode(reset, OUTPUT); | |
pinMode(dio0, INPUT); | |
digitalWrite(reset, HIGH); | |
Serial.begin(9600); | |
delay(5000) ; | |
} | |
void loop() { | |
// put your main code here, to run repeatedly: | |
mode = 0x01;//lora mode | |
Freq_Sel = 0x00;//433M | |
Power_Sel = 0x00;// | |
Lora_Rate_Sel = 0x06;// | |
BandWide_Sel = 0x07; | |
Fsk_Rate_Sel = 0x00; | |
Serial.println("loop in"); | |
sx1276_7_8_Config();// | |
Serial.println("sx1276_7_8_Config"); | |
sx1276_7_8_LoRaEntryRx(); | |
Serial.println("sx1276_7_8_LoRaEntryRx"); | |
while(1) { | |
//Master | |
/*digitalWrite(led, HIGH); | |
sx1276_7_8_LoRaEntryTx(); | |
sx1276_7_8_LoRaTxPacket(); | |
digitalWrite(led, LOW); // turn the LED on (HIGH is the voltage level) | |
sx1276_7_8_LoRaEntryRx(); | |
delay(2000);*/ | |
/* if(sx1276_7_8_LoRaRxPacket()) | |
{ | |
digitalWrite(led, HIGH); | |
delay(500); | |
digitalWrite(led, LOW); | |
delay(500); | |
}*/ | |
// turn the LED on (HIGH is the voltage level) | |
// turn the LED on (HIGH is the voltage level) | |
//slaver | |
// Serial.print("-"); | |
if(sx1276_7_8_LoRaRxPacket()) | |
{ | |
Serial.println("."); | |
digitalWrite(led, HIGH); | |
delay(500); | |
digitalWrite(led, LOW); | |
delay(500); | |
sx1276_7_8_LoRaEntryRx(); | |
/*digitalWrite(led, HIGH); | |
// turn the LED on (HIGH is the voltage level) | |
// wait for a second | |
// turn the LED on (HIGH is the voltage level) | |
// wait for a second | |
// turn the LED on (HIGH is the voltage level) | |
sx1276_7_8_LoRaEntryTx(); | |
sx1276_7_8_LoRaTxPacket(); | |
digitalWrite(led, LOW); // turn the LED on (HIGH is the voltage level)* | |
sx1276_7_8_LoRaEntryRx();*/ | |
} | |
} | |
} | |
Hi, I'm trying to send data over LoRa from Arduino to Arduino and I have some problems.
I did start off with the 'same' code from somebody else but managed to fix it with your code.
My problem is that not all of my messages are coming through, do you have any issues with missing messages?
Greetings,
Mathieu
Hi, can you explain me how did you calcilate the value for RSSI ?
what is this Max RSSI? MaxRSSI = 127
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https://gist.github.com/seongyooncho/48fa588f73dea5a32ba8