FPGA division

gistfile1.txt

                 QUOTIENT
            |============
     DIVISOR|0000DIVIDEND
             SUBTRAHEND00
     
In this example the divident is 8 bits and the divisor is 4 bits. X's are placeholder zeros.
     
     
        xxxxxxxx
    |===========           
1001|00010011111          
     10010000000 => dividend < subtrahend, so write zero to LSB of quotient and shift both.
     
        xxxxxxx0
    |===========           
1001|00010011111          
     01001000000 => dividend < subtrahend, so write zero to LSB of quotient and shift both.
     
        xxxxxx00
    |===========           
1001|00010011111          
     00100100000 => dividend < subtrahend, so write zero to LSB of quotient and shift both.

        xxxxx000
    |===========           
1001|00010011111          
     00010010000 => Dividend >= subtrahend, so write 1 to LSB of quotient, subtract, and shift both.

        xxxx0001
    |===========           
1001|00000001111          
     00001001000 => dividend < subtrahend, so write zero to LSB of quotient and shift both.
     
=== This continues for some time...

        x0001000
    |===========           
1001|00000001111          
     00000001001 => Dividend >= subtrahend, so write 1 to LSB of quotient. This is the last time we're doing this, and now we have the remainder available in the dividend:

                 QUOTIENT
            |============
     DIVISOR|000REMAINDER

     
        00010001
    |===========           
1001|00000000110