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dsebastian-arista/csig_l3_host_qinq.run.2026-07-10.txt

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csig_l3_host_qinq.run.2026-07-10.txt
Test: csig_l3_host_qinq
Date: Fri Jul 10 10:28:56 AM UTC 2026
FPGA_VERSION: 106.1
Bit: /persist2/releases/hw.pp.rel106.1/hello_pp-vpk180-rel106.1.pdi
========================================
=== FPGA PROGRAMMING (version 106.1)
========================================
# ------------------------------------------------------------------------------
# Maggie testing application
# - FPGA Programming In Progress : /persist2/releases/hw.pp.rel106.1/hello_pp-vpk180-rel106.1.pdi
# - FPGA Programming Complete
# - IIC : Port opened on ftdi://ftdi:4232:P1ABSDE36/2 to DEVICEID 0x58 at 1000.0kHz
# - PCIE : Port opened on 0000:21:00.0
# - QSPI : Detected Micron manufacturer ID: 0x20 Device ID: 0xbb21
# - UART : Port opened on ftdi://ftdi:4232:P1ABSDE36/3 at 115200 baud
FPGA programmed OK (78s)
========================================
=== TEST RUN
========================================
[run_tests] run tmpdir: /tmp/platform-test_jtdz01pp
[run_tests] cpus=24 sem limits: SEMMSL=32000 SEMMNS=1024000000 SEMOPM=500 SEMMNI=32000
PYTHONPATH=/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test:/home/dsebastian/workspace/aif/platform-test/prebuilt:/home/dsebastian/workspace/aif/platform-test:/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/install/python:/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/paris-driver/src/Common/testlib:/home/dsebastian/workspace/aif/platform-test/prebuilt/gen-py/aswitch:/home/dsebastian/workspace/aif/platform-test/prebuilt/gen-py/bm_runtime:/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/submodules/behavioral-model/targets/a1na_switch:/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/submodules/behavioral-model/tools
LD_LIBRARY_PATH=/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/install/lib
A1_PLATFORM=fpga
A1_SYS_SW_PATH=/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw
A1NA_SWITCH=/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/submodules/behavioral-model/build-p4p/targets/a1na_switch/a1na_switch
ASAN_OPTIONS=verify_asan_link_order=0:detect_leaks=0:intercept_throw=0
CRYPTOGRAPHY_OPENSSL_NO_LEGACY=1
[csig_l3_host_qinq.py] [devicelib] PRISM_SHM_ROOT=/tmp/platform-test_jtdz01pp/csig_l3_host_qinq.py/prism pid=1069380
[csig_l3_host_qinq.py]
[csig_l3_host_qinq.py] --- SDK version ---
[csig_l3_host_qinq.py] {"a1-silicon": "a1_main_regr_07_03_26_v1", "p4-programs-build": "a2pp-2026-0619", "platform": "fpga"}
[csig_l3_host_qinq.py]
[csig_l3_host_qinq.py]
[csig_l3_host_qinq.py] --- Kernel module setup ---
[csig_l3_host_qinq.py] Found FPGA at 0000:21:00.0
[csig_l3_host_qinq.py] Loading /home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/build/paris-driver/src/KernelModule/paris_dev.ko ...
[csig_l3_host_qinq.py] 0000:21:00.0 already bound
[csig_l3_host_qinq.py] /dev/paris_main ready
[csig_l3_host_qinq.py]
[csig_l3_host_qinq.py] --- Creating HwPcie + Ham ---
[csig_l3_host_qinq.py] HwPcie + Ham created (BAR size=0x8000000)
[csig_l3_host_qinq.py]
[csig_l3_host_qinq.py] --- FPGA version ---
[csig_l3_host_qinq.py] {"PROJECT": "hello_pp-vpk180", "ARISTA_FDK_VERSION": "3.1.1", "BUILD_VERSION": "106.1", "PP_VERSION": "C41", "PP_FILENAME": "a2pp-2026-0629/ppu_top-0702a.svm", "AIFABRICS_HASH": "c940ed75122742f487e56fbabba6efdf8761432b", "FPGAEMU_HASH": "dfed8809adc05913c2e66fd2ca18176aa840b1bb", "TIMESTAMP": "2026-07-10 01:50:04 UTC"}
[csig_l3_host_qinq.py] WARNING: FPGA/SDK p4-programs-build version mismatch -- may not work as intended
[csig_l3_host_qinq.py] FPGA PP_VERSION: C41
[csig_l3_host_qinq.py] SDK p4-programs-build: a2pp-2026-0619
[csig_l3_host_qinq.py]
[csig_l3_host_qinq.py] --- ILDMA channel reset ---
[csig_l3_host_qinq.py] ctrl=0x00000001 intr=0x00000000 fsm=0x00000000
[csig_l3_host_qinq.py] [parserValueSetAdd] SwitchIngressParser.tpidCSIGCompact: set compact=0x0901 wide=0x0000 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=0 csig64=0x0000
[csig_l3_host_qinq.py] [parserValueSetAdd] SwitchEgressParser.tpidDecapCSIGCompact: set compact=0x0901 wide=0x0000 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=0 csig64=0x0000
[csig_l3_host_qinq.py] [parserValueSetAdd] SwitchEgressParser.tpidCSIGCompact: set compact=0x0901 wide=0x0000 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=0 csig64=0x0000
[csig_l3_host_qinq.py] [parserValueSetAdd] SwitchIngressParser.tpidCSIGWide: set compact=0x0901 wide=0x0902 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=1 csig64=0x0902
[csig_l3_host_qinq.py] [parserValueSetAdd] SwitchEgressParser.tpidDecapCSIGWide: set compact=0x0901 wide=0x0902 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=1 csig64=0x0902
[csig_l3_host_qinq.py] [parserValueSetAdd] SwitchEgressParser.tpidCSIGWide: set compact=0x0901 wide=0x0902 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=1 csig64=0x0902
[csig_l3_host_qinq.py] Sent forwardCsig
[csig_l3_host_qinq.py] [03:31:33.695] dev:0 port:2 sending packet
[csig_l3_host_qinq.py] [pktgen] pre-send emrg=0 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] post-send ctrl=0xffffffff emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] emrg[0]: portId=1 err=0 discard=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm: eport=1 c2cpu=0 mirror=0 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0
[csig_l3_host_qinq.py] [pktgen] counts: emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] emrg[0]: portId=1 err=0 discard=0 new_len=178 bcntBytes=0 bcntPort=0 bcntErr=0
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0000 00 00 08 00 40 00 00 00 00 00 16 56 00 00 00 00 ....@......V....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0070 00 00 00 00 00 00 00 00 80 00 00 00 0C D9 4C D9 ..............L.
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0080 8C D8 CC D9 4C D8 4C D8 CC CE 0C CE 4C CD 8C CD ....L.L.....L...
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0090 CC CD 0C CD 4C CC 8C CC 8C CC 0C CC 0C 99 4C 99 ....L.........L.
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00a0 8C 98 CC 99 4C 98 4C 98 CC 8E 0C 8E 4C 8D 8C 8D ....L.L.....L...
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00b0 CC 8D 0C 8D 4C 8C 8C 8C 8C 8C 0C 8C 0C 59 4C 59 ....L........YLY
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00c0 8C 58 CC 59 4C 58 4C 58 CC 4E 0C 4E 4C 4D 8C 4D .X.YLXLX.N.NLM.M
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00d0 CC 4D 0C 4D 4C 4C 8C 4C 8C 4C 0C 4C 0C 19 4C 19 .M.MLL.L.L.L..L.
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00e0 8C 18 CC 19 4C 18 4C 18 CC 0E 0C 0E 4C 0D 8C 0D ....L.L.....L...
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00f0 CC 0D 0C 0D 4C 0C 8C 0C 0C 0C 0C 0C 40 40 80 C1 ....L.......@@..
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0100 40 40 40 40 0F C0 1D 2D 00 00 40 00 11 6B 40 25 @@@@...-..@..k@%
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0110 40 00 02 00 00 4B 02 40 00 32 20 40 95 0C A0 40 @....K.@.2 @...@
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0120 77 2E A6 1D 51 0C C8 84 00 01 00 15 w...Q.......
[csig_l3_host_qinq.py] [pktgen] mhe[0]: port=1 bcnt=174 eop=1 err=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea: inport=2 dmac=00:55:44:33:22:11 l2dom=2000 routed=1 nh=0x0064 vlan0=1 vlan1=1 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 csigcmp=1 csigwide=0 csig_type=1 csig_wf=0 csig_inv=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm: eport=1 pkt_len=178 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingress_timestamp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_ingressport: 2
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea decaplen: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_cpureasoncode: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_decaptype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_dmac: '00:55:44:33:22:11'
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_egrl2domain: 2000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_encaptype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_ingressporttype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_routed: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea hashmd_lag: 41528
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea icos: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmd_ingl2domain: 1000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea phase0_switchport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_cfi: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_cos: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_exp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_ecn: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_dscp: 43
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea tunnelidx: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea tunnell2idx: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6dipshift: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6blocksize: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6updatedipfromsrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6updatesrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6popsrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdsrcport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmddstport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdprotocol: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdl4attr: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea iecookie0: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea iecookie1: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingl2aintf: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrl2aintf: 2048
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea nh: 100
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_type: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_wide_format: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_invalid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ect: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea trimmable: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea localtrimming: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea earlyqdiscardeligible: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea l1_prun_id: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_mplsttlmode: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ptp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flowlet_disabled: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea mirrormgid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_outer_toomanyhdr: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_vlan0: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_vlan1: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_csigwide: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_csigcompact: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_mpls: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_ip4: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_ip6: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_udp_vxlan: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ip_udp_payload_offset: 23
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c0_eop: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c0_eport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm spdd_trace_tag: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm bts: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm csig_val: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm src_port: 2
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm eport: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm ce: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm ct: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c2cpu: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm mirror: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm dod: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_copy: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_id: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_id_first: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm pipe_qid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm pkt_length: 178
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm trimmed: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm sch_tag_id: 0
[csig_l3_host_qinq.py] Sent stripCsig
[csig_l3_host_qinq.py] [03:31:33.734] dev:0 port:2 sending packet
[csig_l3_host_qinq.py] [pktgen] pre-send emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] post-send ctrl=0xffffffff emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] emrg[0]: portId=1 err=0 discard=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm: eport=1 c2cpu=0 mirror=0 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0
[csig_l3_host_qinq.py] [pktgen] counts: emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] emrg[0]: portId=1 err=0 discard=0 new_len=174 bcntBytes=0 bcntPort=0 bcntErr=0
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0000 00 00 04 FC 5F FF 00 00 00 00 15 D6 00 00 00 00 ...._...........
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0070 00 00 00 00 00 00 00 00 00 00 00 00 80 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0080 0C D9 4C D9 8C D8 CC D9 4C D8 4C D8 CC CE 0C CE ..L.....L.L.....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0090 4C CD 8C CD CC CD 0C CD 4C CC 8C CC 8C CC 0C CC L.......L.......
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00a0 0C 99 4C 99 8C 98 CC 99 4C 98 4C 98 CC 8E 0C 8E ..L.....L.L.....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00b0 4C 8D 8C 8D CC 8D 0C 8D 4C 8C 8C 8C 8C 8C 0C 8C L.......L.......
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00c0 0C 59 4C 59 8C 58 CC 59 4C 58 4C 58 CC 4E 0C 4E .YLY.X.YLXLX.N.N
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00d0 4C 4D 8C 4D CC 4D 0C 4D 4C 4C 8C 4C 8C 4C 0C 4C LM.M.M.MLL.L.L.L
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00e0 0C 19 4C 19 8C 18 CC 19 4C 18 4C 18 CC 0E 0C 0E ..L.....L.L.....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00f0 4C 0D 8C 0D CC 0D 0C 0D 4C 0C 8C 0C 0C 0C 0C 0C L.......L.......
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0100 40 40 80 C1 40 40 40 40 0F C0 1D 2D 00 00 40 00 @@..@@@@...-..@.
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0110 11 6B 40 25 00 4B 02 00 00 32 20 40 95 0C A0 40 .k@%.K...2 @...@
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0120 77 2E A6 1D 51 0C C8 84 00 01 00 15 w...Q.......
[csig_l3_host_qinq.py] [pktgen] mhe[0]: port=1 bcnt=174 eop=1 err=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea: inport=2 dmac=00:55:44:33:22:11 l2dom=2000 routed=1 nh=0x0064 vlan0=1 vlan1=1 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 csigcmp=1 csigwide=0 csig_type=1 csig_wf=0 csig_inv=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm: eport=1 pkt_len=178 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingress_timestamp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_ingressport: 2
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea decaplen: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_cpureasoncode: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_decaptype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_dmac: '00:55:44:33:22:11'
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_egrl2domain: 2000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_encaptype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_ingressporttype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_routed: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea hashmd_lag: 41528
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea icos: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmd_ingl2domain: 1000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea phase0_switchport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_cfi: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_cos: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_exp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_ecn: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_dscp: 43
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea tunnelidx: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea tunnell2idx: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6dipshift: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6blocksize: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6updatedipfromsrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6updatesrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6popsrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdsrcport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmddstport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdprotocol: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdl4attr: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea iecookie0: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea iecookie1: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingl2aintf: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrl2aintf: 2048
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea nh: 100
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_type: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_wide_format: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_invalid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ect: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea trimmable: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea localtrimming: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea earlyqdiscardeligible: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea l1_prun_id: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_mplsttlmode: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ptp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flowlet_disabled: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea mirrormgid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_outer_toomanyhdr: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_vlan0: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_vlan1: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_csigwide: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_csigcompact: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_mpls: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_ip4: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_ip6: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_udp_vxlan: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ip_udp_payload_offset: 23
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c0_eop: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c0_eport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm spdd_trace_tag: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm bts: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm csig_val: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm src_port: 2
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm eport: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm ce: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm ct: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c2cpu: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm mirror: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm dod: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_copy: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_id: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_id_first: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm pipe_qid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm pkt_length: 178
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm trimmed: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm sch_tag_id: 0
[csig_l3_host_qinq.py] Sent encapCsig
[csig_l3_host_qinq.py] [03:31:34.063] dev:0 port:2 sending packet
[csig_l3_host_qinq.py] [pktgen] pre-send emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] post-send ctrl=0xffffffff emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] emrg[0]: portId=1 err=0 discard=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm: eport=1 c2cpu=0 mirror=0 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0
[csig_l3_host_qinq.py] [pktgen] counts: emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] emrg[0]: portId=1 err=0 discard=0 new_len=174 bcntBytes=0 bcntPort=0 bcntErr=0
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0000 00 00 04 FC 5F FF 00 00 00 00 15 D6 00 00 00 00 ...._...........
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0070 00 00 00 00 00 00 00 00 00 00 00 00 80 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0080 0C D9 4C D9 8C D8 CC D9 4C D8 4C D8 CC CE 0C CE ..L.....L.L.....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0090 4C CD 8C CD CC CD 0C CD 4C CC 8C CC 8C CC 0C CC L.......L.......
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00a0 0C 99 4C 99 8C 98 CC 99 4C 98 4C 98 CC 8E 0C 8E ..L.....L.L.....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00b0 4C 8D 8C 8D CC 8D 0C 8D 4C 8C 8C 8C 8C 8C 0C 8C L.......L.......
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00c0 0C 59 4C 59 8C 58 CC 59 4C 58 4C 58 CC 4E 0C 4E .YLY.X.YLXLX.N.N
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00d0 4C 4D 8C 4D CC 4D 0C 4D 4C 4C 8C 4C 8C 4C 0C 4C LM.M.M.MLL.L.L.L
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00e0 0C 19 4C 19 8C 18 CC 19 4C 18 4C 18 CC 0E 0C 0E ..L.....L.L.....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00f0 4C 0D 8C 0D CC 0D 0C 0D 4C 0C 8C 0C 0C 0C 0C 0C L.......L.......
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0100 40 40 80 C1 40 40 40 40 0F C0 1D 2D 00 00 40 00 @@..@@@@...-..@.
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0110 11 6B 40 25 00 4B 02 00 00 32 20 40 95 0C A0 40 .k@%.K...2 @...@
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0120 77 2E A6 1D 51 0C C8 84 00 01 00 15 w...Q.......
[csig_l3_host_qinq.py] [pktgen] mhe[0]: port=1 bcnt=174 eop=1 err=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea: inport=2 dmac=00:55:44:33:22:11 l2dom=2000 routed=1 nh=0x0064 vlan0=1 vlan1=1 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 csigcmp=1 csigwide=0 csig_type=1 csig_wf=0 csig_inv=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm: eport=1 pkt_len=178 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingress_timestamp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_ingressport: 2
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea decaplen: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_cpureasoncode: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_decaptype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_dmac: '00:55:44:33:22:11'
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_egrl2domain: 2000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_encaptype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_ingressporttype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_routed: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea hashmd_lag: 41528
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea icos: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmd_ingl2domain: 1000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea phase0_switchport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_cfi: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_cos: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_exp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_ecn: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_dscp: 43
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea tunnelidx: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea tunnell2idx: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6dipshift: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6blocksize: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6updatedipfromsrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6updatesrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6popsrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdsrcport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmddstport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdprotocol: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdl4attr: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea iecookie0: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea iecookie1: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingl2aintf: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrl2aintf: 2048
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea nh: 100
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_type: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_wide_format: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_invalid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ect: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea trimmable: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea localtrimming: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea earlyqdiscardeligible: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea l1_prun_id: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_mplsttlmode: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ptp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flowlet_disabled: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea mirrormgid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_outer_toomanyhdr: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_vlan0: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_vlan1: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_csigwide: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_csigcompact: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_mpls: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_ip4: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_ip6: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_udp_vxlan: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ip_udp_payload_offset: 23
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c0_eop: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c0_eport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm spdd_trace_tag: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm bts: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm csig_val: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm src_port: 2
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm eport: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm ce: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm ct: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c2cpu: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm mirror: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm dod: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_copy: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_id: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_id_first: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm pipe_qid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm pkt_length: 178
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm trimmed: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm sch_tag_id: 0
[csig_l3_host_qinq.py] Sent forwardCsig
[csig_l3_host_qinq.py] [03:31:34.408] dev:0 port:2 sending packet
[csig_l3_host_qinq.py] [pktgen] pre-send emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] post-send ctrl=0xffffffff emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] emrg[0]: portId=1 err=0 discard=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm: eport=1 c2cpu=0 mirror=0 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0
[csig_l3_host_qinq.py] [pktgen] counts: emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] emrg[0]: portId=1 err=0 discard=0 new_len=182 bcntBytes=0 bcntPort=0 bcntErr=0
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0000 00 00 08 00 C0 00 00 00 00 00 16 D6 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0070 00 00 00 00 80 00 00 00 0C D9 4C D9 8C D8 CC D9 ..........L.....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0080 4C D8 4C D8 CC CE 0C CE 4C CD 8C CD CC CD 0C CD L.L.....L.......
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0090 4C CC 8C CC 8C CC 0C CC 0C 99 4C 99 8C 98 CC 99 L.........L.....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00a0 4C 98 4C 98 CC 8E 0C 8E 4C 8D 8C 8D CC 8D 0C 8D L.L.....L.......
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00b0 4C 8C 8C 8C 8C 8C 0C 8C 0C 59 4C 59 8C 58 CC 59 L........YLY.X.Y
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00c0 4C 58 4C 58 CC 4E 0C 4E 4C 4D 8C 4D CC 4D 0C 4D LXLX.N.NLM.M.M.M
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00d0 4C 4C 8C 4C 8C 4C 0C 4C 0C 19 4C 19 8C 18 CC 19 LL.L.L.L..L.....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00e0 4C 18 4C 18 CC 0E 0C 0E 4C 0D 8C 0D CC 0D 0C 0D L.L.....L.......
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00f0 4C 0C 8C 0C 0C 0C 0C 0C 40 40 80 C1 40 40 40 40 L.......@@..@@@@
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0100 0F C0 1D 2D 00 00 40 00 11 6B 40 25 00 00 02 00 ...-..@..k@%....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0110 80 00 00 00 00 4B 02 40 00 32 20 40 95 0C A0 40 .....K.@.2 @...@
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0120 77 2E A6 1D 51 0C C8 84 00 01 00 15 w...Q.......
[csig_l3_host_qinq.py] [pktgen] mhe[0]: port=1 bcnt=178 eop=1 err=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea: inport=2 dmac=00:55:44:33:22:11 l2dom=2000 routed=1 nh=0x0064 vlan0=1 vlan1=1 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 csigcmp=0 csigwide=1 csig_type=1 csig_wf=1 csig_inv=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm: eport=1 pkt_len=182 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingress_timestamp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_ingressport: 2
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea decaplen: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_cpureasoncode: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_decaptype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_dmac: '00:55:44:33:22:11'
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_egrl2domain: 2000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_encaptype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_ingressporttype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_routed: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea hashmd_lag: 41528
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea icos: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmd_ingl2domain: 1000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea phase0_switchport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_cfi: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_cos: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_exp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_ecn: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_dscp: 43
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea tunnelidx: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea tunnell2idx: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6dipshift: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6blocksize: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6updatedipfromsrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6updatesrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6popsrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdsrcport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmddstport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdprotocol: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdl4attr: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea iecookie0: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea iecookie1: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingl2aintf: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrl2aintf: 2048
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea nh: 100
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_type: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_wide_format: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_invalid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ect: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea trimmable: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea localtrimming: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea earlyqdiscardeligible: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea l1_prun_id: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_mplsttlmode: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ptp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flowlet_disabled: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea mirrormgid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_outer_toomanyhdr: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_vlan0: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_vlan1: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_csigwide: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_csigcompact: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_mpls: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_ip4: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_ip6: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_udp_vxlan: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ip_udp_payload_offset: 25
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c0_eop: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c0_eport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm spdd_trace_tag: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm bts: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm csig_val: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm src_port: 2
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm eport: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm ce: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm ct: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c2cpu: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm mirror: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm dod: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_copy: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_id: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_id_first: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm pipe_qid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm pkt_length: 182
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm trimmed: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm sch_tag_id: 0
[csig_l3_host_qinq.py] Sent stripCsig
[csig_l3_host_qinq.py] [03:31:34.423] dev:0 port:2 sending packet
[csig_l3_host_qinq.py] [pktgen] pre-send emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] post-send ctrl=0xffffffff emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] emrg[0]: portId=1 err=0 discard=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm: eport=1 c2cpu=0 mirror=0 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0
[csig_l3_host_qinq.py] [pktgen] counts: emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] emrg[0]: portId=1 err=0 discard=0 new_len=174 bcntBytes=0 bcntPort=0 bcntErr=0
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0000 00 00 00 F8 DF FE 00 00 00 00 15 D6 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0070 00 00 00 00 00 00 00 00 00 00 00 00 80 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0080 0C D9 4C D9 8C D8 CC D9 4C D8 4C D8 CC CE 0C CE ..L.....L.L.....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0090 4C CD 8C CD CC CD 0C CD 4C CC 8C CC 8C CC 0C CC L.......L.......
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00a0 0C 99 4C 99 8C 98 CC 99 4C 98 4C 98 CC 8E 0C 8E ..L.....L.L.....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00b0 4C 8D 8C 8D CC 8D 0C 8D 4C 8C 8C 8C 8C 8C 0C 8C L.......L.......
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00c0 0C 59 4C 59 8C 58 CC 59 4C 58 4C 58 CC 4E 0C 4E .YLY.X.YLXLX.N.N
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00d0 4C 4D 8C 4D CC 4D 0C 4D 4C 4C 8C 4C 8C 4C 0C 4C LM.M.M.MLL.L.L.L
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00e0 0C 19 4C 19 8C 18 CC 19 4C 18 4C 18 CC 0E 0C 0E ..L.....L.L.....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00f0 4C 0D 8C 0D CC 0D 0C 0D 4C 0C 8C 0C 0C 0C 0C 0C L.......L.......
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0100 40 40 80 C1 40 40 40 40 0F C0 1D 2D 00 00 40 00 @@..@@@@...-..@.
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0110 11 6B 40 25 00 4B 02 00 00 32 20 40 95 0C A0 40 .k@%.K...2 @...@
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0120 77 2E A6 1D 51 0C C8 84 00 01 00 15 w...Q.......
[csig_l3_host_qinq.py] [pktgen] mhe[0]: port=1 bcnt=178 eop=1 err=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea: inport=2 dmac=00:55:44:33:22:11 l2dom=2000 routed=1 nh=0x0064 vlan0=1 vlan1=1 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 csigcmp=0 csigwide=1 csig_type=1 csig_wf=1 csig_inv=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm: eport=1 pkt_len=182 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingress_timestamp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_ingressport: 2
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea decaplen: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_cpureasoncode: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_decaptype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_dmac: '00:55:44:33:22:11'
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_egrl2domain: 2000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_encaptype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_ingressporttype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_routed: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea hashmd_lag: 41528
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea icos: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmd_ingl2domain: 1000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea phase0_switchport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_cfi: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_cos: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_exp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_ecn: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_dscp: 43
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea tunnelidx: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea tunnell2idx: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6dipshift: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6blocksize: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6updatedipfromsrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6updatesrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6popsrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdsrcport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmddstport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdprotocol: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdl4attr: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea iecookie0: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea iecookie1: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingl2aintf: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrl2aintf: 2048
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea nh: 100
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_type: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_wide_format: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_invalid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ect: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea trimmable: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea localtrimming: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea earlyqdiscardeligible: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea l1_prun_id: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_mplsttlmode: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ptp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flowlet_disabled: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea mirrormgid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_outer_toomanyhdr: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_vlan0: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_vlan1: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_csigwide: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_csigcompact: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_mpls: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_ip4: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_ip6: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_udp_vxlan: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ip_udp_payload_offset: 25
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c0_eop: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c0_eport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm spdd_trace_tag: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm bts: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm csig_val: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm src_port: 2
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm eport: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm ce: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm ct: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c2cpu: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm mirror: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm dod: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_copy: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_id: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_id_first: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm pipe_qid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm pkt_length: 182
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm trimmed: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm sch_tag_id: 0
[csig_l3_host_qinq.py] Sent encapCsig
[csig_l3_host_qinq.py] [03:31:34.744] dev:0 port:2 sending packet
[csig_l3_host_qinq.py] [pktgen] pre-send emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] post-send ctrl=0xffffffff emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] emrg[0]: portId=1 err=0 discard=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm: eport=1 c2cpu=0 mirror=0 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0
[csig_l3_host_qinq.py] [pktgen] counts: emrg=1 mirr=0 bcnt=0
[csig_l3_host_qinq.py] [pktgen] emrg[0]: portId=1 err=0 discard=0 new_len=174 bcntBytes=0 bcntPort=0 bcntErr=0
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0000 00 00 00 F8 DF FE 00 00 00 00 15 D6 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0070 00 00 00 00 00 00 00 00 00 00 00 00 80 00 00 00 ................
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0080 0C D9 4C D9 8C D8 CC D9 4C D8 4C D8 CC CE 0C CE ..L.....L.L.....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0090 4C CD 8C CD CC CD 0C CD 4C CC 8C CC 8C CC 0C CC L.......L.......
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00a0 0C 99 4C 99 8C 98 CC 99 4C 98 4C 98 CC 8E 0C 8E ..L.....L.L.....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00b0 4C 8D 8C 8D CC 8D 0C 8D 4C 8C 8C 8C 8C 8C 0C 8C L.......L.......
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00c0 0C 59 4C 59 8C 58 CC 59 4C 58 4C 58 CC 4E 0C 4E .YLY.X.YLXLX.N.N
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00d0 4C 4D 8C 4D CC 4D 0C 4D 4C 4C 8C 4C 8C 4C 0C 4C LM.M.M.MLL.L.L.L
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00e0 0C 19 4C 19 8C 18 CC 19 4C 18 4C 18 CC 0E 0C 0E ..L.....L.L.....
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 00f0 4C 0D 8C 0D CC 0D 0C 0D 4C 0C 8C 0C 0C 0C 0C 0C L.......L.......
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0100 40 40 80 C1 40 40 40 40 0F C0 1D 2D 00 00 40 00 @@..@@@@...-..@.
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0110 11 6B 40 25 00 4B 02 00 00 32 20 40 95 0C A0 40 .k@%.K...2 @...@
[csig_l3_host_qinq.py] [pktgen] emrg[0] raw 0120 77 2E A6 1D 51 0C C8 84 00 01 00 15 w...Q.......
[csig_l3_host_qinq.py] [pktgen] mhe[0]: port=1 bcnt=178 eop=1 err=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea: inport=2 dmac=00:55:44:33:22:11 l2dom=2000 routed=1 nh=0x0064 vlan0=1 vlan1=1 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 csigcmp=0 csigwide=1 csig_type=1 csig_wf=1 csig_inv=0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm: eport=1 pkt_len=182 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingress_timestamp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_ingressport: 2
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea decaplen: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_cpureasoncode: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_decaptype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_dmac: '00:55:44:33:22:11'
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_egrl2domain: 2000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_encaptype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_ingressporttype: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_routed: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea hashmd_lag: 41528
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea icos: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmd_ingl2domain: 1000
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea phase0_switchport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_cfi: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_cos: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_exp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_ecn: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea qosmd_dscp: 43
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea tunnelidx: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea tunnell2idx: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6dipshift: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6blocksize: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6updatedipfromsrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6updatesrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea srv6popsrh: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdsrcport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmddstport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdprotocol: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingmdl4attr: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea iecookie0: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea iecookie1: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ingl2aintf: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrl2aintf: 2048
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea nh: 100
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_type: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_wide_format: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea csig_invalid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ect: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea trimmable: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea localtrimming: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea earlyqdiscardeligible: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea l1_prun_id: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea egrmd_mplsttlmode: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ptp: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flowlet_disabled: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea mirrormgid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_outer_toomanyhdr: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_vlan0: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_vlan1: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_csigwide: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_csigcompact: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_mpls: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_ip4: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_ip6: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea flag_ip_udp_vxlan: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] ia2ea ip_udp_payload_offset: 25
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c0_eop: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c0_eport: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm spdd_trace_tag: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm bts: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm csig_val: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm src_port: 2
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm eport: 1
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm ce: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm ct: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm c2cpu: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm mirror: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm dod: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_copy: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_id: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm repl_id_first: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm pipe_qid: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm pkt_length: 182
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm trimmed: 0
[csig_l3_host_qinq.py] [pktgen] mhe[0] tm sch_tag_id: 0
[csig_l3_host_qinq.py] WARNING: rmmod failed: rmmod: ERROR: Module paris_dev is in use
[csig_l3_host_qinq.py] ╭──────────────────────────────── Shadow Validation ────────────────────────────────╮
[csig_l3_host_qinq.py] │ validate: 4007/4007 PASS 0 MISMATCH 0 ERR │
[csig_l3_host_qinq.py] │ (log: /tmp/platform-test_jtdz01pp/csig_l3_host_qinq.py/shadow_validation.txt) │
[csig_l3_host_qinq.py] │ │
[csig_l3_host_qinq.py] │ Table rows PASS FAIL ERR │
[csig_l3_host_qinq.py] │ cpuAndMirrorPacketEncap 8 8 0 0 │
[csig_l3_host_qinq.py] │ cpuReasonCodeToCpuQidIcos 26 26 0 0 │
[csig_l3_host_qinq.py] │ csigIngressExtract 30 30 0 0 │
[csig_l3_host_qinq.py] │ csigNormalizeValues 30 30 0 0 │
[csig_l3_host_qinq.py] │ csigPortCheck 1 1 0 0 │
[csig_l3_host_qinq.py] │ ecmpFixup 2 2 0 0 │
[csig_l3_host_qinq.py] │ ecmpHashMixEnable 2 2 0 0 │
[csig_l3_host_qinq.py] │ ecmpHashSelection 66 66 0 0 │
[csig_l3_host_qinq.py] │ egrChipModeSel 2 2 0 0 │
[csig_l3_host_qinq.py] │ egressIntfMac 4 4 0 0 │
[csig_l3_host_qinq.py] │ egressPortDropCheck 31 31 0 0 │
[csig_l3_host_qinq.py] │ egressVlanXlate 6 6 0 0 │
[csig_l3_host_qinq.py] │ encapDecap 160 160 0 0 │
[csig_l3_host_qinq.py] │ eosIntfToPhysical 24 24 0 0 │
[csig_l3_host_qinq.py] │ fabricLagAttr 2 2 0 0 │
[csig_l3_host_qinq.py] │ finalDropControl 95 95 0 0 │
[csig_l3_host_qinq.py] │ ingChipModeSel 2 2 0 0 │
[csig_l3_host_qinq.py] │ ingVlanCheck 2177 2177 0 0 │
[csig_l3_host_qinq.py] │ ingressPortDropCheck 21 21 0 0 │
[csig_l3_host_qinq.py] │ ipv4Lpm 4 4 0 0 │
[csig_l3_host_qinq.py] │ l2DmacCompress 10 10 0 0 │
[csig_l3_host_qinq.py] │ l3DmacCheck 14 14 0 0 │
[csig_l3_host_qinq.py] │ lagHashMixEnable 2 2 0 0 │
[csig_l3_host_qinq.py] │ lagHashSelection 66 66 0 0 │
[csig_l3_host_qinq.py] │ mplsLookup 4 4 0 0 │
[csig_l3_host_qinq.py] │ nextHop 8 8 0 0 │
[csig_l3_host_qinq.py] │ normalizeDscp 5 5 0 0 │
[csig_l3_host_qinq.py] │ systemAcl 995 995 0 0 │
[csig_l3_host_qinq.py] │ taggedXlatePktToL3 2 2 0 0 │
[csig_l3_host_qinq.py] │ wredAction 208 208 0 0 │
[csig_l3_host_qinq.py] │ TOTAL 4007 4007 0 0 │
[csig_l3_host_qinq.py] ╰───────────────────────────────────────────────────────────────────────────────────╯
[csig_l3_host_qinq.py] ╭──────────────────────────── Paris SDK Ops Statistics ─────────────────────────────╮
[csig_l3_host_qinq.py] │ Paris SDK Ops 196 │
[csig_l3_host_qinq.py] │ Passed 196 │
[csig_l3_host_qinq.py] │ Failed 0 │
[csig_l3_host_qinq.py] ╰───────────────────────────────────────────────────────────────────────────────────╯
[csig_l3_host_qinq.py] Completed in 1m27.1s
============================================================
PASSED:
csig_l3_host_qinq.py
Results: 1 test(s) — 1 passed, 0 failed
============================================================
RESULT: PASS (87s)
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