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July 11, 2026 04:45
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| Test: dod_gre | |
| Date: Fri Jul 10 11:11:10 AM UTC 2026 | |
| FPGA_VERSION: 106.1 | |
| Bit: /persist2/releases/hw.pp.rel106.1/hello_pp-vpk180-rel106.1.pdi | |
| ======================================== | |
| === FPGA PROGRAMMING (version 106.1) | |
| ======================================== | |
| # ------------------------------------------------------------------------------ | |
| # Maggie testing application | |
| # - FPGA Programming In Progress : /persist2/releases/hw.pp.rel106.1/hello_pp-vpk180-rel106.1.pdi | |
| # - FPGA Programming Complete | |
| # - IIC : Port opened on ftdi://ftdi:4232:P1ABSDE36/2 to DEVICEID 0x58 at 1000.0kHz | |
| # - PCIE : Port opened on 0000:21:00.0 | |
| # - QSPI : Detected Micron manufacturer ID: 0x20 Device ID: 0xbb21 | |
| # - UART : Port opened on ftdi://ftdi:4232:P1ABSDE36/3 at 115200 baud | |
| FPGA programmed OK (79s) | |
| ======================================== | |
| === TEST RUN | |
| ======================================== | |
| [run_tests] run tmpdir: /tmp/platform-test_k53nraki | |
| [run_tests] cpus=24 sem limits: SEMMSL=32000 SEMMNS=1024000000 SEMOPM=500 SEMMNI=32000 | |
| PYTHONPATH=/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test:/home/dsebastian/workspace/aif/platform-test/prebuilt:/home/dsebastian/workspace/aif/platform-test:/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/install/python:/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/paris-driver/src/Common/testlib:/home/dsebastian/workspace/aif/platform-test/prebuilt/gen-py/aswitch:/home/dsebastian/workspace/aif/platform-test/prebuilt/gen-py/bm_runtime:/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/submodules/behavioral-model/targets/a1na_switch:/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/submodules/behavioral-model/tools | |
| LD_LIBRARY_PATH=/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/install/lib | |
| A1_PLATFORM=fpga | |
| A1_SYS_SW_PATH=/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw | |
| A1NA_SWITCH=/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/submodules/behavioral-model/build-p4p/targets/a1na_switch/a1na_switch | |
| ASAN_OPTIONS=verify_asan_link_order=0:detect_leaks=0:intercept_throw=0 | |
| CRYPTOGRAPHY_OPENSSL_NO_LEGACY=1 | |
| [dod_gre.py] [devicelib] PRISM_SHM_ROOT=/tmp/platform-test_k53nraki/dod_gre.py/prism pid=1082200 | |
| [dod_gre.py] | |
| [dod_gre.py] --- SDK version --- | |
| [dod_gre.py] {"a1-silicon": "a1_main_regr_07_03_26_v1", "p4-programs-build": "a2pp-2026-0619", "platform": "fpga"} | |
| [dod_gre.py] | |
| [dod_gre.py] | |
| [dod_gre.py] --- Kernel module setup --- | |
| [dod_gre.py] Found FPGA at 0000:21:00.0 | |
| [dod_gre.py] Loading /home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/build/paris-driver/src/KernelModule/paris_dev.ko ... | |
| [dod_gre.py] 0000:21:00.0 already bound | |
| [dod_gre.py] /dev/paris_main ready | |
| [dod_gre.py] | |
| [dod_gre.py] --- Creating HwPcie + Ham --- | |
| [dod_gre.py] HwPcie + Ham created (BAR size=0x8000000) | |
| [dod_gre.py] | |
| [dod_gre.py] --- FPGA version --- | |
| [dod_gre.py] {"PROJECT": "hello_pp-vpk180", "ARISTA_FDK_VERSION": "3.1.1", "BUILD_VERSION": "106.1", "PP_VERSION": "C41", "PP_FILENAME": "a2pp-2026-0629/ppu_top-0702a.svm", "AIFABRICS_HASH": "c940ed75122742f487e56fbabba6efdf8761432b", "FPGAEMU_HASH": "dfed8809adc05913c2e66fd2ca18176aa840b1bb", "TIMESTAMP": "2026-07-10 01:50:04 UTC"} | |
| [dod_gre.py] WARNING: FPGA/SDK p4-programs-build version mismatch -- may not work as intended | |
| [dod_gre.py] FPGA PP_VERSION: C41 | |
| [dod_gre.py] SDK p4-programs-build: a2pp-2026-0619 | |
| [dod_gre.py] | |
| [dod_gre.py] --- ILDMA channel reset --- | |
| [dod_gre.py] ctrl=0x00000001 intr=0x00000000 fsm=0x00000000 | |
| [dod_gre.py] [parserValueSetAdd] SwitchIngressParser.tpidCSIGCompact: set compact=0x0901 wide=0x0000 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=0 csig64=0x0000 | |
| [dod_gre.py] [parserValueSetAdd] SwitchEgressParser.tpidDecapCSIGCompact: set compact=0x0901 wide=0x0000 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=0 csig64=0x0000 | |
| [dod_gre.py] [parserValueSetAdd] SwitchEgressParser.tpidCSIGCompact: set compact=0x0901 wide=0x0000 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=0 csig64=0x0000 | |
| [dod_gre.py] [parserValueSetAdd] SwitchIngressParser.tpidCSIGWide: set compact=0x0901 wide=0x0902 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=1 csig64=0x0902 | |
| [dod_gre.py] [parserValueSetAdd] SwitchEgressParser.tpidDecapCSIGWide: set compact=0x0901 wide=0x0902 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=1 csig64=0x0902 | |
| [dod_gre.py] [parserValueSetAdd] SwitchEgressParser.tpidCSIGWide: set compact=0x0901 wide=0x0902 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=1 csig64=0x0902 | |
| [dod_gre.py] ### mgid 132 device 0 rids [[0, [1, 2], (0, 0, 1)]] | |
| [dod_gre.py] ### mgid 133 device 0 rids [[0, [3], (0, 0, 1)]] | |
| [dod_gre.py] ### mgid 5 device 0 rids [[65534, [3]]] | |
| [dod_gre.py] | |
| [dod_gre.py] [04:13:52.072] dev:0 port:2 sending packet | |
| [dod_gre.py] [pktgen] pre-send emrg=0 mirr=0 bcnt=0 | |
| [dod_gre.py] [pktgen] tm_meta 0x4003818=0x00000000 0x400381c=0x00400000 0x4003820=0x00000000 0x4003824=0x00000000 0x4003814=0x00000001 | |
| [dod_gre.py] [pktgen] post-send ctrl=0xffffffff emrg=1 mirr=0 bcnt=0 | |
| [dod_gre.py] [pktgen] emrg[0]: portId=1 err=0 discard=0 | |
| [dod_gre.py] [pktgen] mhe[0] tm: eport=1 c2cpu=0 mirror=0 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [dod_gre.py] Traceback (most recent call last): | |
| [dod_gre.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/p4testlib.py", line 521, in verifyPkts | |
| [dod_gre.py] pkts = self.ports[ port ].expectTx( timeout=timeout ) | |
| [dod_gre.py] ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
| [dod_gre.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/platformlib/port_base.py", line 156, in expectTx | |
| [dod_gre.py] waitFor( self._hasPackets, timeout=timeout ) | |
| [dod_gre.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/testutils.py", line 51, in waitFor | |
| [dod_gre.py] raise TimeoutError( excMsg ) | |
| [dod_gre.py] TimeoutError: timed out | |
| [dod_gre.py] | |
| [dod_gre.py] During handling of the above exception, another exception occurred: | |
| [dod_gre.py] | |
| [dod_gre.py] Traceback (most recent call last): | |
| [dod_gre.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/dod_gre.py", line 77, in <module> | |
| [dod_gre.py] DodToMirror().run() | |
| [dod_gre.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/dod_gre.py", line 74, in run | |
| [dod_gre.py] self.verifyPkts( self.mirrorDstPort, check ) | |
| [dod_gre.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/p4testlib.py", line 523, in verifyPkts | |
| [dod_gre.py] raise AssertionError( assertMsg | |
| [dod_gre.py] AssertionError: Expected packets on port 3 but timed out | |
| [dod_gre.py] WARNING: rmmod failed: rmmod: ERROR: Module paris_dev is in use | |
| [dod_gre.py] ╭──────────────────────────────── Shadow Validation ────────────────────────────────╮ | |
| [dod_gre.py] │ validate: 4052/4052 PASS 0 MISMATCH 0 ERR │ | |
| [dod_gre.py] │ (log: /tmp/platform-test_k53nraki/dod_gre.py/shadow_validation.txt) │ | |
| [dod_gre.py] │ │ | |
| [dod_gre.py] │ Table rows PASS FAIL ERR │ | |
| [dod_gre.py] │ cpuAndMirrorPacketEncap 16 16 0 0 │ | |
| [dod_gre.py] │ cpuReasonCodeToCpuQidIcos 26 26 0 0 │ | |
| [dod_gre.py] │ csigIngressExtract 30 30 0 0 │ | |
| [dod_gre.py] │ csigNormalizeValues 30 30 0 0 │ | |
| [dod_gre.py] │ ecmpFixup 2 2 0 0 │ | |
| [dod_gre.py] │ ecmpHashMixEnable 2 2 0 0 │ | |
| [dod_gre.py] │ ecmpHashSelection 66 66 0 0 │ | |
| [dod_gre.py] │ egrChipModeSel 2 2 0 0 │ | |
| [dod_gre.py] │ egrVlanCheck 6 6 0 0 │ | |
| [dod_gre.py] │ egressIntfMac 4 4 0 0 │ | |
| [dod_gre.py] │ egressPortDropCheck 31 31 0 0 │ | |
| [dod_gre.py] │ encapDecap 160 160 0 0 │ | |
| [dod_gre.py] │ eosIntfToPhysical 41 41 0 0 │ | |
| [dod_gre.py] │ fabricLagAttr 2 2 0 0 │ | |
| [dod_gre.py] │ finalDropControl 95 95 0 0 │ | |
| [dod_gre.py] │ ingChipModeSel 2 2 0 0 │ | |
| [dod_gre.py] │ ingVlanCheck 2179 2179 0 0 │ | |
| [dod_gre.py] │ ingressPortDropCheck 21 21 0 0 │ | |
| [dod_gre.py] │ l2DmacCompress 10 10 0 0 │ | |
| [dod_gre.py] │ l2DomainLookup 17 17 0 0 │ | |
| [dod_gre.py] │ l2Lookup 6 6 0 0 │ | |
| [dod_gre.py] │ l3DmacCheck 14 14 0 0 │ | |
| [dod_gre.py] │ lagHashMixEnable 2 2 0 0 │ | |
| [dod_gre.py] │ lagHashSelection 66 66 0 0 │ | |
| [dod_gre.py] │ mdgRemap 6 6 0 0 │ | |
| [dod_gre.py] │ mplsLookup 4 4 0 0 │ | |
| [dod_gre.py] │ nextHop 4 4 0 0 │ | |
| [dod_gre.py] │ normalizeDscp 5 5 0 0 │ | |
| [dod_gre.py] │ systemAcl 995 995 0 0 │ | |
| [dod_gre.py] │ wredAction 208 208 0 0 │ | |
| [dod_gre.py] │ TOTAL 4052 4052 0 0 │ | |
| [dod_gre.py] ╰───────────────────────────────────────────────────────────────────────────────────╯ | |
| [dod_gre.py] ╭──────────────────────────── Paris SDK Ops Statistics ─────────────────────────────╮ | |
| [dod_gre.py] │ Paris SDK Ops 201 │ | |
| [dod_gre.py] │ Passed 201 │ | |
| [dod_gre.py] │ Failed 0 │ | |
| [dod_gre.py] ╰───────────────────────────────────────────────────────────────────────────────────╯ | |
| [dod_gre.py] Completed in 1m39.9s | |
| ============================================================ | |
| FAILED: | |
| dod_gre.py | |
| Results: 1 test(s) — 0 passed, 1 failed | |
| ============================================================ | |
| RESULT: FAIL (99s) |
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