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July 26, 2026 03:38
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| [run_tests] run tmpdir: /tmp/platform-test_75zwuurd | |
| [run_tests] cpus=24 sem limits: SEMMSL=32000 SEMMNS=1024000000 SEMOPM=500 SEMMNI=32000 | |
| PYTHONPATH=/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test:/home/dsebastian/workspace/aif/platform-test/prebuilt:/home/dsebastian/workspace/aif/platform-test:/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/install/python:/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/paris-driver/src/Common/testlib:/home/dsebastian/workspace/aif/platform-test/prebuilt/gen-py/aswitch:/home/dsebastian/workspace/aif/platform-test/prebuilt/gen-py/bm_runtime:/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/submodules/behavioral-model/targets/a1na_switch:/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/submodules/behavioral-model/tools | |
| LD_LIBRARY_PATH=/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/install/lib | |
| A1_PLATFORM=fpga | |
| A1_SYS_SW_PATH=/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw | |
| A1NA_SWITCH=/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/submodules/behavioral-model/build-p4p/targets/a1na_switch/a1na_switch | |
| ASAN_OPTIONS=verify_asan_link_order=0:detect_leaks=0:intercept_throw=0 | |
| CRYPTOGRAPHY_OPENSSL_NO_LEGACY=1 | |
| VEPY_REMOTE=0 | |
| VEPY_HOST= | |
| VEPY_DOMAIN=0 | |
| VEPY_PCAP_PATH=/tmp/vepy_rx.pcap | |
| VEPY_RELAY=0 | |
| VEPY_RELAY_HOST= | |
| VEPY_RELAY_PORT=9876 | |
| A1_VEPY=0 | |
| A1_VEPY_REMOTE=0 | |
| [vxlan_decap_switch_encap.py] [devicelib] PRISM_SHM_ROOT=/tmp/platform-test_75zwuurd/vxlan_decap_switch_encap.py/prism pid=1801928 | |
| [vxlan_decap_switch_encap.py] | |
| [vxlan_decap_switch_encap.py] --- SDK version --- | |
| [vxlan_decap_switch_encap.py] {"a1-silicon": "sw-emu-special-2026-0703-a2pp-2026-0629", "p4-programs-build": "a2pp-2026-0629", "platform": "fpga"} | |
| [vxlan_decap_switch_encap.py] | |
| [vxlan_decap_switch_encap.py] | |
| [vxlan_decap_switch_encap.py] --- Kernel module setup --- | |
| [vxlan_decap_switch_encap.py] Found FPGA at 0000:21:00.0 | |
| [vxlan_decap_switch_encap.py] Loading /home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/build/paris-driver/src/KernelModule/paris_dev.ko ... | |
| [vxlan_decap_switch_encap.py] 0000:21:00.0 already bound | |
| [vxlan_decap_switch_encap.py] /dev/paris_main ready | |
| [vxlan_decap_switch_encap.py] | |
| [vxlan_decap_switch_encap.py] --- Creating HwPcie + Ham --- | |
| [vxlan_decap_switch_encap.py] HwPcie + Ham created (BAR size=0x8000000) | |
| [vxlan_decap_switch_encap.py] [loadILDmaOffsets] cppyy.cppdef() succeeded | |
| [vxlan_decap_switch_encap.py] [loadILDmaOffsets] Successfully loaded 47 values | |
| [vxlan_decap_switch_encap.py] [loadILDmaOffsets] Result keys: ['FREE_MEM_START_LO', 'FREE_MEM_START_LO_CHn', 'FREE_MEM_START_HI', 'FREE_MEM_START_HI_CHn', 'FREE_MEM_END_LO']... | |
| [vxlan_decap_switch_encap.py] [loadILDmaOffsets] FREE_MEM_WR_PTR_CHn: len=12 | |
| [vxlan_decap_switch_encap.py] | |
| [vxlan_decap_switch_encap.py] --- FPGA version --- | |
| [vxlan_decap_switch_encap.py] {"PROJECT": "hello_pp-vpk180", "ARISTA_FDK_VERSION": "3.1.1", "BUILD_VERSION": "6.6", "PP_VERSION": "C41", "PP_FILENAME": "a2pp-2026-0629/ppu_top-0711a.svm", "AIFABRICS_HASH": "9b52b5aa12ea75219df39fe789b241c993428369", "FPGAEMU_HASH": "8e89189a793cd2c1311ed5c8fa458b6ecfa71053", "TIMESTAMP": "2026-07-24 05:18:16 UTC"} | |
| [vxlan_decap_switch_encap.py] WARNING: FPGA/SDK p4-programs-build version mismatch -- may not work as intended | |
| [vxlan_decap_switch_encap.py] FPGA PP_VERSION: C41 | |
| [vxlan_decap_switch_encap.py] SDK p4-programs-build: a2pp-2026-0629 | |
| [vxlan_decap_switch_encap.py] | |
| [vxlan_decap_switch_encap.py] --- ILDMA channel reset --- | |
| [vxlan_decap_switch_encap.py] chan=0 ctrl=0x00000001 intr=0x00000000 fsm=0x00000000 | |
| [vxlan_decap_switch_encap.py] chan=1 ctrl=0x00000001 intr=0x00000000 fsm=0x00000000 | |
| [vxlan_decap_switch_encap.py] ### mgid 82 device 0 rids [[0, [1, 2, 3], (0, 0, 1)]] | |
| [vxlan_decap_switch_encap.py] pvs_add completed | |
| [vxlan_decap_switch_encap.py] === VXLAN Decap → Switch → Encap Test === | |
| [vxlan_decap_switch_encap.py] [20:38:29.412] dev:0 port:1 sending packet | |
| [vxlan_decap_switch_encap.py] [pktgen] pre-send emrg=0 mirr=0 bcnt=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] tm_meta 0x4003818=0x0010a000 0x400381c=0x00000000 0x4003820=0x00000000 0x4003824=0x00000000 0x4003814=0x00000001 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress mhe: port=0 bcnt=129 eop=1 err=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea: inport=1 dmac=00:66:77:88:99:AA l2dom=100 routed=0 nh=0x0064 vlan0=1 vlan1=0 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm: eport=0 pkt_len=133 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingress_timestamp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_ingressport: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea decaplen: 54 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_cpureasoncode: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_decaptype: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_dmac: '00:66:77:88:99:AA' | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_egrl2domain: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_encaptype: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_ingressporttype: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_routed: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea hashmd_lag: 33997 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea icos: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingmd_ingl2domain: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea phase0_switchport: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea qosmd_cfi: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea qosmd_cos: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea qosmd_exp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea qosmd_ecn: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea qosmd_dscp: 43 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea tunnelidx: 5 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea tunnell2idx: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea srv6dipshift: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea srv6blocksize: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea srv6updatedipfromsrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea srv6updatesrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea srv6popsrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingmdsrcport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingmddstport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingmdprotocol: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingmdl4attr: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea iecookie0: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea iecookie1: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingl2aintf: 130049 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrl2aintf: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea nh: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea csig_type: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea csig_wide_format: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea csig_invalid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ect: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea trimmable: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea localtrimming: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea earlyqdiscardeligible: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea l1_prun_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_mplsttlmode: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ptp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flowlet_disabled: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea mirrormgid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_outer_toomanyhdr: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_vlan0: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_vlan1: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_csigwide: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_csigcompact: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_mpls: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_ip_ip4: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_ip_ip6: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_ip_udp_vxlan: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ip_udp_payload_offset: 27 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm c0_eop: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm c0_eport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm spdd_trace_tag: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm bts: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm csig_val: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm src_port: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm eport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm ce: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm ct: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm c2cpu: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm mirror: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm dod: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm repl_copy: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm repl_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm repl_id_first: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm pipe_qid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm pkt_length: 133 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm trimmed: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm sch_tag_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] sw_tm: pkt_type=2 pkt_dest=0x0000 c2cpu=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] post-send ctrl=0x00000000 emrg=0 mirr=0 bcnt=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] drop: ctrl=0x00000000 cap_status={'emrg_captured': True, 'mirr_captured': False, 'bcnt_captured': False} | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm mhe: port=0 bcnt=129 eop=1 err=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea: inport=1 dmac=00:66:77:88:99:AA l2dom=100 routed=0 nh=0x0064 vlan0=1 vlan1=0 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm: eport=0 pkt_len=133 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea ingress_timestamp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea egrmd_ingressport: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea decaplen: 54 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea egrmd_cpureasoncode: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea egrmd_decaptype: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea egrmd_dmac: '00:66:77:88:99:AA' | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea egrmd_egrl2domain: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea egrmd_encaptype: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea egrmd_ingressporttype: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea egrmd_routed: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea hashmd_lag: 33997 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea icos: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea ingmd_ingl2domain: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea phase0_switchport: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea qosmd_cfi: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea qosmd_cos: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea qosmd_exp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea qosmd_ecn: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea qosmd_dscp: 43 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea tunnelidx: 5 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea tunnell2idx: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea srv6dipshift: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea srv6blocksize: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea srv6updatedipfromsrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea srv6updatesrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea srv6popsrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea ingmdsrcport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea ingmddstport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea ingmdprotocol: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea ingmdl4attr: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea iecookie0: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea iecookie1: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea ingl2aintf: 130049 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea egrl2aintf: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea nh: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea csig_type: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea csig_wide_format: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea csig_invalid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea ect: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea trimmable: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea localtrimming: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea earlyqdiscardeligible: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea l1_prun_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea egrmd_mplsttlmode: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea ptp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea flowlet_disabled: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea mirrormgid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea flag_outer_toomanyhdr: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea flag_vlan0: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea flag_vlan1: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea flag_csigwide: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea flag_csigcompact: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea flag_mpls: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea flag_ip_ip4: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea flag_ip_ip6: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea flag_ip_udp_vxlan: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm ia2ea ip_udp_payload_offset: 27 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm c0_eop: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm c0_eport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm spdd_trace_tag: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm bts: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm csig_val: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm src_port: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm eport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm ce: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm ct: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm c2cpu: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm mirror: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm dod: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm repl_copy: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm repl_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm repl_id_first: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm pipe_qid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm pkt_length: 133 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm trimmed: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] after-arm tm sch_tag_id: 0 | |
| [vxlan_decap_switch_encap.py] [20:38:30.453] dev:0 port:1 sending packet | |
| [vxlan_decap_switch_encap.py] [pktgen] pre-send emrg=2 mirr=0 bcnt=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] tm_meta 0x4003818=0x0010a000 0x400381c=0x00000000 0x4003820=0x00000000 0x4003824=0x00000000 0x4003814=0x00000001 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress mhe: port=0 bcnt=129 eop=1 err=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea: inport=1 dmac=00:66:77:88:99:AA l2dom=100 routed=0 nh=0x0064 vlan0=1 vlan1=0 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm: eport=2 pkt_len=133 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingress_timestamp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_ingressport: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea decaplen: 54 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_cpureasoncode: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_decaptype: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_dmac: '00:66:77:88:99:AA' | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_egrl2domain: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_encaptype: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_ingressporttype: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_routed: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea hashmd_lag: 33997 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea icos: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingmd_ingl2domain: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea phase0_switchport: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea qosmd_cfi: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea qosmd_cos: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea qosmd_exp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea qosmd_ecn: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea qosmd_dscp: 43 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea tunnelidx: 5 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea tunnell2idx: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea srv6dipshift: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea srv6blocksize: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea srv6updatedipfromsrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea srv6updatesrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea srv6popsrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingmdsrcport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingmddstport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingmdprotocol: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingmdl4attr: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea iecookie0: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea iecookie1: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingl2aintf: 130049 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrl2aintf: 4096 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea nh: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea csig_type: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea csig_wide_format: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea csig_invalid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ect: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea trimmable: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea localtrimming: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea earlyqdiscardeligible: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea l1_prun_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_mplsttlmode: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ptp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flowlet_disabled: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea mirrormgid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_outer_toomanyhdr: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_vlan0: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_vlan1: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_csigwide: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_csigcompact: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_mpls: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_ip_ip4: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_ip_ip6: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_ip_udp_vxlan: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ip_udp_payload_offset: 27 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm c0_eop: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm c0_eport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm spdd_trace_tag: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm bts: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm csig_val: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm src_port: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm eport: 2 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm ce: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm ct: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm c2cpu: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm mirror: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm dod: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm repl_copy: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm repl_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm repl_id_first: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm pipe_qid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm pkt_length: 133 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm trimmed: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm sch_tag_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] sw_tm: pkt_type=0 pkt_dest=0x0002 c2cpu=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] sw_tm: replay eport=2 c2cpu=0 qid=8 | |
| [vxlan_decap_switch_encap.py] [pktgen] emrg[0]: portId=2 err=0 discard=0 new_len=133 final_pkt_size=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] emrg[0] raw data (288B): 00aabbccdd02dcba987654328100003208004500006f0000400040112973010203040a030303853112b5005b000008000000200002000066778899aa001122334455080045ad003d000100004000f6bfc0a80101c0a8010254657374207061796c6f616420666f722056584c414e2064656361702d7377697463682d656e636170000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] mhe: port=0 bcnt=129 eop=1 err=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea: inport=1 dmac=00:66:77:88:99:AA l2dom=100 routed=0 nh=0x0064 vlan0=1 vlan1=0 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm: eport=2 pkt_len=133 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ingress_timestamp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_ingressport: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea decaplen: 54 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_cpureasoncode: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_decaptype: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_dmac: '00:66:77:88:99:AA' | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_egrl2domain: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_encaptype: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_ingressporttype: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_routed: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea hashmd_lag: 33997 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea icos: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ingmd_ingl2domain: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea phase0_switchport: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea qosmd_cfi: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea qosmd_cos: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea qosmd_exp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea qosmd_ecn: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea qosmd_dscp: 43 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea tunnelidx: 5 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea tunnell2idx: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea srv6dipshift: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea srv6blocksize: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea srv6updatedipfromsrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea srv6updatesrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea srv6popsrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ingmdsrcport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ingmddstport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ingmdprotocol: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ingmdl4attr: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea iecookie0: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea iecookie1: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ingl2aintf: 130049 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrl2aintf: 4096 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea nh: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea csig_type: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea csig_wide_format: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea csig_invalid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ect: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea trimmable: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea localtrimming: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea earlyqdiscardeligible: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea l1_prun_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_mplsttlmode: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ptp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flowlet_disabled: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea mirrormgid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_outer_toomanyhdr: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_vlan0: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_vlan1: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_csigwide: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_csigcompact: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_mpls: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_ip_ip4: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_ip_ip6: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_ip_udp_vxlan: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ip_udp_payload_offset: 27 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm c0_eop: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm c0_eport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm spdd_trace_tag: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm bts: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm csig_val: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm src_port: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm eport: 2 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm ce: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm ct: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm c2cpu: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm mirror: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm dod: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm repl_copy: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm repl_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm repl_id_first: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm pipe_qid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm pkt_length: 133 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm trimmed: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm sch_tag_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] post-send ctrl=0x00000000 emrg=1 mirr=0 bcnt=0 | |
| [vxlan_decap_switch_encap.py] [20:38:30.466] dev:0 port:3 sending packet | |
| [vxlan_decap_switch_encap.py] [pktgen] pre-send emrg=2 mirr=0 bcnt=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] tm_meta 0x4003818=0x00102000 0x400381c=0x00000000 0x4003820=0x00000000 0x4003824=0x00000000 0x4003814=0x00000001 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress mhe: port=0 bcnt=125 eop=1 err=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea: inport=3 dmac=00:66:77:88:99:AA l2dom=100 routed=0 nh=0x0064 vlan0=0 vlan1=0 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm: eport=2 pkt_len=129 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingress_timestamp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_ingressport: 3 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea decaplen: 50 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_cpureasoncode: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_decaptype: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_dmac: '00:66:77:88:99:AA' | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_egrl2domain: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_encaptype: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_ingressporttype: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_routed: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea hashmd_lag: 60674 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea icos: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingmd_ingl2domain: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea phase0_switchport: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea qosmd_cfi: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea qosmd_cos: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea qosmd_exp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea qosmd_ecn: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea qosmd_dscp: 43 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea tunnelidx: 5 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea tunnell2idx: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea srv6dipshift: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea srv6blocksize: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea srv6updatedipfromsrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea srv6updatesrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea srv6popsrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingmdsrcport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingmddstport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingmdprotocol: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingmdl4attr: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea iecookie0: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea iecookie1: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ingl2aintf: 130049 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrl2aintf: 4096 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea nh: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea csig_type: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea csig_wide_format: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea csig_invalid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ect: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea trimmable: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea localtrimming: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea earlyqdiscardeligible: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea l1_prun_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea egrmd_mplsttlmode: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ptp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flowlet_disabled: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea mirrormgid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_outer_toomanyhdr: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_vlan0: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_vlan1: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_csigwide: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_csigcompact: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_mpls: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_ip_ip4: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_ip_ip6: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea flag_ip_udp_vxlan: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress ia2ea ip_udp_payload_offset: 25 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm c0_eop: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm c0_eport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm spdd_trace_tag: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm bts: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm csig_val: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm src_port: 3 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm eport: 2 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm ce: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm ct: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm c2cpu: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm mirror: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm dod: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm repl_copy: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm repl_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm repl_id_first: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm pipe_qid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm pkt_length: 129 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm trimmed: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] ingress tm sch_tag_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] sw_tm: pkt_type=0 pkt_dest=0x0002 c2cpu=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] sw_tm: replay eport=2 c2cpu=0 qid=8 | |
| [vxlan_decap_switch_encap.py] [pktgen] emrg[0]: portId=2 err=0 discard=0 new_len=133 final_pkt_size=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] emrg[0] raw data (288B): 00aabbccdd02dcba987654328100003208004500006f0000400040112973010203040a030303ed6612b5005b000008000000200002000066778899aa001122334455080045ad003d000100004000f6bfc0a80101c0a8010254657374207061796c6f616420666f722056584c414e2064656361702d7377697463682d656e636170000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] mhe: port=0 bcnt=125 eop=1 err=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea: inport=3 dmac=00:66:77:88:99:AA l2dom=100 routed=0 nh=0x0064 vlan0=0 vlan1=0 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm: eport=2 pkt_len=129 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ingress_timestamp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_ingressport: 3 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea decaplen: 50 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_cpureasoncode: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_decaptype: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_dmac: '00:66:77:88:99:AA' | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_egrl2domain: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_encaptype: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_ingressporttype: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_routed: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea hashmd_lag: 60674 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea icos: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ingmd_ingl2domain: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea phase0_switchport: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea qosmd_cfi: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea qosmd_cos: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea qosmd_exp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea qosmd_ecn: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea qosmd_dscp: 43 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea tunnelidx: 5 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea tunnell2idx: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea srv6dipshift: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea srv6blocksize: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea srv6updatedipfromsrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea srv6updatesrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea srv6popsrh: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ingmdsrcport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ingmddstport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ingmdprotocol: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ingmdl4attr: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea iecookie0: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea iecookie1: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ingl2aintf: 130049 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrl2aintf: 4096 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea nh: 100 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea csig_type: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea csig_wide_format: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea csig_invalid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ect: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea trimmable: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea localtrimming: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea earlyqdiscardeligible: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea l1_prun_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea egrmd_mplsttlmode: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ptp: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flowlet_disabled: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea mirrormgid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_outer_toomanyhdr: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_vlan0: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_vlan1: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_csigwide: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_csigcompact: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_mpls: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_ip_ip4: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_ip_ip6: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea flag_ip_udp_vxlan: 1 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] ia2ea ip_udp_payload_offset: 25 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm c0_eop: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm c0_eport: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm spdd_trace_tag: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm bts: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm csig_val: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm src_port: 3 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm eport: 2 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm ce: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm ct: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm c2cpu: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm mirror: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm dod: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm repl_copy: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm repl_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm repl_id_first: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm pipe_qid: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm pkt_length: 129 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm trimmed: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] mhe[0] tm sch_tag_id: 0 | |
| [vxlan_decap_switch_encap.py] [pktgen] post-send ctrl=0x00000000 emrg=1 mirr=0 bcnt=0 | |
| [vxlan_decap_switch_encap.py] | |
| [vxlan_decap_switch_encap.py] ✓ VXLAN decap-switch-encap test passed! | |
| [vxlan_decap_switch_encap.py] ✓ Packet successfully: VTEP1 → [Decap → Switch → Encap] → VTEP2 | |
| [vxlan_decap_switch_encap.py] ✓ VNI transformation: 0x100001 → 0x200002 | |
| [vxlan_decap_switch_encap.py] ✓ VTEP routing: 10.2.2.2 → 10.1.1.1 → 10.3.3.3 | |
| [vxlan_decap_switch_encap.py] WARNING: rmmod failed: rmmod: ERROR: Module paris_dev is in use | |
| [vxlan_decap_switch_encap.py] Completed in 0m20.5s | |
| ============================================================ | |
| PASSED: | |
| vxlan_decap_switch_encap.py | |
| Results: 1 test(s) — 1 passed, 0 vdiff, 0 failed | |
| ============================================================ |
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