Skip to content

Instantly share code, notes, and snippets.

@dsebastian-arista

dsebastian-arista/ecn_marking_pipe_ECT0.run.2026-07-10.txt

Created July 11, 2026 04:45
Show Gist options

  • Select an option

    Learn more about clone URLs
  • Save dsebastian-arista/bef59b7b852ce652f7066fc83138713c to your computer and use it in GitHub Desktop.

Select an option

Learn more about clone URLs
Save dsebastian-arista/bef59b7b852ce652f7066fc83138713c to your computer and use it in GitHub Desktop.
Download ZIP
Raw
ecn_marking_pipe_ECT0.run.2026-07-10.txt
Test: ecn_marking_pipe_ECT0
Date: Fri Jul 10 11:26:00 AM UTC 2026
FPGA_VERSION: 106.1
Bit: /persist2/releases/hw.pp.rel106.1/hello_pp-vpk180-rel106.1.pdi
========================================
=== FPGA PROGRAMMING (version 106.1)
========================================
# ------------------------------------------------------------------------------
# Maggie testing application
# - FPGA Programming In Progress : /persist2/releases/hw.pp.rel106.1/hello_pp-vpk180-rel106.1.pdi
# - FPGA Programming Complete
# - IIC : Port opened on ftdi://ftdi:4232:P1ABSDE36/2 to DEVICEID 0x58 at 1000.0kHz
# - PCIE : Port opened on 0000:21:00.0
# - QSPI : Detected Micron manufacturer ID: 0x20 Device ID: 0xbb21
# - UART : Port opened on ftdi://ftdi:4232:P1ABSDE36/3 at 115200 baud
FPGA programmed OK (78s)
========================================
=== TEST RUN
========================================
[run_tests] run tmpdir: /tmp/platform-test_4qgpgwef
[run_tests] cpus=24 sem limits: SEMMSL=32000 SEMMNS=1024000000 SEMOPM=500 SEMMNI=32000
PYTHONPATH=/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test:/home/dsebastian/workspace/aif/platform-test/prebuilt:/home/dsebastian/workspace/aif/platform-test:/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/install/python:/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/paris-driver/src/Common/testlib:/home/dsebastian/workspace/aif/platform-test/prebuilt/gen-py/aswitch:/home/dsebastian/workspace/aif/platform-test/prebuilt/gen-py/bm_runtime:/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/submodules/behavioral-model/targets/a1na_switch:/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/submodules/behavioral-model/tools
LD_LIBRARY_PATH=/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/install/lib
A1_PLATFORM=fpga
A1_SYS_SW_PATH=/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw
A1NA_SWITCH=/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/submodules/behavioral-model/build-p4p/targets/a1na_switch/a1na_switch
ASAN_OPTIONS=verify_asan_link_order=0:detect_leaks=0:intercept_throw=0
CRYPTOGRAPHY_OPENSSL_NO_LEGACY=1
[ecn_marking_pipe_ECT0.py] [devicelib] PRISM_SHM_ROOT=/tmp/platform-test_4qgpgwef/ecn_marking_pipe_ECT0.py/prism pid=1086776
[ecn_marking_pipe_ECT0.py]
[ecn_marking_pipe_ECT0.py] --- SDK version ---
[ecn_marking_pipe_ECT0.py] {"a1-silicon": "a1_main_regr_07_03_26_v1", "p4-programs-build": "a2pp-2026-0619", "platform": "fpga"}
[ecn_marking_pipe_ECT0.py]
[ecn_marking_pipe_ECT0.py]
[ecn_marking_pipe_ECT0.py] --- Kernel module setup ---
[ecn_marking_pipe_ECT0.py] Found FPGA at 0000:21:00.0
[ecn_marking_pipe_ECT0.py] Loading /home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/build/paris-driver/src/KernelModule/paris_dev.ko ...
[ecn_marking_pipe_ECT0.py] 0000:21:00.0 already bound
[ecn_marking_pipe_ECT0.py] /dev/paris_main ready
[ecn_marking_pipe_ECT0.py]
[ecn_marking_pipe_ECT0.py] --- Creating HwPcie + Ham ---
[ecn_marking_pipe_ECT0.py] HwPcie + Ham created (BAR size=0x8000000)
[ecn_marking_pipe_ECT0.py]
[ecn_marking_pipe_ECT0.py] --- FPGA version ---
[ecn_marking_pipe_ECT0.py] {"PROJECT": "hello_pp-vpk180", "ARISTA_FDK_VERSION": "3.1.1", "BUILD_VERSION": "106.1", "PP_VERSION": "C41", "PP_FILENAME": "a2pp-2026-0629/ppu_top-0702a.svm", "AIFABRICS_HASH": "c940ed75122742f487e56fbabba6efdf8761432b", "FPGAEMU_HASH": "dfed8809adc05913c2e66fd2ca18176aa840b1bb", "TIMESTAMP": "2026-07-10 01:50:04 UTC"}
[ecn_marking_pipe_ECT0.py] WARNING: FPGA/SDK p4-programs-build version mismatch -- may not work as intended
[ecn_marking_pipe_ECT0.py] FPGA PP_VERSION: C41
[ecn_marking_pipe_ECT0.py] SDK p4-programs-build: a2pp-2026-0619
[ecn_marking_pipe_ECT0.py]
[ecn_marking_pipe_ECT0.py] --- ILDMA channel reset ---
[ecn_marking_pipe_ECT0.py] ctrl=0x00000001 intr=0x00000000 fsm=0x00000000
[ecn_marking_pipe_ECT0.py] [parserValueSetAdd] SwitchIngressParser.tpidCSIGCompact: set compact=0x0901 wide=0x0000 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=0 csig64=0x0000
[ecn_marking_pipe_ECT0.py] [parserValueSetAdd] SwitchEgressParser.tpidDecapCSIGCompact: set compact=0x0901 wide=0x0000 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=0 csig64=0x0000
[ecn_marking_pipe_ECT0.py] [parserValueSetAdd] SwitchEgressParser.tpidCSIGCompact: set compact=0x0901 wide=0x0000 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=0 csig64=0x0000
[ecn_marking_pipe_ECT0.py] [parserValueSetAdd] SwitchIngressParser.tpidCSIGWide: set compact=0x0901 wide=0x0902 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=1 csig64=0x0902
[ecn_marking_pipe_ECT0.py] [parserValueSetAdd] SwitchEgressParser.tpidDecapCSIGWide: set compact=0x0901 wide=0x0902 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=1 csig64=0x0902
[ecn_marking_pipe_ECT0.py] [parserValueSetAdd] SwitchEgressParser.tpidCSIGWide: set compact=0x0901 wide=0x0902 readback rv=0 csig32_valid=1 csig32=0x0901 csig64_valid=1 csig64=0x0902
[ecn_marking_pipe_ECT0.py] ### mgid 131 device 0 rids [[0, [2], (0, 0, 1)]]
[ecn_marking_pipe_ECT0.py] ### mgid 232 device 0 rids [[0, [1], (0, 0, 1)]]
[ecn_marking_pipe_ECT0.py] pvs_add completed
[ecn_marking_pipe_ECT0.py] [pktgen] pre-send emrg=0 mirr=0 bcnt=0
[ecn_marking_pipe_ECT0.py] [pktgen] tm_meta 0x4003818=0x00000000 0x400381c=0x04000000 0x4003820=0x00000000 0x4003824=0x00000000 0x4003814=0x00000001
[ecn_marking_pipe_ECT0.py] [pktgen] post-send ctrl=0xffffffff emrg=1 mirr=0 bcnt=0
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0]: portId=1 err=0 discard=0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm: eport=1 c2cpu=0 mirror=0 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0
[ecn_marking_pipe_ECT0.py] [pktgen] counts: emrg=1 mirr=0 bcnt=0
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0]: portId=1 err=0 discard=0 new_len=102 bcntBytes=0 bcntPort=0 bcntErr=0
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 0000 00 00 08 00 C0 00 00 00 00 00 0C CC 00 00 00 00 ................
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 0010 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 0020 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 0030 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 0050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 0060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 0070 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 0080 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 0090 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 00a0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 00b0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 00c0 00 00 00 00 C0 00 00 00 14 DC 9C 5B 51 19 D9 54 ...........[Q..T
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 00d0 DD 18 53 14 92 DD 1A 1A 4D 52 DE 54 12 53 D8 4C ..S.....MR.T.S.L
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 00e0 93 12 D3 0D 5B 4D 18 DC 5B 5D 50 99 D6 96 5E 90 ....[M..[]P...^.
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 00f0 9A DD 0D 95 8D 1E 0D D5 93 16 95 92 DD 56 0D 94 .............V..
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 0100 54 55 D5 9C 53 92 8C 8C 45 00 40 40 40 40 40 40 TU..S...E.@@@@@@
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 0110 0F C0 18 FE 00 00 40 00 11 6B 40 15 95 0C 82 00 ......@..k@.....
[ecn_marking_pipe_ECT0.py] [pktgen] emrg[0] raw 0120 77 2E A6 1D 51 0C C8 84 00 01 00 15 w...Q.......
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0]: port=1 bcnt=98 eop=1 err=0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea: inport=2 dmac=00:55:44:33:22:11 l2dom=200 routed=1 nh=0x0064 vlan0=0 vlan1=0 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 csigcmp=0 csigwide=0 csig_type=0 csig_wf=0 csig_inv=0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm: eport=1 pkt_len=102 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea ingress_timestamp: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea egrmd_ingressport: 2
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea decaplen: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea egrmd_cpureasoncode: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea egrmd_decaptype: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea egrmd_dmac: '00:55:44:33:22:11'
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea egrmd_egrl2domain: 200
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea egrmd_encaptype: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea egrmd_ingressporttype: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea egrmd_routed: 1
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea hashmd_lag: 51846
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea icos: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea ingmd_ingl2domain: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea phase0_switchport: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea qosmd_cfi: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea qosmd_cos: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea qosmd_exp: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea qosmd_ecn: 1
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea qosmd_dscp: 43
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea tunnelidx: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea tunnell2idx: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea srv6dipshift: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea srv6blocksize: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea srv6updatedipfromsrh: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea srv6updatesrh: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea srv6popsrh: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea ingmdsrcport: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea ingmddstport: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea ingmdprotocol: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea ingmdl4attr: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea iecookie0: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea iecookie1: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea ingl2aintf: 4096
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea egrl2aintf: 2048
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea nh: 100
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea csig_type: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea csig_wide_format: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea csig_invalid: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea ect: 1
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea trimmable: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea localtrimming: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea earlyqdiscardeligible: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea l1_prun_id: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea egrmd_mplsttlmode: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea ptp: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea flowlet_disabled: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea mirrormgid: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea flag_outer_toomanyhdr: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea flag_vlan0: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea flag_vlan1: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea flag_csigwide: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea flag_csigcompact: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea flag_mpls: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea flag_ip_ip4: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea flag_ip_ip6: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea flag_ip_udp_vxlan: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] ia2ea ip_udp_payload_offset: 17
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm c0_eop: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm c0_eport: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm spdd_trace_tag: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm bts: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm csig_val: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm src_port: 2
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm eport: 1
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm ce: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm ct: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm c2cpu: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm mirror: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm dod: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm repl_copy: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm repl_id: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm repl_id_first: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm pipe_qid: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm pkt_length: 102
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm trimmed: 0
[ecn_marking_pipe_ECT0.py] [pktgen] mhe[0] tm sch_tag_id: 0
[ecn_marking_pipe_ECT0.py]
[ecn_marking_pipe_ECT0.py] Received Pkt:
[ecn_marking_pipe_ECT0.py] 0000 00 55 44 33 22 11 DC BA 98 76 54 32 08 00 45 AD .UD3"....vT2..E.
[ecn_marking_pipe_ECT0.py] 0010 00 54 00 01 00 00 3F 00 63 F9 01 01 01 01 14 01 .T....?.c.......
[ecn_marking_pipe_ECT0.py] 0020 01 01 4E 4A 32 31 51 57 56 73 75 58 36 52 4C 5A ..NJ21QWVsuX6RLZ
[ecn_marking_pipe_ECT0.py] 0030 56 4A 34 78 37 56 6B 74 36 57 5A 59 7A 41 6D 75 VJ4x7Vkt6WZYzAmu
[ecn_marking_pipe_ECT0.py] 0040 42 65 6D 34 63 72 4C 4B 4C 34 49 4F 61 31 35 4B Bem4crLKL4IOa15K
[ecn_marking_pipe_ECT0.py] 0050 79 52 4B 74 68 6B 74 61 4C 51 44 67 65 50 53 72 yRKthktaLQDgePSr
[ecn_marking_pipe_ECT0.py] 0060 71 6F qo
[ecn_marking_pipe_ECT0.py]
[ecn_marking_pipe_ECT0.py] Expected Pkt:
[ecn_marking_pipe_ECT0.py] 0000 00 55 44 33 22 11 DC BA 98 76 54 32 08 00 45 AF .UD3"....vT2..E.
[ecn_marking_pipe_ECT0.py] 0010 00 54 00 01 00 00 3F 00 63 F7 01 01 01 01 14 01 .T....?.c.......
[ecn_marking_pipe_ECT0.py] 0020 01 01 4E 4A 32 31 51 57 56 73 75 58 36 52 4C 5A ..NJ21QWVsuX6RLZ
[ecn_marking_pipe_ECT0.py] 0030 56 4A 34 78 37 56 6B 74 36 57 5A 59 7A 41 6D 75 VJ4x7Vkt6WZYzAmu
[ecn_marking_pipe_ECT0.py] 0040 42 65 6D 34 63 72 4C 4B 4C 34 49 4F 61 31 35 4B Bem4crLKL4IOa15K
[ecn_marking_pipe_ECT0.py] 0050 79 52 4B 74 68 6B 74 61 4C 51 44 67 65 50 53 72 yRKthktaLQDgePSr
[ecn_marking_pipe_ECT0.py] 0060 71 6F qo
[ecn_marking_pipe_ECT0.py]
[ecn_marking_pipe_ECT0.py] Packet Diff:
[ecn_marking_pipe_ECT0.py] | Received | Expected
[ecn_marking_pipe_ECT0.py] -------------------------------------------------------------------------------------------------------
[ecn_marking_pipe_ECT0.py] | ###[ Ethernet ]### | ###[ Ethernet ]###
[ecn_marking_pipe_ECT0.py] | dst = 00:55:44:33:22:11 | dst = 00:55:44:33:22:11
[ecn_marking_pipe_ECT0.py] | src = dc:ba:98:76:54:32 | src = dc:ba:98:76:54:32
[ecn_marking_pipe_ECT0.py] | type = IPv4 | type = IPv4
[ecn_marking_pipe_ECT0.py] | ###[ IP ]### | ###[ IP ]###
[ecn_marking_pipe_ECT0.py] | version = 4 | version = 4
[ecn_marking_pipe_ECT0.py] | ihl = 5 | ihl = 5
[ecn_marking_pipe_ECT0.py] ! | tos = 0xad | tos = 0xaf
[ecn_marking_pipe_ECT0.py] | len = 84 | len = 84
[ecn_marking_pipe_ECT0.py] | id = 1 | id = 1
[ecn_marking_pipe_ECT0.py] | flags = | flags =
[ecn_marking_pipe_ECT0.py] | frag = 0 | frag = 0
[ecn_marking_pipe_ECT0.py] | ttl = 63 | ttl = 63
[ecn_marking_pipe_ECT0.py] | proto = hopopt | proto = hopopt
[ecn_marking_pipe_ECT0.py] ! | chksum = 0x63f9 | chksum = 0x63f7
[ecn_marking_pipe_ECT0.py] | src = 1.1.1.1 | src = 1.1.1.1
[ecn_marking_pipe_ECT0.py] | dst = 20.1.1.1 | dst = 20.1.1.1
[ecn_marking_pipe_ECT0.py] | \options \ | \options \
[ecn_marking_pipe_ECT0.py] | ###[ Raw ]### | ###[ Raw ]###
[ecn_marking_pipe_ECT0.py] | load = 'NJ21QWVsuX6RLZVJ4x7Vkt6WZYzAmuBem4crLKL4IOa15KyRKthktaLQDgePSrqo' | load = 'NJ21QWVsuX6RLZVJ4x7Vkt6WZYzAmuBem4crLKL4IOa15KyRKthktaLQDgePSrqo'
[ecn_marking_pipe_ECT0.py] Traceback (most recent call last):
[ecn_marking_pipe_ECT0.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/ecn_marking_pipe_ECT0.py", line 13, in <module>
[ecn_marking_pipe_ECT0.py] EcnMarkingPipeECT0().run()
[ecn_marking_pipe_ECT0.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/ecn_marking.py", line 576, in run
[ecn_marking_pipe_ECT0.py] self.runOnDevice( devices=[ 0 ] )
[ecn_marking_pipe_ECT0.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/ecn_marking.py", line 560, in runOnDevice
[ecn_marking_pipe_ECT0.py] self.testIpv4( devices )
[ecn_marking_pipe_ECT0.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/ecn_marking.py", line 165, in testIpv4
[ecn_marking_pipe_ECT0.py] testIter( self, devices, tos, congestedTos )
[ecn_marking_pipe_ECT0.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/ecn_marking.py", line 153, in testIter
[ecn_marking_pipe_ECT0.py] self.sendAndReceive( pkt, expPkt )
[ecn_marking_pipe_ECT0.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/ecn_marking.py", line 137, in sendAndReceive
[ecn_marking_pipe_ECT0.py] self.verifyPkts( self.egressPort, check )
[ecn_marking_pipe_ECT0.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/p4testlib.py", line 525, in verifyPkts
[ecn_marking_pipe_ECT0.py] verify( pkts )
[ecn_marking_pipe_ECT0.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/ecn_marking.py", line 136, in check
[ecn_marking_pipe_ECT0.py] self.comparePacket( pkts[ 0 ], expPkt )
[ecn_marking_pipe_ECT0.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/p4testlib.py", line 645, in comparePacket
[ecn_marking_pipe_ECT0.py] assert equal, "Packet mismatch"
[ecn_marking_pipe_ECT0.py] ^^^^^
[ecn_marking_pipe_ECT0.py] AssertionError: Packet mismatch
[ecn_marking_pipe_ECT0.py] WARNING: rmmod failed: rmmod: ERROR: Module paris_dev is in use
[ecn_marking_pipe_ECT0.py] ╭──────────────────────────────── Shadow Validation ────────────────────────────────╮
[ecn_marking_pipe_ECT0.py] │ validate: 9305/9305 PASS 0 MISMATCH 0 ERR │
[ecn_marking_pipe_ECT0.py] │ (log: /tmp/platform-test_4qgpgwef/ecn_marking_pipe_ECT0.py/shadow_validation… │
[ecn_marking_pipe_ECT0.py] │ │
[ecn_marking_pipe_ECT0.py] │ Table rows PASS FAIL ERR │
[ecn_marking_pipe_ECT0.py] │ cpuAndMirrorPacketEncap 8 8 0 0 │
[ecn_marking_pipe_ECT0.py] │ cpuReasonCodeToCpuQidIcos 26 26 0 0 │
[ecn_marking_pipe_ECT0.py] │ csigIngressExtract 30 30 0 0 │
[ecn_marking_pipe_ECT0.py] │ csigNormalizeValues 30 30 0 0 │
[ecn_marking_pipe_ECT0.py] │ ecmpFixup 2 2 0 0 │
[ecn_marking_pipe_ECT0.py] │ ecmpHashMixEnable 2 2 0 0 │
[ecn_marking_pipe_ECT0.py] │ ecmpHashSelection 66 66 0 0 │
[ecn_marking_pipe_ECT0.py] │ egrChipModeSel 2 2 0 0 │
[ecn_marking_pipe_ECT0.py] │ egrVlanCheck 4 4 0 0 │
[ecn_marking_pipe_ECT0.py] │ egressIntfMac 4 4 0 0 │
[ecn_marking_pipe_ECT0.py] │ egressPortDropCheck 31 31 0 0 │
[ecn_marking_pipe_ECT0.py] │ encapDecap 160 160 0 0 │
[ecn_marking_pipe_ECT0.py] │ eosIntfToPhysical 24 24 0 0 │
[ecn_marking_pipe_ECT0.py] │ fabricLagAttr 2 2 0 0 │
[ecn_marking_pipe_ECT0.py] │ finalDropControl 95 95 0 0 │
[ecn_marking_pipe_ECT0.py] │ ingChipModeSel 2 2 0 0 │
[ecn_marking_pipe_ECT0.py] │ ingVlanCheck 2178 2178 0 0 │
[ecn_marking_pipe_ECT0.py] │ ingressPortDropCheck 21 21 0 0 │
[ecn_marking_pipe_ECT0.py] │ ipv4Lpm 8 8 0 0 │
[ecn_marking_pipe_ECT0.py] │ ipv6Lpm 35 35 0 0 │
[ecn_marking_pipe_ECT0.py] │ l2DmacCompress 10 10 0 0 │
[ecn_marking_pipe_ECT0.py] │ l2DomainLookup 22 22 0 0 │
[ecn_marking_pipe_ECT0.py] │ l3DmacCheck 14 14 0 0 │
[ecn_marking_pipe_ECT0.py] │ lagHashMixEnable 2 2 0 0 │
[ecn_marking_pipe_ECT0.py] │ lagHashSelection 66 66 0 0 │
[ecn_marking_pipe_ECT0.py] │ mdgRemap 8 8 0 0 │
[ecn_marking_pipe_ECT0.py] │ mplsLookup 4 4 0 0 │
[ecn_marking_pipe_ECT0.py] │ nextHop 13 13 0 0 │
[ecn_marking_pipe_ECT0.py] │ nextHopOverlay 5 5 0 0 │
[ecn_marking_pipe_ECT0.py] │ normalizeDscp 5 5 0 0 │
[ecn_marking_pipe_ECT0.py] │ systemAcl 995 995 0 0 │
[ecn_marking_pipe_ECT0.py] │ tcModeSelect 2 2 0 0 │
[ecn_marking_pipe_ECT0.py] │ tunnelActionData 5 5 0 0 │
[ecn_marking_pipe_ECT0.py] │ tunnelAttr 4098 4098 0 0 │
[ecn_marking_pipe_ECT0.py] │ tunnelDipV4 2 2 0 0 │
[ecn_marking_pipe_ECT0.py] │ tunnelDipV6 2 2 0 0 │
[ecn_marking_pipe_ECT0.py] │ tunnelL2IdxToPort 1026 1026 0 0 │
[ecn_marking_pipe_ECT0.py] │ tunnelL2Info 3 3 0 0 │
[ecn_marking_pipe_ECT0.py] │ tunnelTermination 51 51 0 0 │
[ecn_marking_pipe_ECT0.py] │ tunnelVniAndVti 4 4 0 0 │
[ecn_marking_pipe_ECT0.py] │ untaggedPktToL3 2 2 0 0 │
[ecn_marking_pipe_ECT0.py] │ vlanEncap 10 10 0 0 │
[ecn_marking_pipe_ECT0.py] │ vxlanVarp 16 16 0 0 │
[ecn_marking_pipe_ECT0.py] │ vxlanVniResolution 2 2 0 0 │
[ecn_marking_pipe_ECT0.py] │ wredAction 208 208 0 0 │
[ecn_marking_pipe_ECT0.py] │ TOTAL 9305 9305 0 0 │
[ecn_marking_pipe_ECT0.py] ╰───────────────────────────────────────────────────────────────────────────────────╯
[ecn_marking_pipe_ECT0.py] ╭──────────────────────────── Paris SDK Ops Statistics ─────────────────────────────╮
[ecn_marking_pipe_ECT0.py] │ Paris SDK Ops 225 │
[ecn_marking_pipe_ECT0.py] │ Passed 225 │
[ecn_marking_pipe_ECT0.py] │ Failed 0 │
[ecn_marking_pipe_ECT0.py] ╰───────────────────────────────────────────────────────────────────────────────────╯
[ecn_marking_pipe_ECT0.py] Completed in 1m48.4s
============================================================
FAILED:
ecn_marking_pipe_ECT0.py
Results: 1 test(s) — 0 passed, 1 failed
============================================================
RESULT: FAIL (109s)
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment