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July 26, 2026 02:48
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| [run_tests] run tmpdir: /tmp/platform-test_4u4gh0xd | |
| [run_tests] cpus=24 sem limits: SEMMSL=32000 SEMMNS=1024000000 SEMOPM=500 SEMMNI=32000 | |
| PYTHONPATH=/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test:/home/dsebastian/workspace/aif/platform-test/prebuilt:/home/dsebastian/workspace/aif/platform-test:/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/install/python:/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/paris-driver/src/Common/testlib:/home/dsebastian/workspace/aif/platform-test/prebuilt/gen-py/aswitch:/home/dsebastian/workspace/aif/platform-test/prebuilt/gen-py/bm_runtime:/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/submodules/behavioral-model/targets/a1na_switch:/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/submodules/behavioral-model/tools | |
| LD_LIBRARY_PATH=/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/install/lib | |
| A1_PLATFORM=fpga | |
| A1_SYS_SW_PATH=/home/dsebastian/workspace/aif/platform-test/submodules/sys-sw | |
| A1NA_SWITCH=/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/submodules/behavioral-model/build-p4p/targets/a1na_switch/a1na_switch | |
| ASAN_OPTIONS=verify_asan_link_order=0:detect_leaks=0:intercept_throw=0 | |
| CRYPTOGRAPHY_OPENSSL_NO_LEGACY=1 | |
| VEPY_REMOTE=0 | |
| VEPY_HOST= | |
| VEPY_DOMAIN=0 | |
| VEPY_PCAP_PATH=/tmp/vepy_rx.pcap | |
| VEPY_RELAY=0 | |
| VEPY_RELAY_HOST= | |
| VEPY_RELAY_PORT=9876 | |
| A1_VEPY=0 | |
| A1_VEPY_REMOTE=0 | |
| [v4_vxlan_decap_switch.py] [devicelib] PRISM_SHM_ROOT=/tmp/platform-test_4u4gh0xd/v4_vxlan_decap_switch.py/prism pid=1770154 | |
| [v4_vxlan_decap_switch.py] | |
| [v4_vxlan_decap_switch.py] --- SDK version --- | |
| [v4_vxlan_decap_switch.py] {"a1-silicon": "sw-emu-special-2026-0703-a2pp-2026-0629", "p4-programs-build": "a2pp-2026-0629", "platform": "fpga"} | |
| [v4_vxlan_decap_switch.py] | |
| [v4_vxlan_decap_switch.py] | |
| [v4_vxlan_decap_switch.py] --- Kernel module setup --- | |
| [v4_vxlan_decap_switch.py] Found FPGA at 0000:21:00.0 | |
| [v4_vxlan_decap_switch.py] Loading /home/dsebastian/workspace/aif/platform-test/submodules/sys-sw/build/paris-driver/src/KernelModule/paris_dev.ko ... | |
| [v4_vxlan_decap_switch.py] 0000:21:00.0 already bound | |
| [v4_vxlan_decap_switch.py] /dev/paris_main ready | |
| [v4_vxlan_decap_switch.py] | |
| [v4_vxlan_decap_switch.py] --- Creating HwPcie + Ham --- | |
| [v4_vxlan_decap_switch.py] HwPcie + Ham created (BAR size=0x8000000) | |
| [v4_vxlan_decap_switch.py] [loadILDmaOffsets] cppyy.cppdef() succeeded | |
| [v4_vxlan_decap_switch.py] [loadILDmaOffsets] Successfully loaded 47 values | |
| [v4_vxlan_decap_switch.py] [loadILDmaOffsets] Result keys: ['FREE_MEM_START_LO', 'FREE_MEM_START_LO_CHn', 'FREE_MEM_START_HI', 'FREE_MEM_START_HI_CHn', 'FREE_MEM_END_LO']... | |
| [v4_vxlan_decap_switch.py] [loadILDmaOffsets] FREE_MEM_WR_PTR_CHn: len=12 | |
| [v4_vxlan_decap_switch.py] | |
| [v4_vxlan_decap_switch.py] --- FPGA version --- | |
| [v4_vxlan_decap_switch.py] {"PROJECT": "hello_pp-vpk180", "ARISTA_FDK_VERSION": "3.1.1", "BUILD_VERSION": "6.6", "PP_VERSION": "C41", "PP_FILENAME": "a2pp-2026-0629/ppu_top-0711a.svm", "AIFABRICS_HASH": "9b52b5aa12ea75219df39fe789b241c993428369", "FPGAEMU_HASH": "8e89189a793cd2c1311ed5c8fa458b6ecfa71053", "TIMESTAMP": "2026-07-24 05:18:16 UTC"} | |
| [v4_vxlan_decap_switch.py] WARNING: FPGA/SDK p4-programs-build version mismatch -- may not work as intended | |
| [v4_vxlan_decap_switch.py] FPGA PP_VERSION: C41 | |
| [v4_vxlan_decap_switch.py] SDK p4-programs-build: a2pp-2026-0629 | |
| [v4_vxlan_decap_switch.py] | |
| [v4_vxlan_decap_switch.py] --- ILDMA channel reset --- | |
| [v4_vxlan_decap_switch.py] chan=0 ctrl=0x00000001 intr=0x00000000 fsm=0x00000000 | |
| [v4_vxlan_decap_switch.py] chan=1 ctrl=0x00000001 intr=0x00000000 fsm=0x00000000 | |
| [v4_vxlan_decap_switch.py] ### mgid 131 device 0 rids [[0, [2, 3, 4], (0, 0, 1)]] | |
| [v4_vxlan_decap_switch.py] ### mgid 232 device 0 rids [[0, [1, 2, 5], (0, 0, 1)]] | |
| [v4_vxlan_decap_switch.py] pvs_add completed | |
| [v4_vxlan_decap_switch.py] [pktgen] pre-send emrg=0 mirr=0 bcnt=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] tm_meta 0x4003818=0x00288000 0x400381c=0x00000000 0x4003820=0x00000000 0x4003824=0x00000000 0x4003814=0x00000041 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress mhe: port=0 bcnt=192 eop=0 err=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea: inport=4 dmac=00:55:44:33:22:11 l2dom=200 routed=0 nh=0x0000 vlan0=0 vlan1=0 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm: eport=1 pkt_len=324 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingress_timestamp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_ingressport: 4 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea decaplen: 50 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_cpureasoncode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_decaptype: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_dmac: '00:55:44:33:22:11' | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_egrl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_encaptype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_ingressporttype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_routed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea hashmd_lag: 27810 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea icos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmd_ingl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea phase0_switchport: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_cfi: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_cos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_exp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_ecn: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_dscp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea tunnelidx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea tunnell2idx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6dipshift: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6blocksize: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6updatedipfromsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6updatesrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6popsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmdsrcport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmddstport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmdprotocol: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmdl4attr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea iecookie0: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea iecookie1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingl2aintf: 130049 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrl2aintf: 2048 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea nh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea csig_type: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea csig_wide_format: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea csig_invalid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ect: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea trimmable: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea localtrimming: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea earlyqdiscardeligible: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea l1_prun_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_mplsttlmode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ptp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flowlet_disabled: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea mirrormgid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_outer_toomanyhdr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_vlan0: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_vlan1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_csigwide: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_csigcompact: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_mpls: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_ip_ip4: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_ip_ip6: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_ip_udp_vxlan: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ip_udp_payload_offset: 25 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm c0_eop: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm c0_eport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm spdd_trace_tag: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm bts: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm csig_val: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm src_port: 4 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm eport: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm ce: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm ct: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm c2cpu: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm mirror: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm dod: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm repl_copy: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm repl_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm repl_id_first: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm pipe_qid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm pkt_length: 324 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm trimmed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm sch_tag_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] sw_tm: pkt_type=0 pkt_dest=0x0001 c2cpu=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] sw_tm: replay eport=1 c2cpu=0 qid=4 | |
| [v4_vxlan_decap_switch.py] [pktgen] emrg[0]: portId=1 err=0 discard=0 new_len=146 final_pkt_size=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] emrg[0] raw data (288B): 005544332211000000000001810000c81234007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 | |
| [v4_vxlan_decap_switch.py] [stitch] newLen=146 dataLen=288 remainLen=128 finalPktSize=0 | |
| [v4_vxlan_decap_switch.py] [stitch] data[130:146]=00786665007866650078666500786665 | |
| [v4_vxlan_decap_switch.py] [stitch] data[146:154]=0000000000000000 (beyond newLen, should be zeros) | |
| [v4_vxlan_decap_switch.py] [stitch] remaining[:]=0078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] mhe: port=0 bcnt=192 eop=0 err=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea: inport=4 dmac=00:55:44:33:22:11 l2dom=200 routed=0 nh=0x0000 vlan0=0 vlan1=0 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm: eport=1 pkt_len=324 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingress_timestamp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_ingressport: 4 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea decaplen: 50 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_cpureasoncode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_decaptype: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_dmac: '00:55:44:33:22:11' | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_egrl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_encaptype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_ingressporttype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_routed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea hashmd_lag: 27810 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea icos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmd_ingl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea phase0_switchport: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_cfi: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_cos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_exp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_ecn: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_dscp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea tunnelidx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea tunnell2idx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6dipshift: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6blocksize: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6updatedipfromsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6updatesrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6popsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmdsrcport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmddstport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmdprotocol: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmdl4attr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea iecookie0: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea iecookie1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingl2aintf: 130049 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrl2aintf: 2048 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea nh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea csig_type: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea csig_wide_format: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea csig_invalid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ect: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea trimmable: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea localtrimming: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea earlyqdiscardeligible: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea l1_prun_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_mplsttlmode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ptp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flowlet_disabled: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea mirrormgid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_outer_toomanyhdr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_vlan0: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_vlan1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_csigwide: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_csigcompact: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_mpls: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_ip_ip4: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_ip_ip6: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_ip_udp_vxlan: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ip_udp_payload_offset: 25 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm c0_eop: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm c0_eport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm spdd_trace_tag: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm bts: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm csig_val: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm src_port: 4 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm eport: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm ce: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm ct: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm c2cpu: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm mirror: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm dod: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm repl_copy: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm repl_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm repl_id_first: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm pipe_qid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm pkt_length: 324 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm trimmed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm sch_tag_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] post-send ctrl=0x00000000 emrg=1 mirr=0 bcnt=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] pre-send emrg=2 mirr=0 bcnt=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] tm_meta 0x4003818=0x00290000 0x400381c=0x00000000 0x4003820=0x00000000 0x4003824=0x00000000 0x4003814=0x00000041 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress mhe: port=0 bcnt=192 eop=0 err=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea: inport=2 dmac=00:55:44:33:22:11 l2dom=200 routed=0 nh=0x0000 vlan0=1 vlan1=0 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm: eport=1 pkt_len=328 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingress_timestamp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_ingressport: 2 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea decaplen: 54 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_cpureasoncode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_decaptype: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_dmac: '00:55:44:33:22:11' | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_egrl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_encaptype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_ingressporttype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_routed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea hashmd_lag: 44436 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea icos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmd_ingl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea phase0_switchport: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_cfi: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_cos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_exp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_ecn: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_dscp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea tunnelidx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea tunnell2idx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6dipshift: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6blocksize: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6updatedipfromsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6updatesrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6popsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmdsrcport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmddstport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmdprotocol: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmdl4attr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea iecookie0: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea iecookie1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingl2aintf: 130049 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrl2aintf: 2048 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea nh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea csig_type: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea csig_wide_format: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea csig_invalid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ect: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea trimmable: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea localtrimming: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea earlyqdiscardeligible: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea l1_prun_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_mplsttlmode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ptp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flowlet_disabled: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea mirrormgid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_outer_toomanyhdr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_vlan0: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_vlan1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_csigwide: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_csigcompact: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_mpls: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_ip_ip4: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_ip_ip6: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_ip_udp_vxlan: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ip_udp_payload_offset: 27 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm c0_eop: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm c0_eport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm spdd_trace_tag: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm bts: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm csig_val: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm src_port: 2 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm eport: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm ce: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm ct: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm c2cpu: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm mirror: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm dod: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm repl_copy: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm repl_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm repl_id_first: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm pipe_qid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm pkt_length: 328 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm trimmed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm sch_tag_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] sw_tm: pkt_type=0 pkt_dest=0x0001 c2cpu=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] sw_tm: replay eport=1 c2cpu=0 qid=4 | |
| [v4_vxlan_decap_switch.py] [pktgen] emrg[0]: portId=1 err=0 discard=0 new_len=142 final_pkt_size=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] emrg[0] raw data (288B): 005544332211000000000001810000c81234007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 | |
| [v4_vxlan_decap_switch.py] [stitch] newLen=142 dataLen=288 remainLen=132 finalPktSize=0 | |
| [v4_vxlan_decap_switch.py] [stitch] data[126:142]=00786665007866650078666500786665 | |
| [v4_vxlan_decap_switch.py] [stitch] data[142:150]=0000000000000000 (beyond newLen, should be zeros) | |
| [v4_vxlan_decap_switch.py] [stitch] remaining[:]=007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] mhe: port=0 bcnt=192 eop=0 err=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea: inport=2 dmac=00:55:44:33:22:11 l2dom=200 routed=0 nh=0x0000 vlan0=1 vlan1=0 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm: eport=1 pkt_len=328 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingress_timestamp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_ingressport: 2 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea decaplen: 54 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_cpureasoncode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_decaptype: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_dmac: '00:55:44:33:22:11' | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_egrl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_encaptype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_ingressporttype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_routed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea hashmd_lag: 44436 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea icos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmd_ingl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea phase0_switchport: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_cfi: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_cos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_exp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_ecn: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_dscp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea tunnelidx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea tunnell2idx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6dipshift: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6blocksize: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6updatedipfromsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6updatesrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6popsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmdsrcport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmddstport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmdprotocol: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmdl4attr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea iecookie0: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea iecookie1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingl2aintf: 130049 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrl2aintf: 2048 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea nh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea csig_type: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea csig_wide_format: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea csig_invalid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ect: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea trimmable: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea localtrimming: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea earlyqdiscardeligible: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea l1_prun_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_mplsttlmode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ptp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flowlet_disabled: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea mirrormgid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_outer_toomanyhdr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_vlan0: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_vlan1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_csigwide: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_csigcompact: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_mpls: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_ip_ip4: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_ip_ip6: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_ip_udp_vxlan: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ip_udp_payload_offset: 27 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm c0_eop: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm c0_eport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm spdd_trace_tag: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm bts: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm csig_val: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm src_port: 2 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm eport: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm ce: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm ct: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm c2cpu: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm mirror: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm dod: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm repl_copy: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm repl_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm repl_id_first: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm pipe_qid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm pkt_length: 328 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm trimmed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm sch_tag_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] post-send ctrl=0x00000000 emrg=1 mirr=0 bcnt=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] pre-send emrg=2 mirr=0 bcnt=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] tm_meta 0x4003818=0x00298000 0x400381c=0x00000000 0x4003820=0x00000000 0x4003824=0x00000000 0x4003814=0x00000041 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress mhe: port=0 bcnt=192 eop=0 err=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea: inport=3 dmac=00:55:44:33:22:11 l2dom=200 routed=0 nh=0x0000 vlan0=1 vlan1=1 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm: eport=1 pkt_len=332 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingress_timestamp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_ingressport: 3 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea decaplen: 54 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_cpureasoncode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_decaptype: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_dmac: '00:55:44:33:22:11' | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_egrl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_encaptype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_ingressporttype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_routed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea hashmd_lag: 20956 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea icos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmd_ingl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea phase0_switchport: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_cfi: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_cos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_exp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_ecn: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_dscp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea tunnelidx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea tunnell2idx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6dipshift: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6blocksize: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6updatedipfromsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6updatesrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6popsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmdsrcport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmddstport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmdprotocol: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmdl4attr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea iecookie0: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea iecookie1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingl2aintf: 130049 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrl2aintf: 2048 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea nh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea csig_type: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea csig_wide_format: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea csig_invalid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ect: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea trimmable: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea localtrimming: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea earlyqdiscardeligible: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea l1_prun_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_mplsttlmode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ptp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flowlet_disabled: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea mirrormgid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_outer_toomanyhdr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_vlan0: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_vlan1: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_csigwide: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_csigcompact: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_mpls: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_ip_ip4: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_ip_ip6: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_ip_udp_vxlan: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ip_udp_payload_offset: 29 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm c0_eop: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm c0_eport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm spdd_trace_tag: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm bts: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm csig_val: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm src_port: 3 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm eport: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm ce: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm ct: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm c2cpu: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm mirror: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm dod: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm repl_copy: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm repl_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm repl_id_first: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm pipe_qid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm pkt_length: 332 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm trimmed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm sch_tag_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] sw_tm: pkt_type=0 pkt_dest=0x0001 c2cpu=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] sw_tm: replay eport=1 c2cpu=0 qid=4 | |
| [v4_vxlan_decap_switch.py] [pktgen] emrg[0]: portId=1 err=0 discard=0 new_len=138 final_pkt_size=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] emrg[0] raw data (288B): 005544332211000000000001810000c81234007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 | |
| [v4_vxlan_decap_switch.py] [stitch] newLen=138 dataLen=288 remainLen=136 finalPktSize=0 | |
| [v4_vxlan_decap_switch.py] [stitch] data[122:138]=00786665007866650078666500786665 | |
| [v4_vxlan_decap_switch.py] [stitch] data[138:146]=0000000000000000 (beyond newLen, should be zeros) | |
| [v4_vxlan_decap_switch.py] [stitch] remaining[:]=00786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] mhe: port=0 bcnt=192 eop=0 err=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea: inport=3 dmac=00:55:44:33:22:11 l2dom=200 routed=0 nh=0x0000 vlan0=1 vlan1=1 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm: eport=1 pkt_len=332 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingress_timestamp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_ingressport: 3 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea decaplen: 54 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_cpureasoncode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_decaptype: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_dmac: '00:55:44:33:22:11' | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_egrl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_encaptype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_ingressporttype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_routed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea hashmd_lag: 20956 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea icos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmd_ingl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea phase0_switchport: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_cfi: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_cos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_exp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_ecn: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_dscp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea tunnelidx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea tunnell2idx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6dipshift: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6blocksize: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6updatedipfromsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6updatesrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6popsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmdsrcport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmddstport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmdprotocol: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmdl4attr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea iecookie0: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea iecookie1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingl2aintf: 130049 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrl2aintf: 2048 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea nh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea csig_type: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea csig_wide_format: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea csig_invalid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ect: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea trimmable: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea localtrimming: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea earlyqdiscardeligible: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea l1_prun_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_mplsttlmode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ptp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flowlet_disabled: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea mirrormgid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_outer_toomanyhdr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_vlan0: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_vlan1: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_csigwide: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_csigcompact: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_mpls: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_ip_ip4: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_ip_ip6: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_ip_udp_vxlan: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ip_udp_payload_offset: 29 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm c0_eop: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm c0_eport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm spdd_trace_tag: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm bts: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm csig_val: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm src_port: 3 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm eport: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm ce: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm ct: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm c2cpu: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm mirror: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm dod: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm repl_copy: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm repl_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm repl_id_first: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm pipe_qid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm pkt_length: 332 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm trimmed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm sch_tag_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] post-send ctrl=0x00000000 emrg=1 mirr=0 bcnt=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] pre-send emrg=2 mirr=0 bcnt=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] tm_meta 0x4003818=0x00290000 0x400381c=0x00000000 0x4003820=0x00000000 0x4003824=0x00000000 0x4003814=0x00000041 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress mhe: port=0 bcnt=192 eop=0 err=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea: inport=2 dmac=FF:FF:FF:FF:FF:FF l2dom=200 routed=0 nh=0x0000 vlan0=1 vlan1=0 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm: eport=104 pkt_len=328 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingress_timestamp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_ingressport: 2 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea decaplen: 54 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_cpureasoncode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_decaptype: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_dmac: 'FF:FF:FF:FF:FF:FF' | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_egrl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_encaptype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_ingressporttype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_routed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea hashmd_lag: 39882 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea icos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmd_ingl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea phase0_switchport: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_cfi: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_cos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_exp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_ecn: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea qosmd_dscp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea tunnelidx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea tunnell2idx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6dipshift: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6blocksize: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6updatedipfromsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6updatesrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea srv6popsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmdsrcport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmddstport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmdprotocol: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingmdl4attr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea iecookie0: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea iecookie1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ingl2aintf: 130049 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrl2aintf: 188648 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea nh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea csig_type: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea csig_wide_format: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea csig_invalid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ect: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea trimmable: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea localtrimming: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea earlyqdiscardeligible: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea l1_prun_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea egrmd_mplsttlmode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ptp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flowlet_disabled: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea mirrormgid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_outer_toomanyhdr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_vlan0: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_vlan1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_csigwide: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_csigcompact: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_mpls: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_ip_ip4: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_ip_ip6: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea flag_ip_udp_vxlan: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress ia2ea ip_udp_payload_offset: 27 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm c0_eop: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm c0_eport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm spdd_trace_tag: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm bts: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm csig_val: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm src_port: 2 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm eport: 104 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm ce: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm ct: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm c2cpu: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm mirror: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm dod: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm repl_copy: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm repl_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm repl_id_first: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm pipe_qid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm pkt_length: 328 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm trimmed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] ingress tm sch_tag_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] sw_tm: pkt_type=1 pkt_dest=0x00e8 c2cpu=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] sw_tm: pruned port 2 (l2_prun_id=2) | |
| [v4_vxlan_decap_switch.py] [pktgen] sw_tm: replay eport=1 c2cpu=0 qid=4 | |
| [v4_vxlan_decap_switch.py] [pktgen] emrg[0]: portId=1 err=0 discard=0 new_len=142 final_pkt_size=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] emrg[0] raw data (288B): ffffffffffff000000000001810000c81234007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 | |
| [v4_vxlan_decap_switch.py] [stitch] newLen=142 dataLen=288 remainLen=132 finalPktSize=0 | |
| [v4_vxlan_decap_switch.py] [stitch] data[126:142]=00786665007866650078666500786665 | |
| [v4_vxlan_decap_switch.py] [stitch] data[142:150]=0000000000000000 (beyond newLen, should be zeros) | |
| [v4_vxlan_decap_switch.py] [stitch] remaining[:]=007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] mhe: port=0 bcnt=192 eop=0 err=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea: inport=2 dmac=FF:FF:FF:FF:FF:FF l2dom=200 routed=0 nh=0x0000 vlan0=1 vlan1=0 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm: eport=104 pkt_len=328 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingress_timestamp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_ingressport: 2 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea decaplen: 54 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_cpureasoncode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_decaptype: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_dmac: 'FF:FF:FF:FF:FF:FF' | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_egrl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_encaptype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_ingressporttype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_routed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea hashmd_lag: 39882 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea icos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmd_ingl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea phase0_switchport: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_cfi: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_cos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_exp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_ecn: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea qosmd_dscp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea tunnelidx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea tunnell2idx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6dipshift: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6blocksize: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6updatedipfromsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6updatesrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea srv6popsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmdsrcport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmddstport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmdprotocol: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingmdl4attr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea iecookie0: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea iecookie1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ingl2aintf: 130049 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrl2aintf: 188648 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea nh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea csig_type: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea csig_wide_format: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea csig_invalid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ect: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea trimmable: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea localtrimming: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea earlyqdiscardeligible: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea l1_prun_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea egrmd_mplsttlmode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ptp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flowlet_disabled: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea mirrormgid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_outer_toomanyhdr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_vlan0: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_vlan1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_csigwide: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_csigcompact: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_mpls: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_ip_ip4: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_ip_ip6: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea flag_ip_udp_vxlan: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] ia2ea ip_udp_payload_offset: 27 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm c0_eop: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm c0_eport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm spdd_trace_tag: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm bts: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm csig_val: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm src_port: 2 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm eport: 104 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm ce: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm ct: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm c2cpu: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm mirror: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm dod: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm repl_copy: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm repl_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm repl_id_first: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm pipe_qid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm pkt_length: 328 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm trimmed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[0] tm sch_tag_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] sw_tm: replay eport=5 c2cpu=0 qid=20 | |
| [v4_vxlan_decap_switch.py] [pktgen] emrg[1]: portId=5 err=0 discard=0 new_len=142 final_pkt_size=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] emrg[1] raw data (288B): ffffffffffff000000000001810000c81234007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 | |
| [v4_vxlan_decap_switch.py] [stitch] newLen=142 dataLen=288 remainLen=132 finalPktSize=0 | |
| [v4_vxlan_decap_switch.py] [stitch] data[126:142]=00786665007866650078666500786665 | |
| [v4_vxlan_decap_switch.py] [stitch] data[142:150]=0000000000000000 (beyond newLen, should be zeros) | |
| [v4_vxlan_decap_switch.py] [stitch] remaining[:]=007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665007866650078666500786665 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] mhe: port=0 bcnt=192 eop=0 err=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea: inport=2 dmac=FF:FF:FF:FF:FF:FF l2dom=200 routed=0 nh=0x0000 vlan0=1 vlan1=0 ip4=0 ip6=0 l4proto=0 srcport=0 dstport=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm: eport=104 pkt_len=328 c2cpu=0 mirror=0 repl_id=0x0000 pipe_qid=0 sch_tag=0x000 bts=0 dod=0 ce=0 ct=0 csig_val=0x00000 trimmed=0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea ingress_timestamp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea egrmd_ingressport: 2 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea decaplen: 54 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea egrmd_cpureasoncode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea egrmd_decaptype: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea egrmd_dmac: 'FF:FF:FF:FF:FF:FF' | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea egrmd_egrl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea egrmd_encaptype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea egrmd_ingressporttype: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea egrmd_routed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea hashmd_lag: 39882 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea icos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea ingmd_ingl2domain: 200 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea phase0_switchport: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea qosmd_cfi: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea qosmd_cos: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea qosmd_exp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea qosmd_ecn: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea qosmd_dscp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea tunnelidx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea tunnell2idx: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea srv6dipshift: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea srv6blocksize: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea srv6updatedipfromsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea srv6updatesrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea srv6popsrh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea ingmdsrcport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea ingmddstport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea ingmdprotocol: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea ingmdl4attr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea iecookie0: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea iecookie1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea ingl2aintf: 130049 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea egrl2aintf: 188648 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea nh: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea csig_type: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea csig_wide_format: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea csig_invalid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea ect: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea trimmable: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea localtrimming: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea earlyqdiscardeligible: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea l1_prun_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea egrmd_mplsttlmode: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea ptp: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea flowlet_disabled: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea mirrormgid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea flag_outer_toomanyhdr: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea flag_vlan0: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea flag_vlan1: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea flag_csigwide: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea flag_csigcompact: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea flag_mpls: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea flag_ip_ip4: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea flag_ip_ip6: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea flag_ip_udp_vxlan: 1 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] ia2ea ip_udp_payload_offset: 27 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm c0_eop: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm c0_eport: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm spdd_trace_tag: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm bts: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm csig_val: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm src_port: 2 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm eport: 104 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm ce: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm ct: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm c2cpu: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm mirror: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm dod: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm repl_copy: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm repl_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm repl_id_first: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm pipe_qid: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm pkt_length: 328 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm trimmed: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] mhe[1] tm sch_tag_id: 0 | |
| [v4_vxlan_decap_switch.py] [pktgen] post-send ctrl=0x00000000 emrg=2 mirr=0 bcnt=0 | |
| [v4_vxlan_decap_switch.py] Traceback (most recent call last): | |
| [v4_vxlan_decap_switch.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/p4testlib.py", line 521, in verifyPkts | |
| [v4_vxlan_decap_switch.py] pkts = self.ports[ port ].expectTx( timeout=timeout ) | |
| [v4_vxlan_decap_switch.py] ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
| [v4_vxlan_decap_switch.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/platformlib/port_base.py", line 156, in expectTx | |
| [v4_vxlan_decap_switch.py] waitFor( self._hasPackets, timeout=timeout ) | |
| [v4_vxlan_decap_switch.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/testutils.py", line 51, in waitFor | |
| [v4_vxlan_decap_switch.py] raise TimeoutError( excMsg ) | |
| [v4_vxlan_decap_switch.py] TimeoutError: timed out | |
| [v4_vxlan_decap_switch.py] | |
| [v4_vxlan_decap_switch.py] During handling of the above exception, another exception occurred: | |
| [v4_vxlan_decap_switch.py] | |
| [v4_vxlan_decap_switch.py] Traceback (most recent call last): | |
| [v4_vxlan_decap_switch.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/v4_vxlan_decap_switch.py", line 326, in <module> | |
| [v4_vxlan_decap_switch.py] Ipv4VxlanDecapSwitch().run() | |
| [v4_vxlan_decap_switch.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/v4_vxlan_decap_switch.py", line 320, in run | |
| [v4_vxlan_decap_switch.py] self.testPostDecapFlood() | |
| [v4_vxlan_decap_switch.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/v4_vxlan_decap_switch.py", line 248, in testPostDecapFlood | |
| [v4_vxlan_decap_switch.py] self.verifyPkts( self.egressPorts[ 2 ], | |
| [v4_vxlan_decap_switch.py] File "/home/dsebastian/workspace/aif/platform-test/submodules/p4-programs/test/p4testlib.py", line 523, in verifyPkts | |
| [v4_vxlan_decap_switch.py] raise AssertionError( assertMsg | |
| [v4_vxlan_decap_switch.py] AssertionError: Expected packets on port 2 but timed out | |
| [v4_vxlan_decap_switch.py] WARNING: rmmod failed: rmmod: ERROR: Module paris_dev is in use | |
| [v4_vxlan_decap_switch.py] Completed in 0m30.6s | |
| ============================================================ | |
| FAILED: | |
| v4_vxlan_decap_switch.py::Ipv4VxlanDecapSwitch.testPostDecapFlood | |
| Results: 1 test(s) — 0 passed, 0 vdiff, 1 failed | |
| ============================================================ |
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