lockfree knowledge check

.md

1. How is the following code broken?
2. Why does it work on x86? Why not on arm?

#include "relacy/context.hpp"
#include "relacy/memory_order.hpp"
#include <relacy/relacy.hpp>

static constexpr size_t THREADS = 2;
static constexpr int ITERS = 4;

struct Test : rl::test_suite<Test, THREADS> {
  rl::atomic<bool> flag{false};
  rl::atomic<int> data{0};

  void thread(unsigned thread_id) {
    if (thread_id == 0) {
      for (int i = 0; i < ITERS; ++i) {
        if (!flag.load(rl::memory_order_relaxed)) {
          data.store(42, rl::memory_order_relaxed);
          flag.store(true, rl::memory_order_relaxed);
        } else {
          flag.store(false, rl::memory_order_relaxed);
          data.store(0, rl::memory_order_relaxed);
        }
        rl::yield(1, RL_INFO);
      }
    } else {
      for (int i = 0; i < ITERS; ++i) {
        if (flag.load(rl::memory_order_acq_rel)) {
          RL_ASSERT(data.load(rl::memory_order_relaxed) == 42);
        }
        rl::yield(1, RL_INFO);
      }
    }
  }
};

int main() { rl::simulate<Test>(); }