serial_tx.vhdl

entity serial_tx is
    Port ( 
	  clk_50 : in  STD_LOGIC;
	  reset : in std_logic;

	  tx : out  STD_LOGIC;	
	  tx_idle : out std_logic;
	  din : in  STD_LOGIC_VECTOR(7 downto 0);
          din_strobe : in  STD_LOGIC
);
end serial_tx;



architecture Behavioral of serial_tx is

signal tx_bit_counter, tx_bit_counter_next : std_logic_vector(3 downto 0);
signal tx_baud_generator_counter, tx_baud_generator_counter_next : std_logic_vector(9 downto 0);
signal tx_baud_tick, tx_counter_maxed, tx_idle_reg : std_logic;
signal tx_data_reg : std_logic_vector(7 downto 0);

constant tx_baud_rate_modulo : integer := 434;	--	115200bps 1 baud = ~8,680uS 

begin

	----------------- Tx stuff -------------------------
	
	process (clk_50, reset)
	begin
		if (reset = '1' ) then
			tx_bit_counter <= "1001";
			tx_idle_reg <= '1';
			tx_baud_generator_counter <= (others => '0');
		else
			if (clk_50'event and clk_50 = '1') then
				-- Tx stuff
				if (din_strobe = '1') then
					tx_idle_reg <= '0';			-- signal master that tx is busy
					tx_data_reg <= din;
				else
					if (tx_bit_counter = "1001" and tx_baud_tick = '1') then
						tx_idle_reg <= '1';		-- signal master that tx is idle
					end if;
				end if;
				
				tx_bit_counter <= tx_bit_counter_next;
				tx_baud_generator_counter <= tx_baud_generator_counter_next;

			end if;
		end if;
	end process;
	
	tx_idle <= tx_idle_reg;
	tx_baud_tick <= '1' when tx_baud_generator_counter = tx_baud_rate_modulo - 1 else '0';

	-- Reset counter if modulo reached or moving to start bit state
	tx_baud_generator_counter_next <= (others => '0') when tx_baud_tick = '1' or din_strobe = '1' else	        
												 tx_baud_generator_counter + 1;
					
	tx_bit_counter_next <= (others => '0') when din_strobe = '1' else 
								  tx_bit_counter + 1 when tx_baud_tick = '1' and tx_bit_counter /= 9 else
								  tx_bit_counter;


						
	tx <= 	'0'	           when tx_bit_counter = 0 else		-- start bit
			tx_data_reg(0) when tx_bit_counter = 1 else
			tx_data_reg(1) when tx_bit_counter = 2 else
			tx_data_reg(2) when tx_bit_counter = 3 else
			tx_data_reg(3) when tx_bit_counter = 4 else
			tx_data_reg(4) when tx_bit_counter = 5 else
			tx_data_reg(5) when tx_bit_counter = 6 else
			tx_data_reg(6) when tx_bit_counter = 7 else
			tx_data_reg(7) when tx_bit_counter = 8 else
			'1';											-- stop bit
			
end Behavioral;