Created
April 22, 2025 14:37
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virt.dts
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/dts-v1/; | |
/ { | |
#size-cells = <0x02>; | |
#address-cells = <0x02>; | |
compatible = "linux,dummy-loongson3"; | |
platform-bus@16000000 { | |
interrupt-parent = <0x8003>; | |
ranges = <0x00 0x00 0x16000000 0x2000000>; | |
#address-cells = <0x01>; | |
#size-cells = <0x01>; | |
compatible = "qemu,platform\0simple-bus"; | |
}; | |
rtc@100d0100 { | |
interrupt-parent = <0x8003>; | |
interrupts = <0x03 0x04>; | |
reg = <0x00 0x100d0100 0x00 0x100>; | |
compatible = "loongson,ls7a-rtc"; | |
}; | |
serial@1fe001e0 { | |
interrupt-parent = <0x8003>; | |
interrupts = <0x02 0x04>; | |
clock-frequency = <0x5f5e100>; | |
reg = <0x00 0x1fe001e0 0x00 0x100>; | |
compatible = "ns16550a"; | |
}; | |
pcie@20000000 { | |
interrupt-map-mask = <0x1800 0x00 0x00 0x07>; | |
interrupt-map = <0x00 0x00 0x00 0x01 0x8003 0x10 0x00 0x00 0x00 0x02 0x8003 0x11 0x00 0x00 0x00 0x03 0x8003 0x12 0x00 0x00 0x00 0x04 0x8003 0x13 0x800 0x00 0x00 0x01 0x8003 0x11 0x800 0x00 0x00 0x02 0x8003 0x12 0x800 0x00 0x00 0x03 0x8003 0x13 0x800 0x00 0x00 0x04 0x8003 0x10 0x1000 0x00 0x00 0x01 0x8003 0x12 0x1000 0x00 0x00 0x02 0x8003 0x13 0x1000 0x00 0x00 0x03 0x8003 0x10 0x1000 0x00 0x00 0x04 0x8003 0x11 0x1800 0x00 0x00 0x01 0x8003 0x13 0x1800 0x00 0x00 0x02 0x8003 0x10 0x1800 0x00 0x00 0x03 0x8003 0x11 0x1800 0x00 0x00 0x04 0x8003 0x12>; | |
msi-map = <0x00 0x8004 0x00 0x10000>; | |
ranges = <0x1000000 0x00 0x4000 0x00 0x18004000 0x00 0xc000 0x2000000 0x00 0x40000000 0x00 0x40000000 0x00 0x40000000>; | |
reg = <0x00 0x20000000 0x00 0x8000000>; | |
dma-coherent; | |
bus-range = <0x00 0x7f>; | |
linux,pci-domain = <0x00>; | |
#size-cells = <0x02>; | |
#address-cells = <0x03>; | |
device_type = "pci"; | |
compatible = "pci-host-ecam-generic"; | |
}; | |
msi@2ff00000 { | |
loongson,msi-num-vecs = <0xe0>; | |
loongson,msi-base-vec = <0x20>; | |
interrupt-parent = <0x8002>; | |
interrupt-controller; | |
reg = <0x00 0x2ff00000 0x00 0x08>; | |
compatible = "loongson,pch-msi-1.0"; | |
phandle = <0x8004>; | |
}; | |
platic@10000000 { | |
loongson,pic-base-vec = <0x00>; | |
interrupt-parent = <0x8002>; | |
#interrupt-cells = <0x02>; | |
interrupt-controller; | |
reg = <0x00 0x10000000 0x00 0x400>; | |
compatible = "loongson,pch-pic-1.0"; | |
phandle = <0x8003>; | |
}; | |
eiointc@1400 { | |
reg = <0x00 0x1400 0x00 0x800>; | |
interrupts = <0x03>; | |
interrupt-parent = <0x8001>; | |
#interrupt-cells = <0x01>; | |
interrupt-controller; | |
compatible = "loongson,ls2k2000-eiointc"; | |
phandle = <0x8002>; | |
}; | |
cpuic { | |
#interrupt-cells = <0x01>; | |
interrupt-controller; | |
compatible = "loongson,cpu-interrupt-controller"; | |
phandle = <0x8001>; | |
}; | |
flash@1c000000 { | |
bank-width = <0x04>; | |
reg = <0x00 0x1c000000 0x00 0x1000000 0x00 0x1d000000 0x00 0x1000000>; | |
compatible = "cfi-flash"; | |
}; | |
fw_cfg@1e020000 { | |
dma-coherent; | |
reg = <0x00 0x1e020000 0x00 0x18>; | |
compatible = "qemu,fw-cfg-mmio"; | |
}; | |
memory@80000000 { | |
device_type = "memory"; | |
reg = <0x00 0x80000000 0x00 0xf0000000>; | |
}; | |
memory@0 { | |
device_type = "memory"; | |
reg = <0x00 0x00 0x00 0x10000000>; | |
}; | |
cpus { | |
#size-cells = <0x00>; | |
#address-cells = <0x01>; | |
cpu-map { | |
socket0 { | |
core0 { | |
cpu = <0x8000>; | |
}; | |
}; | |
}; | |
cpu@0 { | |
phandle = <0x8000>; | |
reg = <0x00>; | |
compatible = "loongarch,Loongson-3A5000"; | |
device_type = "cpu"; | |
}; | |
}; | |
chosen { | |
stdout-path = "/serial@1fe001e0"; | |
}; | |
}; |
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