Keep in mind that M is the contents of the memory location specified
by HL.
Opcode | Operand | Description |
MVI | [Rd/M], Imm | Move 8-bit immediate |
LDA | IAddr | Load to 16bit addr to A |
LDAX | Reg Pair | Indirect load addr to A |
LXI | Reg Pair, Imm16 | Load 16bit imm to reg pair |
LHLD | IAddr | Load H-L |
STA | IAddr | Store A direct |
STAX | Reg Pair | Store A indirect |
SHLD | IAddr | Store HL direct |
XCHG | | Exchange HL with DE |
SPHL | | SP = HL |
XTHL | | Exchange HL with top of stack |
PCHL | | PC=HL |
PUSH | Reg Pair | Push reg pair in stack |
POP | Reg Pair | Pop stack into reg-pair |
OUT | Imm8(port addr) | A to 8-bit port |
IN | Imm8(port addr) | 8-bit port to A |
Arithmetic results are always stored in the accumulator
Opcode | Operand | Description | Flags |
ADD | [R/M] | A += [R/M] | All |
ADC | [R/M] | A += [R/M] + CY(Carry) | All |
ADI | Imm8 | A += Imm8 | All |
ACI | Imm8 | A += Imm8 + CY(Carry) | All |
DAD | RegPair | HL += Reg Pair | CY |
INR | [R/M] | [R/M] += 1 | All |
INX | RegPair | RegPair += 1 | None |
SUB | [R/M] | A -= [R/M] | All |
SBB | [R/M] | A -= [R/M] - CY(Borrow) | All |
SUI | Imm8 | A -= Imm8 | All |
SBI | Imm8 | A -= Imm8 - CY(Borrow) | All |
DCR | [R/M] | [R/M] -= 1 | All |
DCX | RegPair | RegPair -= 1 | None |
The flags below not in order.
Flag | Symbol | Description |
Zero | Z | Result is 0 |
Sign | S | If D7 is set |
Parity | P | Number of 1s is even |
Carry | CY | Extra bit in result |
Auxilary Carry | AC | Carry of the 4 LSB arithmetic operation |
| | |
Opcode | Operand | Description | Flags |
CMP | [R/M] | Flags as if A-R: CY=(A<R), Z=(A==R) | CY,Z |
CPI | Imm8 | <see above> | CY,Z |
ANA | [R/M] | A &= R | All (CY=0, AC=1) |
ANI | Imm8 | A &= I | All (CY=0, AC=1) |
ORA | [R/M] | A |= R | All (CY=0, AC=0) |
ORI | Imm8 | A |= I | All (CY=0, AC=0) |
XRA | [R/M] | A ^= R | All (CY=1, AC=1) |
XRI | Imm8 | A ^= I | All (CY=1, AC=1) |
RLC | | Rotate left updating CY | CY |
RAL | | Rotate left through CY | CY |
RAR | | Rotate right through carry | CY |
CMA | | Complement A | None |
CMC | | Complement CY | CY |
STC | | CY = 1 | CY |
Opcode | Operand | Description |
JMP | IAddr | Jump unconditionally |
J[flag] | IAddr | Jump conditionally depending on flag (see below) |
CALL | IAddr | Push next instr in stack and jump to address |
C[flag] | IAddr | Conditional call depending on flag (see below) |
RET | | Return unconditionally (use top two bytes of stack) |
R[flag] | | Return according to flag (see below) |
RST | 0-7 | Jump to one of 7 addresses: arg * 0x8 |
In conditional branching opcodes we saw extensions to opcodes
denoted by [flag]. Here are their meanings.
Extension | Description |
C | CY |
NC | Not CY |
P | Not S (result was positive) |
M | S (result was negative) |
Z | Z |
NZ | Not Z |
PE | P (Parity Even) |
PO | not P (Parity Odd) |
Opcode | Operand | Description |
NOP | | No Operation |
HLT | | Halt. Until interupt or reset. |
DI | | Disable interrupts (except the TRAP interrupt) |
EI | | Enable interrupts |
RIM | | Read interrupt status of 7.5, 6.5 and 5.5 and read serial data input bit |
SIM | | Set interrupt mask for 7.5, 6.5 and 5.5 and write to the serial data output bit |
- 8214: Priority Interrupt Controller