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Created January 28, 2013 23:45
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Instruction Set of 8085

Keep in mind that M is the contents of the memory location specified by HL.

Data Transfer

OpcodeOperandDescription
MVI[Rd/M], ImmMove 8-bit immediate
LDAIAddrLoad to 16bit addr to A
LDAXReg PairIndirect load addr to A
LXIReg Pair, Imm16Load 16bit imm to reg pair
LHLDIAddrLoad H-L
STAIAddrStore A direct
STAXReg PairStore A indirect
SHLDIAddrStore HL direct
XCHGExchange HL with DE
SPHLSP = HL
XTHLExchange HL with top of stack
PCHLPC=HL
PUSHReg PairPush reg pair in stack
POPReg PairPop stack into reg-pair
OUTImm8(port addr)A to 8-bit port
INImm8(port addr)8-bit port to A

Arithmetic

Arithmetic results are always stored in the accumulator

OpcodeOperandDescriptionFlags
ADD[R/M]A += [R/M]All
ADC[R/M]A += [R/M] + CY(Carry)All
ADIImm8A += Imm8All
ACIImm8A += Imm8 + CY(Carry)All
DADRegPairHL += Reg PairCY
INR[R/M][R/M] += 1All
INXRegPairRegPair += 1None
SUB[R/M]A -= [R/M]All
SBB[R/M]A -= [R/M] - CY(Borrow)All
SUIImm8A -= Imm8All
SBIImm8A -= Imm8 - CY(Borrow)All
DCR[R/M][R/M] -= 1All
DCXRegPairRegPair -= 1None

Flags

The flags below not in order.

FlagSymbolDescription
ZeroZResult is 0
SignSIf D7 is set
ParityPNumber of 1s is even
CarryCYExtra bit in result
Auxilary CarryACCarry of the 4 LSB arithmetic operation

Logic

OpcodeOperandDescriptionFlags
CMP[R/M]Flags as if A-R: CY=(A<R), Z=(A==R)CY,Z
CPIImm8<see above>CY,Z
ANA[R/M]A &= RAll (CY=0, AC=1)
ANIImm8A &= IAll (CY=0, AC=1)
ORA[R/M]A |= RAll (CY=0, AC=0)
ORIImm8A |= IAll (CY=0, AC=0)
XRA[R/M]A ^= RAll (CY=1, AC=1)
XRIImm8A ^= IAll (CY=1, AC=1)
RLCRotate left updating CYCY
RALRotate left through CYCY
RARRotate right through carryCY
CMAComplement ANone
CMCComplement CYCY
STCCY = 1CY

Branching

OpcodeOperandDescription
JMPIAddrJump unconditionally
J[flag]IAddrJump conditionally depending on flag (see below)
CALLIAddrPush next instr in stack and jump to address
C[flag]IAddrConditional call depending on flag (see below)
RETReturn unconditionally (use top two bytes of stack)
R[flag]Return according to flag (see below)
RST0-7Jump to one of 7 addresses: arg * 0x8

Conditional Jumps

In conditional branching opcodes we saw extensions to opcodes denoted by [flag]. Here are their meanings.

ExtensionDescription
CCY
NCNot CY
PNot S (result was positive)
MS (result was negative)
ZZ
NZNot Z
PEP (Parity Even)
POnot P (Parity Odd)

Control

OpcodeOperandDescription
NOPNo Operation
HLTHalt. Until interupt or reset.
DIDisable interrupts (except the TRAP interrupt)
EIEnable interrupts
RIMRead interrupt status of 7.5, 6.5 and 5.5 and read serial data input bit
SIMSet interrupt mask for 7.5, 6.5 and 5.5 and write to the serial data output bit

Interrupts

Chips

  • 8214: Priority Interrupt Controller
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