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patch to nRF5_SDK_14.2.0_17b948a to build generic DFU bootloader for devices without 32kHz crystal (=internal RC oscillator is used), package signing verification is disabled
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sdk14.2-DfuTarg-LF_RC.diff
diff -Naur nRF5_SDK_14.2.0_17b948a/components/boards/custom_board.h nRF5_SDK_14.2.0/components/boards/custom_board.h
--- nRF5_SDK_14.2.0_17b948a/components/boards/custom_board.h 1970-01-01 01:00:00.000000000 +0100
+++ nRF5_SDK_14.2.0/components/boards/custom_board.h 2021-03-10 19:26:42.386034500 +0100
@@ -0,0 +1,173 @@
+/**
+ * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ * Semiconductor ASA integrated circuit in a product or a software update for
+ * such product, must reproduce the above copyright notice, this list of
+ * conditions and the following disclaimer in the documentation and/or other
+ * materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * contributors may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ * Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ * engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+#ifndef PCA10040_H
+#define PCA10040_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "nrf_gpio.h"
+
+// LEDs definitions
+#define LEDS_NUMBER 0
+
+#define LED_START 27
+#define LED_1 27
+#define LED_STOP 27
+
+#define LEDS_ACTIVE_STATE 0
+
+#define LEDS_INV_MASK LEDS_MASK
+
+#define LEDS_LIST { LED_1 }
+
+#define BSP_LED_0 LED_1
+
+#define BUTTONS_NUMBER 1
+
+#define BUTTON_START 17
+#define BUTTON_1 17
+#define BUTTON_STOP 17
+#define BUTTON_PULL NRF_GPIO_PIN_PULLUP
+
+#define BUTTONS_ACTIVE_STATE 0
+
+#define BUTTONS_LIST { BUTTON_1 }
+
+#define BSP_BUTTON_0 BUTTON_1
+
+#if false
+#define RX_PIN_NUMBER 8
+#define TX_PIN_NUMBER 6
+#define CTS_PIN_NUMBER 7
+#define RTS_PIN_NUMBER 5
+#define HWFC true
+
+#define SPIS_MISO_PIN 28 // SPI MISO signal.
+#define SPIS_CSN_PIN 12 // SPI CSN signal.
+#define SPIS_MOSI_PIN 25 // SPI MOSI signal.
+#define SPIS_SCK_PIN 29 // SPI SCK signal.
+
+#define SPIM0_SCK_PIN 29 // SPI clock GPIO pin number.
+#define SPIM0_MOSI_PIN 25 // SPI Master Out Slave In GPIO pin number.
+#define SPIM0_MISO_PIN 28 // SPI Master In Slave Out GPIO pin number.
+#define SPIM0_SS_PIN 12 // SPI Slave Select GPIO pin number.
+
+#define SPIM1_SCK_PIN 2 // SPI clock GPIO pin number.
+#define SPIM1_MOSI_PIN 3 // SPI Master Out Slave In GPIO pin number.
+#define SPIM1_MISO_PIN 4 // SPI Master In Slave Out GPIO pin number.
+#define SPIM1_SS_PIN 5 // SPI Slave Select GPIO pin number.
+
+#define SPIM2_SCK_PIN 12 // SPI clock GPIO pin number.
+#define SPIM2_MOSI_PIN 13 // SPI Master Out Slave In GPIO pin number.
+#define SPIM2_MISO_PIN 14 // SPI Master In Slave Out GPIO pin number.
+#define SPIM2_SS_PIN 15 // SPI Slave Select GPIO pin number.
+
+// serialization APPLICATION board - temp. setup for running serialized MEMU tests
+#define SER_APP_RX_PIN 23 // UART RX pin number.
+#define SER_APP_TX_PIN 24 // UART TX pin number.
+#define SER_APP_CTS_PIN 2 // UART Clear To Send pin number.
+#define SER_APP_RTS_PIN 25 // UART Request To Send pin number.
+
+#define SER_APP_SPIM0_SCK_PIN 27 // SPI clock GPIO pin number.
+#define SER_APP_SPIM0_MOSI_PIN 2 // SPI Master Out Slave In GPIO pin number
+#define SER_APP_SPIM0_MISO_PIN 26 // SPI Master In Slave Out GPIO pin number
+#define SER_APP_SPIM0_SS_PIN 23 // SPI Slave Select GPIO pin number
+#define SER_APP_SPIM0_RDY_PIN 25 // SPI READY GPIO pin number
+#define SER_APP_SPIM0_REQ_PIN 24 // SPI REQUEST GPIO pin number
+
+// serialization CONNECTIVITY board
+#define SER_CON_RX_PIN 24 // UART RX pin number.
+#define SER_CON_TX_PIN 23 // UART TX pin number.
+#define SER_CON_CTS_PIN 25 // UART Clear To Send pin number. Not used if HWFC is set to false.
+#define SER_CON_RTS_PIN 2 // UART Request To Send pin number. Not used if HWFC is set to false.
+
+
+#define SER_CON_SPIS_SCK_PIN 27 // SPI SCK signal.
+#define SER_CON_SPIS_MOSI_PIN 2 // SPI MOSI signal.
+#define SER_CON_SPIS_MISO_PIN 26 // SPI MISO signal.
+#define SER_CON_SPIS_CSN_PIN 23 // SPI CSN signal.
+#define SER_CON_SPIS_RDY_PIN 25 // SPI READY GPIO pin number.
+#define SER_CON_SPIS_REQ_PIN 24 // SPI REQUEST GPIO pin number.
+
+#define SER_CONN_CHIP_RESET_PIN 11 // Pin used to reset connectivity chip
+
+
+// Arduino board mappings
+#define ARDUINO_SCL_PIN 27 // SCL signal pin
+#define ARDUINO_SDA_PIN 26 // SDA signal pin
+#define ARDUINO_AREF_PIN 2 // Aref pin
+#define ARDUINO_13_PIN 25 // Digital pin 13
+#define ARDUINO_12_PIN 24 // Digital pin 12
+#define ARDUINO_11_PIN 23 // Digital pin 11
+#define ARDUINO_10_PIN 22 // Digital pin 10
+#define ARDUINO_9_PIN 20 // Digital pin 9
+#define ARDUINO_8_PIN 19 // Digital pin 8
+
+#define ARDUINO_7_PIN 18 // Digital pin 7
+#define ARDUINO_6_PIN 17 // Digital pin 6
+#define ARDUINO_5_PIN 16 // Digital pin 5
+#define ARDUINO_4_PIN 15 // Digital pin 4
+#define ARDUINO_3_PIN 14 // Digital pin 3
+#define ARDUINO_2_PIN 13 // Digital pin 2
+#define ARDUINO_1_PIN 12 // Digital pin 1
+#define ARDUINO_0_PIN 11 // Digital pin 0
+
+#define ARDUINO_A0_PIN 3 // Analog channel 0
+#define ARDUINO_A1_PIN 4 // Analog channel 1
+#define ARDUINO_A2_PIN 28 // Analog channel 2
+#define ARDUINO_A3_PIN 29 // Analog channel 3
+#define ARDUINO_A4_PIN 30 // Analog channel 4
+#define ARDUINO_A5_PIN 31 // Analog channel 5
+
+#endif
+
+// Low frequency clock source to be used by the SoftDevice
+#define NRF_CLOCK_LFCLKSRC {.source = NRF_CLOCK_LF_SRC_RC, \
+ .rc_ctiv = 16, \
+ .rc_temp_ctiv = 2, \
+ .accuracy = NRF_CLOCK_LF_ACCURACY_20_PPM}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // custom board
diff -Naur nRF5_SDK_14.2.0_17b948a/components/libraries/bootloader/ble_dfu/nrf_ble_dfu.c nRF5_SDK_14.2.0/components/libraries/bootloader/ble_dfu/nrf_ble_dfu.c
--- nRF5_SDK_14.2.0_17b948a/components/libraries/bootloader/ble_dfu/nrf_ble_dfu.c 2021-03-13 22:33:20.510867200 +0100
+++ nRF5_SDK_14.2.0/components/libraries/bootloader/ble_dfu/nrf_ble_dfu.c 2021-03-10 19:11:00.812806100 +0100
@@ -57,9 +57,10 @@
#include "nrf_dfu_svci.h"
#include "nrf_dfu_settings.h"
-
+#if LEDS_NUMBER>0
#define ADVERTISING_LED_PIN_NO BSP_LED_0 /**< Is on when device is advertising. */
#define CONNECTED_LED_PIN_NO BSP_LED_1 /**< Is on when device has connected. */
+#endif
#define DEVICE_NAME "DfuTarg" /**< Name of device included in the advertising data. Must be shorter than or equal to 20 bytes. */
#define MANUFACTURER_NAME "NordicSemiconductor" /**< Manufacturer. Will be passed to Device Information Service. */
@@ -220,8 +221,10 @@
err_code = sd_ble_gap_adv_start(&adv_params, APP_BLE_CONN_CFG_TAG);
VERIFY_SUCCESS(err_code);
+#if LEDS_NUMBER>0
nrf_gpio_pin_clear(ADVERTISING_LED_PIN_NO);
nrf_gpio_pin_set(CONNECTED_LED_PIN_NO);
+#endif
return NRF_SUCCESS;
}
@@ -232,7 +235,10 @@
static void advertising_stop(void)
{
(void)sd_ble_gap_adv_stop();
+
+#if LEDS_NUMBER>0
nrf_gpio_pin_set(ADVERTISING_LED_PIN_NO);
+#endif
}
@@ -660,8 +666,10 @@
{
case BLE_GAP_EVT_CONNECTED:
{
+#if LEDS_NUMBER>0
nrf_gpio_pin_clear(CONNECTED_LED_PIN_NO);
nrf_gpio_pin_set(ADVERTISING_LED_PIN_NO);
+#endif
m_conn_handle = p_ble_evt->evt.gap_evt.conn_handle;
} break;
@@ -669,7 +677,9 @@
case BLE_GAP_EVT_DISCONNECTED:
{
// Restart advertising so that the DFU Controller can reconnect if possible.
+#if LEDS_NUMBER>0
nrf_gpio_pin_set(CONNECTED_LED_PIN_NO);
+#endif
if ((m_flags & DFU_BLE_RESETTING_SOON) == 0)
{
@@ -868,10 +878,12 @@
*/
static void leds_init(void)
{
+#if LEDS_NUMBER>0
nrf_gpio_cfg_output(ADVERTISING_LED_PIN_NO);
nrf_gpio_cfg_output(CONNECTED_LED_PIN_NO);
nrf_gpio_pin_set(ADVERTISING_LED_PIN_NO);
nrf_gpio_pin_set(CONNECTED_LED_PIN_NO);
+#endif
}
diff -Naur nRF5_SDK_14.2.0_17b948a/examples/dfu/bootloader_secure_ble/main.c nRF5_SDK_14.2.0/examples/dfu/bootloader_secure_ble/main.c
--- nRF5_SDK_14.2.0_17b948a/examples/dfu/bootloader_secure_ble/main.c 2021-03-13 22:33:24.615295500 +0100
+++ nRF5_SDK_14.2.0/examples/dfu/bootloader_secure_ble/main.c 2021-03-13 20:52:13.403057600 +0100
@@ -59,7 +59,7 @@
#include "app_error_weak.h"
#include "nrf_bootloader_info.h"
-#define BOOTLOADER_BUTTON (BSP_BUTTON_3) /**< Button for entering DFU mode. */
+//#define BOOTLOADER_BUTTON (BSP_BUTTON_3) /**< Button for entering DFU mode. */
void app_error_fault_handler(uint32_t id, uint32_t pc, uint32_t info)
{
@@ -67,29 +67,33 @@
NVIC_SystemReset();
}
-
+#ifndef DEBUG
void app_error_handler_bare(uint32_t error_code)
{
(void)error_code;
NRF_LOG_ERROR("Received an error: 0x%08x!", error_code);
NVIC_SystemReset();
}
-
+#endif
/**@brief Function for initialization of LEDs. */
static void leds_init(void)
{
+#if LEDS_NUMBER>0
bsp_board_leds_init();
bsp_board_led_on(BSP_BOARD_LED_2);
+#endif
}
/**@brief Function for initializing the button module. */
static void buttons_init(void)
{
+#ifdef BOOTLOADER_BUTTON
nrf_gpio_cfg_sense_input(BOOTLOADER_BUTTON,
BUTTON_PULL,
NRF_GPIO_PIN_SENSE_LOW);
+#endif
}
@@ -97,11 +101,16 @@
*/
bool nrf_dfu_button_enter_check(void)
{
+#ifdef BOOTLOADER_BUTTON
if (nrf_gpio_pin_read(BOOTLOADER_BUTTON) == 0)
{
return true;
}
-
+#endif
+ if (NRF_POWER->GPREGRET == 1){
+// NRF_POWER->GPREGRET = 0;
+ return true;
+ }
return false;
}
diff -Naur nRF5_SDK_14.2.0_17b948a/examples/dfu/bootloader_secure_ble/pca10040/armgcc/Makefile nRF5_SDK_14.2.0/examples/dfu/bootloader_secure_ble/pca10040/armgcc/Makefile
--- nRF5_SDK_14.2.0_17b948a/examples/dfu/bootloader_secure_ble/pca10040/armgcc/Makefile 2021-03-13 22:33:24.616296600 +0100
+++ nRF5_SDK_14.2.0/examples/dfu/bootloader_secure_ble/pca10040/armgcc/Makefile 2021-03-13 22:11:54.282630400 +0100
@@ -10,6 +10,8 @@
# Source files common to all targets
SRC_FILES += \
+ $(SDK_ROOT)/components/toolchain/gcc/gcc_startup_nrf52.S \
+ $(SDK_ROOT)/components/toolchain/system_nrf52.c \
$(SDK_ROOT)/components/libraries/util/app_error_weak.c \
$(SDK_ROOT)/components/libraries/scheduler/app_scheduler.c \
$(SDK_ROOT)/components/libraries/timer/app_timer.c \
@@ -61,8 +63,6 @@
$(SDK_ROOT)/components/libraries/bootloader/dfu/nrf_dfu_utils.c \
$(SDK_ROOT)/external/nano-pb/pb_common.c \
$(SDK_ROOT)/external/nano-pb/pb_decode.c \
- $(SDK_ROOT)/components/toolchain/gcc/gcc_startup_nrf52.S \
- $(SDK_ROOT)/components/toolchain/system_nrf52.c \
$(SDK_ROOT)/components/softdevice/common/nrf_sdh.c \
$(SDK_ROOT)/components/softdevice/common/nrf_sdh_ble.c \
$(SDK_ROOT)/components/softdevice/common/nrf_sdh_soc.c \
@@ -129,10 +129,17 @@
# Uncomment the line below to enable link time optimization
#OPT += -flto
+#FLAGS = -DDEBUG
+#SRC_FILES += \
+# $(SDK_ROOT)/components/libraries/util/app_error.c
+#
+#INC_FOLDERS += \
+# $(SDK_ROOT)/components/libraries/util
+
# C flags common to all targets
-CFLAGS += $(OPT)
+CFLAGS += $(OPT) $(FLAGS)
CFLAGS += -DBLE_STACK_SUPPORT_REQD
-CFLAGS += -DBOARD_PCA10040
+CFLAGS += -DBOARD_CUSTOM
CFLAGS += -DCONFIG_GPIO_AS_PINRESET
CFLAGS += -DFLOAT_ABI_HARD
CFLAGS += -DNRF52
@@ -155,15 +162,15 @@
CFLAGS += -fno-builtin -fshort-enums -flto
# C++ flags common to all targets
-CXXFLAGS += $(OPT)
+CXXFLAGS += $(OPT) $(FLAGS)
# Assembler flags common to all targets
-ASMFLAGS += -g3
+ASMFLAGS += -g3 $(FLAGS)
ASMFLAGS += -mcpu=cortex-m4
ASMFLAGS += -mthumb -mabi=aapcs
ASMFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
ASMFLAGS += -DBLE_STACK_SUPPORT_REQD
-ASMFLAGS += -DBOARD_PCA10040
+ASMFLAGS += -DBOARD_CUSTOM
ASMFLAGS += -DCONFIG_GPIO_AS_PINRESET
ASMFLAGS += -DFLOAT_ABI_HARD
ASMFLAGS += -DNRF52
diff -Naur nRF5_SDK_14.2.0_17b948a/examples/dfu/bootloader_secure_ble/pca10040/config/sdk_config.h nRF5_SDK_14.2.0/examples/dfu/bootloader_secure_ble/pca10040/config/sdk_config.h
--- nRF5_SDK_14.2.0_17b948a/examples/dfu/bootloader_secure_ble/pca10040/config/sdk_config.h 2021-03-13 22:33:24.619965300 +0100
+++ nRF5_SDK_14.2.0/examples/dfu/bootloader_secure_ble/pca10040/config/sdk_config.h 2021-03-13 20:30:33.149762000 +0100
@@ -187,7 +187,7 @@
// <2=> Synth
#ifndef CLOCK_CONFIG_LF_SRC
-#define CLOCK_CONFIG_LF_SRC 1
+#define CLOCK_CONFIG_LF_SRC 0
#endif
// <o> CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority
@@ -3148,12 +3148,12 @@
// <2=> NRF_CLOCK_LF_SRC_SYNTH
#ifndef NRF_SDH_CLOCK_LF_SRC
-#define NRF_SDH_CLOCK_LF_SRC 1
+#define NRF_SDH_CLOCK_LF_SRC 0
#endif
// <o> NRF_SDH_CLOCK_LF_RC_CTIV - SoftDevice calibration timer interval.
#ifndef NRF_SDH_CLOCK_LF_RC_CTIV
-#define NRF_SDH_CLOCK_LF_RC_CTIV 0
+#define NRF_SDH_CLOCK_LF_RC_CTIV 16
#endif
// <o> NRF_SDH_CLOCK_LF_RC_TEMP_CTIV - SoftDevice calibration timer interval under constant temperature.
@@ -3161,7 +3161,7 @@
// <i> if the temperature has not changed.
#ifndef NRF_SDH_CLOCK_LF_RC_TEMP_CTIV
-#define NRF_SDH_CLOCK_LF_RC_TEMP_CTIV 0
+#define NRF_SDH_CLOCK_LF_RC_TEMP_CTIV 2
#endif
// <o> NRF_SDH_CLOCK_LF_XTAL_ACCURACY - External crystal clock accuracy used in the LL to compute timing windows.
@@ -3176,7 +3176,7 @@
// <7=> NRF_CLOCK_LF_XTAL_ACCURACY_20_PPM
#ifndef NRF_SDH_CLOCK_LF_XTAL_ACCURACY
-#define NRF_SDH_CLOCK_LF_XTAL_ACCURACY 7
+#define NRF_SDH_CLOCK_LF_XTAL_ACCURACY 1
#endif
// </h>
diff -Naur nRF5_SDK_14.2.0_17b948a/examples/dfu/dfu_req_handling/dfu_public_key.c nRF5_SDK_14.2.0/examples/dfu/dfu_req_handling/dfu_public_key.c
--- nRF5_SDK_14.2.0_17b948a/examples/dfu/dfu_req_handling/dfu_public_key.c 2021-03-13 22:33:24.693126900 +0100
+++ nRF5_SDK_14.2.0/examples/dfu/dfu_req_handling/dfu_public_key.c 2021-03-10 18:51:09.302638200 +0100
@@ -7,7 +7,7 @@
/* This file was generated with a throwaway private key, that is only inteded for a debug version of the DFU project.
Please see https://github.com/NordicSemiconductor/pc-nrfutil/blob/master/README.md to generate a valid public key. */
-#ifdef NRF_DFU_DEBUG_VERSION
+//#ifdef NRF_DFU_DEBUG_VERSION
/** @brief Public key used to verify DFU images */
__ALIGN(4) const uint8_t pk[64] =
@@ -16,6 +16,6 @@
0xce, 0xfa, 0x44, 0xfd, 0x2b, 0xda, 0xa6, 0xa4, 0xd7, 0xce, 0x01, 0x57, 0xc4, 0x07, 0x30, 0x21, 0x04, 0x2b, 0x41, 0xcb, 0xf8, 0x32, 0x6c, 0x2a, 0xc5, 0xfa, 0x01, 0x05, 0x1f, 0x2b, 0xe5, 0x79
};
-#else
-#error "Debug public key not valid for production. Please see https://github.com/NordicSemiconductor/pc-nrfutil/blob/master/README.md to generate it"
-#endif
+//#else
+//#error "Debug public key not valid for production. Please see https://github.com/NordicSemiconductor/pc-nrfutil/blob/master/README.md to generate it"
+//#endif
diff -Naur nRF5_SDK_14.2.0_17b948a/examples/dfu/dfu_req_handling/dfu_req_handling.c nRF5_SDK_14.2.0/examples/dfu/dfu_req_handling/dfu_req_handling.c
--- nRF5_SDK_14.2.0_17b948a/examples/dfu/dfu_req_handling/dfu_req_handling.c 2021-03-13 22:33:24.695158300 +0100
+++ nRF5_SDK_14.2.0/examples/dfu/dfu_req_handling/dfu_req_handling.c 2021-03-10 19:47:51.286523700 +0100
@@ -135,7 +135,9 @@
*
* @details The pk value pointed to is the public key present in dfu_public_key.c
*/
+#if 0
NRF_CRYPTO_ECC_PUBLIC_KEY_RAW_CREATE_FROM_ARRAY(crypto_key_pk, SECP256R1, pk);
+#endif
/** @brief Value length structure to hold a signature
*/
@@ -324,7 +326,7 @@
}
NRF_LOG_INFO("Req version: %d, Expected: %d", p_init->fw_version, fw_version);
-
+#if 0
// Check of init command FW version
switch (p_init->type)
{
@@ -350,6 +352,7 @@
// do not care about fw_version in the case of a softdevice transfer
break;
}
+#endif
#ifdef NRF_DFU_DEBUG_VERSION
}
@@ -371,6 +374,7 @@
{
return NRF_DFU_RES_CODE_OPERATION_FAILED;
}
+#if 0
// Prepare the signature received over the air.
memcpy(crypto_sig.p_value, p_command->signature.bytes, p_command->signature.size);
@@ -383,6 +387,7 @@
NRF_LOG_ERROR("Signature failed");
return NRF_DFU_RES_CODE_INVALID_OBJECT;
}
+#endif
NRF_LOG_INFO("Image verified");
}
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