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faveoled/redmi-a3x.dts

Last active April 8, 2026 11:59
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Redmi A3x DTS (Unisoc T603)
Raw
redmi-a3x.dts
/dts-v1/;
/ {
interrupt-parent = <0x01>;
#address-cells = <0x02>;
#size-cells = <0x02>;
model = "Spreadtrum SP9863A-1H10 Board";
compatible = "sprd,sp9863a-1h10\0sprd,sc9863a";
sprd,sc-id = "sp9863a 1h10 1000";
battery {
compatible = "simple-battery";
status = "disabled";
phandle = <0xa1>;
};
battery0 {
compatible = "simple-battery";
status = "disabled";
phandle = <0xa2>;
};
battery1_0 {
compatible = "simple-battery";
status = "disabled";
phandle = <0xa3>;
};
battery1_1 {
compatible = "simple-battery";
status = "disabled";
phandle = <0xa4>;
};
battery1_2 {
compatible = "simple-battery";
status = "disabled";
phandle = <0xa5>;
};
battery1_3 {
compatible = "simple-battery";
status = "disabled";
phandle = <0xa6>;
};
battery2_0 {
compatible = "simple-battery";
status = "disabled";
phandle = <0xa7>;
};
battery2_1 {
compatible = "simple-battery";
status = "disabled";
phandle = <0xa8>;
};
battery2_2 {
compatible = "simple-battery";
status = "disabled";
phandle = <0xa9>;
};
battery2_3 {
compatible = "simple-battery";
status = "disabled";
phandle = <0xaa>;
};
charger-manager {
compatible = "charger-manager";
status = "disabled";
phandle = <0xab>;
};
reserved-memory {
#address-cells = <0x02>;
#size-cells = <0x02>;
ranges;
phandle = <0xac>;
ddrbist-mem@0x80000000 {
reg = <0x00 0x80000000 0x00 0x1000>;
phandle = <0xad>;
};
sysdumpinfo-mem@80001000 {
reg = <0x00 0x80001000 0x00 0x1000>;
phandle = <0xae>;
};
pdbg-mem@0x80002000 {
reg = <0x00 0x80002000 0x00 0x1000>;
phandle = <0x83>;
};
cp-mem@89600000 {
reg = <0x00 0x89600000 0x00 0x3f80000>;
phandle = <0xaf>;
};
sipc-mem@8e000000 {
reg = <0x00 0x8e000000 0x00 0x980000>;
phandle = <0xb0>;
};
iq-mem@90000000 {
compatible = "sprd,iq-mem";
reg = <0x00 0x84d80000 0x00 0x4000000>;
phandle = <0xb1>;
};
uboot_log-mem {
reg = <0x00 0x9de80000 0x00 0x80000>;
phandle = <0xb2>;
};
logobuffer@9e000000 {
reg = <0x00 0x9e000000 0x00 0x9e4000>;
phandle = <0x76>;
};
sysdump-uboot@9f000000 {
reg = <0x00 0x9f000000 0x00 0x1000000>;
phandle = <0xb3>;
};
sml-mem@b0000000 {
reg = <0x00 0xb0000000 0x00 0x40000>;
phandle = <0xb4>;
};
tos-mem@b0040000 {
reg = <0x00 0xb0040000 0x00 0x1fc0000>;
phandle = <0xb5>;
};
sh-mem@b6000000 {
reg = <0x00 0xb6000000 0x00 0x100000>;
phandle = <0x92>;
};
rebootescrow@0xfff70000 {
no-map;
reg = <0x00 0xfff70000 0x00 0x10000>;
};
ramoops@fff80000 {
compatible = "ramoops";
reg = <0x00 0xfff80000 0x00 0x40000>;
record-size = <0x8000>;
console-size = <0x8000>;
pmsg-size = <0x8000>;
phandle = <0xb6>;
};
dmabuf,cma {
compatible = "shared-dma-pool";
alloc-ranges = <0x00 0x00 0x00 0xffffffff>;
reusable;
size = <0x00 0x3000000>;
linux,cma-default;
};
wcn-mem@84000000 {
reg = <0x00 0x84000000 0x00 0x300000>;
phandle = <0xb7>;
};
gnss-mem@84300000 {
reg = <0x00 0x84300000 0x00 0x15b000>;
phandle = <0xb8>;
};
sp-ddr-mem@89400000 {
reg = <0x00 0x89400000 0x00 0x200000>;
phandle = <0xb9>;
};
sh-mem@b3860000 {
reg = <0x00 0xb3860000 0x00 0x100000>;
};
};
cpus {
#address-cells = <0x02>;
#size-cells = <0x00>;
cpu-map {
cluster0 {
core0 {
cpu = <0x02>;
};
core1 {
cpu = <0x03>;
};
core2 {
cpu = <0x04>;
};
core3 {
cpu = <0x05>;
};
core4 {
cpu = <0x06>;
};
core5 {
cpu = <0x07>;
};
core6 {
cpu = <0x08>;
};
core7 {
cpu = <0x09>;
};
};
};
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x00 0x00>;
enable-method = "psci";
cpu-idle-states = <0x0a 0x0b>;
capacity-dmips-mhz = <0x400>;
dynamic-power-coefficient = <0x64>;
sugov_slack_timer;
#cooling-cells = <0x02>;
sprd,freq-domain = <0x0c 0x00>;
phandle = <0x02>;
};
cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x00 0x100>;
enable-method = "psci";
cpu-idle-states = <0x0a 0x0b>;
capacity-dmips-mhz = <0x400>;
dynamic-power-coefficient = <0x64>;
#cooling-cells = <0x02>;
sprd,freq-domain = <0x0c 0x00>;
phandle = <0x03>;
};
cpu@200 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x00 0x200>;
enable-method = "psci";
cpu-idle-states = <0x0a 0x0b>;
capacity-dmips-mhz = <0x400>;
dynamic-power-coefficient = <0x64>;
#cooling-cells = <0x02>;
sprd,freq-domain = <0x0c 0x00>;
phandle = <0x04>;
};
cpu@300 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x00 0x300>;
enable-method = "psci";
cpu-idle-states = <0x0a 0x0b>;
capacity-dmips-mhz = <0x400>;
dynamic-power-coefficient = <0x64>;
#cooling-cells = <0x02>;
sprd,freq-domain = <0x0c 0x00>;
phandle = <0x05>;
};
cpu@400 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x00 0x400>;
enable-method = "psci";
cpu-idle-states = <0x0a 0x0b>;
capacity-dmips-mhz = <0x400>;
dynamic-power-coefficient = <0x99>;
#cooling-cells = <0x02>;
sprd,freq-domain = <0x0d 0x01>;
phandle = <0x06>;
};
cpu@500 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x00 0x500>;
enable-method = "psci";
cpu-idle-states = <0x0a 0x0b>;
capacity-dmips-mhz = <0x400>;
dynamic-power-coefficient = <0x99>;
#cooling-cells = <0x02>;
sprd,freq-domain = <0x0d 0x01>;
phandle = <0x07>;
};
cpu@600 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x00 0x600>;
enable-method = "psci";
cpu-idle-states = <0x0a 0x0b>;
capacity-dmips-mhz = <0x400>;
dynamic-power-coefficient = <0x99>;
#cooling-cells = <0x02>;
sprd,freq-domain = <0x0d 0x01>;
phandle = <0x08>;
};
cpu@700 {
device_type = "cpu";
compatible = "arm,cortex-a55";
reg = <0x00 0x700>;
enable-method = "psci";
cpu-idle-states = <0x0a 0x0b>;
capacity-dmips-mhz = <0x400>;
dynamic-power-coefficient = <0x99>;
#cooling-cells = <0x02>;
sprd,freq-domain = <0x0d 0x01>;
phandle = <0x09>;
};
};
idle-states {
entry-method = "psci";
core-pd {
compatible = "arm,idle-state";
entry-latency-us = <0xfa0>;
exit-latency-us = <0xfa0>;
min-residency-us = <0x2710>;
local-timer-stop;
arm,psci-suspend-param = <0x10000>;
phandle = <0x0a>;
};
apsys_pd {
compatible = "arm,idle-state";
entry-latency-us = <0x2ee0>;
exit-latency-us = <0x2ee0>;
min-residency-us = <0x3a98>;
local-timer-stop;
arm,psci-suspend-param = <0x2010000>;
phandle = <0x0b>;
};
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
timer {
compatible = "arm,armv8-timer";
interrupts = <0x01 0x0d 0x04 0x01 0x0e 0x04 0x01 0x0b 0x04 0x01 0x0a 0x04>;
arm,no-tick-in-suspend;
};
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <0x00 0x90 0x04 0x00 0x91 0x04 0x00 0x92 0x04 0x00 0x93 0x04 0x00 0x94 0x04 0x00 0x95 0x04 0x00 0x96 0x04 0x00 0x97 0x04>;
};
soc {
compatible = "simple-bus";
#address-cells = <0x02>;
#size-cells = <0x02>;
ranges;
phandle = <0xba>;
ap-apb@70000000 {
compatible = "simple-bus";
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges = <0x00 0x00 0x70000000 0x10000000>;
phandle = <0xbb>;
i2c@500000 {
compatible = "sprd,sc9863-i2c\0sprd,sc9860-i2c";
reg = <0x500000 0x1000>;
interrupts = <0x00 0x0b 0x04>;
clock-frequency = <0x186a0>;
#address-cells = <0x01>;
#size-cells = <0x00>;
dma-names = "rx\0tx";
dmas = <0x0e 0x2b 0x0e 0x2c>;
status = "disabled";
reset-names = "i2c_rst";
resets = <0x0f 0x07>;
clock-names = "enable\0i2c\0source";
clocks = <0x0f 0x07 0x10 0x0e 0x11>;
phandle = <0xbc>;
};
i2c@600000 {
compatible = "sprd,sc9863-i2c\0sprd,sc9860-i2c";
reg = <0x600000 0x1000>;
interrupts = <0x00 0x0c 0x04>;
clock-frequency = <0x186a0>;
#address-cells = <0x01>;
#size-cells = <0x00>;
dma-names = "rx\0tx";
dmas = <0x0e 0x29 0x0e 0x2a>;
status = "disabled";
reset-names = "i2c_rst";
resets = <0x0f 0x08>;
clock-names = "enable\0i2c\0source";
clocks = <0x0f 0x08 0x10 0x0f 0x11>;
phandle = <0xbd>;
};
i2c@700000 {
compatible = "sprd,sc9863-i2c\0sprd,sc9860-i2c";
reg = <0x700000 0x1000>;
interrupts = <0x00 0x0d 0x04>;
clock-frequency = <0x186a0>;
#address-cells = <0x01>;
#size-cells = <0x00>;
dma-names = "rx\0tx";
dmas = <0x0e 0x27 0x0e 0x28>;
status = "disabled";
reset-names = "i2c_rst";
resets = <0x0f 0x09>;
clock-names = "enable\0i2c\0source";
clocks = <0x0f 0x09 0x10 0x10 0x11>;
phandle = <0xbe>;
};
i2c@800000 {
compatible = "sprd,sc9863-i2c\0sprd,sc9860-i2c";
reg = <0x800000 0x1000>;
interrupts = <0x00 0x0e 0x04>;
clock-frequency = <0x61a80>;
#address-cells = <0x01>;
#size-cells = <0x00>;
dma-names = "rx\0tx";
dmas = <0x0e 0x25 0x0e 0x26>;
status = "disabled";
reset-names = "i2c_rst";
resets = <0x0f 0x0a>;
clock-names = "enable\0i2c\0source";
clocks = <0x0f 0x0a 0x10 0x11 0x11>;
phandle = <0xbf>;
};
i2c@900000 {
compatible = "sprd,sc9863-i2c\0sprd,sc9860-i2c";
reg = <0x900000 0x1000>;
interrupts = <0x00 0x0f 0x04>;
clock-frequency = <0x186a0>;
#address-cells = <0x01>;
#size-cells = <0x00>;
dma-names = "rx\0tx";
dmas = <0x0e 0x23 0x0e 0x24>;
status = "disabled";
reset-names = "i2c_rst";
resets = <0x0f 0x0b>;
clock-names = "enable\0i2c\0source";
clocks = <0x0f 0x0b 0x10 0x12 0x11>;
phandle = <0xc0>;
};
i2c@1500000 {
compatible = "sprd,sc9863-i2c\0sprd,sc9860-i2c";
reg = <0x1500000 0x1000>;
interrupts = <0x00 0x74 0x04>;
clock-frequency = <0x186a0>;
#address-cells = <0x01>;
#size-cells = <0x00>;
status = "disabled";
reset-names = "i2c_rst";
resets = <0x0f 0x13>;
clock-names = "enable\0i2c\0source";
clocks = <0x0f 0x13 0x10 0x13 0x11>;
phandle = <0xc1>;
};
i2c@1600000 {
compatible = "sprd,sc9863-i2c\0sprd,sc9860-i2c";
reg = <0x1600000 0x1000>;
interrupts = <0x00 0x75 0x04>;
clock-frequency = <0x186a0>;
#address-cells = <0x01>;
#size-cells = <0x00>;
status = "disabled";
reset-names = "i2c_rst";
resets = <0x0f 0x14>;
clock-names = "enable\0i2c\0source";
clocks = <0x0f 0x14 0x10 0x14 0x11>;
phandle = <0xc2>;
};
i2s@d00000 {
compatible = "unisoc,i2s";
reg = <0xd00000 0x100000>;
sprd,dai_name = "i2s_bt_sco0";
sprd,hw_port = <0x00>;
sprd,syscon-ap-apb = <0x12>;
#sound-dai-cells = <0x01>;
status = "okay";
clock-names = "clk_iis0\0clk_twpll_128m\0clk_twpll_153m6";
clocks = <0x10 0x19 0x13 0x0a 0x13 0x0f>;
sprd,config_type = "pcm";
sprd,slave_timeout = <0xf11>;
sprd,_hw_port = <0x00>;
sprd,fs = <0x1f40>;
sprd,bus_type = <0x01>;
sprd,rtx_mode = <0x03>;
sprd,byte_per_chan = <0x01>;
sprd,slave_mode = <0x00>;
sprd,lsb = <0x00>;
sprd,lrck = <0x00>;
sprd,low_for_left = <0x01>;
sprd,clk_inv = <0x00>;
sprd,pcm_short_frame = <0x01>;
sprd,pcm_slot = <0x01>;
sprd,pcm_cycle = <0x01>;
sprd,tx_watermark = <0x0c>;
sprd,rx_watermark = <0x14>;
phandle = <0x9f>;
};
spi@a00000 {
compatible = "sprd,sc9863-spi\0sprd,sc9860-spi";
reg = <0xa00000 0x1000>;
interrupts = <0x00 0x07 0x04>;
#address-cells = <0x01>;
#size-cells = <0x00>;
clock-names = "enable\0spi\0source";
clocks = <0x0f 0x04 0x10 0x15 0x13 0x03>;
status = "disabled";
phandle = <0xc3>;
};
spi@b00000 {
compatible = "sprd,sc9863-spi\0sprd,sc9860-spi";
reg = <0xb00000 0x1000>;
interrupts = <0x00 0x08 0x04>;
#address-cells = <0x01>;
#size-cells = <0x00>;
clock-names = "enable\0spi\0source";
clocks = <0x0f 0x05 0x10 0x16 0x13 0x03>;
status = "disabled";
phandle = <0xc4>;
};
spi@c00000 {
compatible = "sprd,sc9863-spi\0sprd,sc9860-spi";
reg = <0xc00000 0x1000>;
interrupts = <0x00 0x09 0x04>;
#address-cells = <0x01>;
#size-cells = <0x00>;
clock-names = "enable\0spi\0source";
clocks = <0x0f 0x06 0x10 0x17 0x13 0x03>;
status = "disabled";
phandle = <0xc5>;
};
spi@1400000 {
compatible = "sprd,sc9863-spi\0sprd,sc9860-spi";
reg = <0x1400000 0x1000>;
interrupts = <0x00 0x13 0x04>;
#address-cells = <0x01>;
#size-cells = <0x00>;
clock-names = "enable\0spi\0source";
clocks = <0x0f 0x12 0x10 0x18 0x13 0x03>;
status = "disabled";
phandle = <0xc6>;
};
serial@0 {
compatible = "sprd,sc9863a-uart\0sprd,sc9836-uart";
reg = <0x00 0x100>;
interrupts = <0x00 0x02 0x04>;
clock-names = "enable\0uart\0source";
clocks = <0x0f 0x0c 0x10 0x09 0x11>;
status = "okay";
phandle = <0xc7>;
};
serial@100000 {
compatible = "sprd,sc9863a-uart\0sprd,sc9836-uart";
reg = <0x100000 0x100>;
interrupts = <0x00 0x03 0x04>;
clock-names = "enable\0uart\0source";
clocks = <0x0f 0x0d 0x10 0x0a 0x11>;
status = "okay";
phandle = <0xc8>;
};
serial@200000 {
compatible = "sprd,sc9863a-uart\0sprd,sc9836-uart";
reg = <0x200000 0x100>;
interrupts = <0x00 0x04 0x04>;
clock-names = "enable\0uart\0source";
clocks = <0x0f 0x0e 0x10 0x0b 0x11>;
status = "disabled";
phandle = <0xc9>;
};
serial@300000 {
compatible = "sprd,sc9863a-uart\0sprd,sc9836-uart";
reg = <0x300000 0x100>;
interrupts = <0x00 0x05 0x04>;
clock-names = "enable\0uart\0source";
clocks = <0x0f 0x0f 0x10 0x0c 0x11>;
status = "disabled";
phandle = <0xca>;
};
serial@400000 {
compatible = "sprd,sc9863a-uart\0sprd,sc9836-uart";
reg = <0x400000 0x100>;
interrupts = <0x00 0x06 0x04>;
clock-names = "enable\0uart\0source";
clocks = <0x0f 0x10 0x10 0x0d 0x11>;
status = "disabled";
phandle = <0xcb>;
};
};
interrupt-controller@14000000 {
compatible = "arm,gic-v3";
#interrupt-cells = <0x03>;
#address-cells = <0x02>;
#size-cells = <0x02>;
ranges;
redistributor-stride = <0x00 0x20000>;
#redistributor-regions = <0x01>;
interrupt-controller;
reg = <0x00 0x14000000 0x00 0x20000 0x00 0x14040000 0x00 0x100000>;
interrupts = <0x01 0x09 0x04>;
phandle = <0x01>;
};
funnel@10001000 {
compatible = "arm,coresight-dynamic-funnel\0arm,primecell";
reg = <0x00 0x10001000 0x00 0x1000>;
clocks = <0x11>;
clock-names = "apb_pclk";
out-ports {
port {
endpoint {
remote-endpoint = <0x14>;
phandle = <0x16>;
};
};
};
in-ports {
port {
endpoint {
remote-endpoint = <0x15>;
phandle = <0x20>;
};
};
};
};
etb@10003000 {
compatible = "arm,coresight-tmc\0arm,primecell";
reg = <0x00 0x10003000 0x00 0x1000>;
clocks = <0x11>;
clock-names = "apb_pclk";
in-ports {
port {
endpoint {
remote-endpoint = <0x16>;
phandle = <0x14>;
};
};
};
};
funnel@12001000 {
compatible = "arm,coresight-dynamic-funnel\0arm,primecell";
reg = <0x00 0x12001000 0x00 0x1000>;
clocks = <0x11>;
clock-names = "apb_pclk";
out-ports {
port {
endpoint {
remote-endpoint = <0x17>;
phandle = <0x1d>;
};
};
};
in-ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
reg = <0x00>;
endpoint {
remote-endpoint = <0x18>;
phandle = <0x28>;
};
};
port@1 {
reg = <0x01>;
endpoint {
remote-endpoint = <0x19>;
phandle = <0x29>;
};
};
port@2 {
reg = <0x02>;
endpoint {
remote-endpoint = <0x1a>;
phandle = <0x2a>;
};
};
port@3 {
reg = <0x03>;
endpoint {
remote-endpoint = <0x1b>;
phandle = <0x2b>;
};
};
};
};
etf@12002000 {
compatible = "arm,coresight-tmc\0arm,primecell";
reg = <0x00 0x12002000 0x00 0x1000>;
clocks = <0x11>;
clock-names = "apb_pclk";
out-ports {
port {
endpoint {
remote-endpoint = <0x1c>;
phandle = <0x21>;
};
};
};
in-port {
port {
endpoint {
remote-endpoint = <0x1d>;
phandle = <0x17>;
};
};
};
};
etf@12003000 {
compatible = "arm,coresight-tmc\0arm,primecell";
reg = <0x00 0x12003000 0x00 0x1000>;
clocks = <0x11>;
clock-names = "apb_pclk";
out-ports {
port {
endpoint {
remote-endpoint = <0x1e>;
phandle = <0x22>;
};
};
};
in-ports {
port {
endpoint {
remote-endpoint = <0x1f>;
phandle = <0x23>;
};
};
};
};
funnel@12004000 {
compatible = "arm,coresight-dynamic-funnel\0arm,primecell";
reg = <0x00 0x12004000 0x00 0x1000>;
clocks = <0x11>;
clock-names = "apb_pclk";
out-ports {
port {
endpoint {
remote-endpoint = <0x20>;
phandle = <0x15>;
};
};
};
in-ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
reg = <0x00>;
endpoint {
remote-endpoint = <0x21>;
phandle = <0x1c>;
};
};
port@1 {
reg = <0x01>;
endpoint {
remote-endpoint = <0x22>;
phandle = <0x1e>;
};
};
};
};
funnel@12005000 {
compatible = "arm,coresight-dynamic-funnel\0arm,primecell";
reg = <0x00 0x12005000 0x00 0x1000>;
clocks = <0x11>;
clock-names = "apb_pclk";
out-ports {
port {
endpoint {
remote-endpoint = <0x23>;
phandle = <0x1f>;
};
};
};
in-ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
reg = <0x00>;
endpoint {
remote-endpoint = <0x24>;
phandle = <0x2c>;
};
};
port@1 {
reg = <0x01>;
endpoint {
remote-endpoint = <0x25>;
phandle = <0x2d>;
};
};
port@2 {
reg = <0x02>;
endpoint {
remote-endpoint = <0x26>;
phandle = <0x2e>;
};
};
port@3 {
reg = <0x03>;
endpoint {
remote-endpoint = <0x27>;
phandle = <0x2f>;
};
};
};
};
etm@13040000 {
compatible = "arm,coresight-etm4x\0arm,primecell";
reg = <0x00 0x13040000 0x00 0x1000>;
cpu = <0x02>;
clocks = <0x11>;
clock-names = "apb_pclk";
out-ports {
port {
endpoint {
remote-endpoint = <0x28>;
phandle = <0x18>;
};
};
};
};
etm@13140000 {
compatible = "arm,coresight-etm4x\0arm,primecell";
reg = <0x00 0x13140000 0x00 0x1000>;
cpu = <0x03>;
clocks = <0x11>;
clock-names = "apb_pclk";
out-ports {
port {
endpoint {
remote-endpoint = <0x29>;
phandle = <0x19>;
};
};
};
};
etm@13240000 {
compatible = "arm,coresight-etm4x\0arm,primecell";
reg = <0x00 0x13240000 0x00 0x1000>;
cpu = <0x04>;
clocks = <0x11>;
clock-names = "apb_pclk";
out-ports {
port {
endpoint {
remote-endpoint = <0x2a>;
phandle = <0x1a>;
};
};
};
};
etm@13340000 {
compatible = "arm,coresight-etm4x\0arm,primecell";
reg = <0x00 0x13340000 0x00 0x1000>;
cpu = <0x05>;
clocks = <0x11>;
clock-names = "apb_pclk";
out-ports {
port {
endpoint {
remote-endpoint = <0x2b>;
phandle = <0x1b>;
};
};
};
};
etm@13440000 {
compatible = "arm,coresight-etm4x\0arm,primecell";
reg = <0x00 0x13440000 0x00 0x1000>;
cpu = <0x06>;
clocks = <0x11>;
clock-names = "apb_pclk";
out-ports {
port {
endpoint {
remote-endpoint = <0x2c>;
phandle = <0x24>;
};
};
};
};
etm@13540000 {
compatible = "arm,coresight-etm4x\0arm,primecell";
reg = <0x00 0x13540000 0x00 0x1000>;
cpu = <0x07>;
clocks = <0x11>;
clock-names = "apb_pclk";
out-ports {
port {
endpoint {
remote-endpoint = <0x2d>;
phandle = <0x25>;
};
};
};
};
etm@13640000 {
compatible = "arm,coresight-etm4x\0arm,primecell";
reg = <0x00 0x13640000 0x00 0x1000>;
cpu = <0x08>;
clocks = <0x11>;
clock-names = "apb_pclk";
out-ports {
port {
endpoint {
remote-endpoint = <0x2e>;
phandle = <0x26>;
};
};
};
};
etm@13740000 {
compatible = "arm,coresight-etm4x\0arm,primecell";
reg = <0x00 0x13740000 0x00 0x1000>;
cpu = <0x09>;
clocks = <0x11>;
clock-names = "apb_pclk";
out-ports {
port {
endpoint {
remote-endpoint = <0x2f>;
phandle = <0x27>;
};
};
};
};
ap-ahb {
compatible = "simple-bus";
#address-cells = <0x02>;
#size-cells = <0x02>;
ranges;
phandle = <0xcc>;
sdio@20300000 {
compatible = "sprd,sdhci-r11";
reg = <0x00 0x20300000 0x00 0x1000>;
interrupts = <0x00 0x39 0x04>;
clock-names = "sdio\0enable";
clocks = <0x30 0x1f 0x31 0x04>;
assigned-clocks = <0x30 0x1f>;
assigned-clock-parents = <0x32 0x02>;
sprd,phy-delay-sd-uhs-sdr104 = <0x7f 0xd1 0xd1 0xd1>;
sprd,phy-delay-sd-uhs-sdr50 = <0x7f 0xff 0xff 0xff>;
sprd,phy-delay-sd-highspeed = <0x7f 0x23 0x22 0x22>;
vmmc-supply = <0x33>;
vqmmc-supply = <0x34>;
voltage-ranges = <0xbb8 0xbb8>;
bus-width = <0x04>;
sd-uhs-sdr104;
sd-uhs-sdr50;
sprd,name = "sdio_sd";
no-sdio;
no-mmc;
status = "okay";
phandle = <0xcd>;
};
sdio@20600000 {
compatible = "sprd,sdhci-r11";
reg = <0x00 0x20600000 0x00 0x1000>;
interrupts = <0x00 0x3c 0x04>;
clock-names = "sdio\0enable";
clocks = <0x30 0x22 0x31 0x07>;
assigned-clocks = <0x30 0x22>;
assigned-clock-parents = <0x32 0x02>;
sprd,phy-delay-mmc-hs400es = <0x55 0x7f 0x38 0x38>;
sprd,phy-delay-mmc-hs400 = <0x55 0xd3 0x35 0x35>;
sprd,phy-delay-mmc-hs200 = <0x7f 0xcd 0xcd 0xcd>;
sprd,phy-delay-mmc-ddr52 = <0x32 0x23 0x18 0x18>;
vmmc-supply = <0x35>;
voltage-ranges = <0xbb8 0xbb8>;
bus-width = <0x08>;
non-removable;
cap-mmc-hw-reset;
mmc-hs400-enhanced-strobe;
mmc-hs400-1_8v;
mmc-hs200-1_8v;
mmc-ddr-1_8v;
sprd,name = "sdio_emmc";
no-sdio;
no-sd;
status = "okay";
supports-swcq;
phandle = <0xce>;
};
dma-controller@20100000 {
compatible = "sprd,sharkl3-dma\0sprd,sc9860-dma";
reg = <0x00 0x20100000 0x00 0x4000>;
interrupts = <0x00 0x32 0x04>;
#dma-cells = <0x01>;
#dma-channels = <0x1c>;
clock-names = "enable";
clocks = <0x31 0x01>;
phandle = <0x0e>;
};
usb@20200000 {
compatible = "sprd,sharkl3-musb";
reg = <0x00 0x20200000 0x00 0x2000>;
interrupts = <0x00 0x37 0x04>;
interrupt-names = "mc";
clocks = <0x31 0x00>;
clock-names = "core_clk";
phy-type = "usb20_sprd_phy";
usb-phy = <0x36>;
phy-names = "usb";
dr-mode = "peripheral";
sprd,usb-data-enable = <0x01>;
extcon = <0x37>;
status = "okay";
phandle = <0xcf>;
};
hsphy@20e00000 {
compatible = "sprd,sharkl3-phy";
reg = <0x00 0x20e00000 0x00 0x3030>;
reg-names = "phy_glb_regs";
sprd,syscon-enable = <0x38>;
sprd,syscon-apahb = <0x39>;
sprd,syscon-anag4 = <0x3a>;
sprd,vdd-voltage = <0x2e8a10>;
io-channels = <0x3b 0x1e 0x3b 0x1f>;
io-channel-names = "dp\0dm";
#phy-cells = <0x00>;
vdd-supply = <0x3c>;
extcon = <0x37>;
sprd,hsphy-tunehsamp = [03 03];
sprd,hsphy-tuneeq = [00 00];
sprd,hsphy-tfregres = [1e 1e];
status = "okay";
phandle = <0x36>;
};
};
pub {
compatible = "simple-bus";
#address-cells = <0x02>;
#size-cells = <0x02>;
ranges;
phandle = <0xd0>;
dmc-controller@300001a8 {
compatible = "sprd,pub-dmc-original";
reg = <0x00 0x300001a8 0x00 0x100 0x00 0x30000000 0x00 0x12c>;
phandle = <0xd1>;
};
dmc-mpu@300e0000 {
compatible = "sprd,dmc-mpu";
reg = <0x00 0x300e0000 0x00 0x10000>;
interrupts = <0x00 0x3d 0x04>;
syscon-names = "irq_clr\0irq_en";
mpu-irq-clr-syscon = <0x3d 0x40 0x02>;
mpu-irq-en-syscon = <0x3d 0x40 0x01>;
sprd,channel-num = <0x08>;
sprd,mpu-num = <0x10>;
sprd,channel-names = "MM\0GPU\0DPU\0CPU\0AP/PUBCP\0WTLCP\0AON/WCN/ETR\0VSP\0SHARED0\0SHARED1\0SHARED2\0SHARED3\0SHARED4\0SHARED5\0SHARED6\0SHARED7";
sprd,ranges = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
sprd,chn-config = <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01>;
sprd,id-config = <0x00 0x00 0xffff 0x00 0x00 0xffff 0x00 0x00 0xffff 0x00 0x00 0xffff 0x00 0x00 0xffff 0x00 0x00 0xffff 0x00 0x00 0xffff 0x00 0x00 0xffff 0x00 0x00 0xffff 0x00 0x00 0xffff 0x00 0x00 0xffff 0x00 0x00 0xffff 0x00 0x00 0xffff 0x00 0x00 0xffff 0x00 0x00 0xffff 0x00 0x00 0xffff>;
sprd,port-map = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
sprd,ddr-offset = <0x80000000>;
phandle = <0xd2>;
};
ptm@30010000 {
compatible = "sprd,sharkl3-ptm";
reg = <0x00 0x30010000 0x00 0x10000 0x00 0x10001000 0x00 0x1000 0x00 0x10003000 0x00 0x1000 0x00 0x10004000 0x00 0x1000 0x00 0x10008000 0x00 0x1000 0x00 0x10005000 0x00 0x1000>;
interrupts = <0x00 0x56 0x04>;
enable-syscon = <0x3e 0x31cc 0x80>;
clock-names = "clk_cs\0cs_src";
clocks = <0x30 0x18 0x13 0x0f>;
sprd,funnel-port = <0x02>;
sprd,ddr-chn = <0x08>;
sprd,chn-name = "MM\0GPU\0DPU\0CPU\0AP/PUBCP\0WTLCP\0WCN/AON/ETR\0VSP";
phandle = <0xd3>;
};
};
aon {
compatible = "simple-bus";
#address-cells = <0x02>;
#size-cells = <0x02>;
ranges;
phandle = <0xd4>;
timer@40230000 {
compatible = "sprd,syst-timer";
reg = <0x00 0x40230000 0x00 0x10>;
phandle = <0xd5>;
};
timer@40040000 {
compatible = "sprd,sysfrt-timer";
reg = <0x00 0x40040000 0x00 0x10>;
phandle = <0xd6>;
};
timer@40050000 {
compatible = "sprd,sharkl3-timer\0sprd,sc9860-timer";
reg = <0x00 0x40050000 0x00 0x14>;
interrupts = <0x00 0x1b 0x04>;
clocks = <0x3f>;
};
timer@40050020 {
compatible = "sprd,sharkl3-suspend-timer\0sprd,sc9860-suspend-timer";
reg = <0x00 0x40050020 0x00 0x14>;
clocks = <0x3f>;
};
spi@41800000 {
compatible = "sprd,sc9863-adi";
reg = <0x00 0x41800000 0x00 0x200000>;
#address-cells = <0x01>;
#size-cells = <0x00>;
sprd,hw-channels = <0x21 0x8c20 0x23 0x8cc4 0x24 0x8cd0 0x13 0x8c44 0x14 0x8c44 0x15 0x8c44 0x16 0x8c44>;
phandle = <0xd7>;
pmic@0 {
compatible = "sprd,sc2721";
reg = <0x00>;
spi-max-frequency = <0x18cba80>;
interrupts = <0x00 0x26 0x04>;
interrupt-controller;
#interrupt-cells = <0x01>;
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0x40>;
watchdog@40 {
compatible = "sprd,sc2721-wdt\0sprd,sc27xx-wdt";
reg = <0x40>;
phandle = <0xd8>;
};
led-controller@180 {
compatible = "sprd,sc2731-bltc\0sprd,sc2721-bltc";
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x180>;
led@0 {
label = "red";
reg = <0x00>;
};
led@1 {
label = "green";
reg = <0x01>;
};
led@2 {
label = "blue";
reg = <0x02>;
};
};
rtc@200 {
compatible = "sprd,sc2731-rtc\0sprd,sc2721-rtc";
reg = <0x200>;
interrupt-parent = <0x40>;
interrupts = <0x01>;
};
gpio-controller@280 {
compatible = "sprd,sc2731-eic\0sprd,sc2721-eic";
reg = <0x280>;
interrupt-parent = <0x40>;
interrupts = <0x04>;
gpio-controller;
#gpio-cells = <0x02>;
interrupt-controller;
#interrupt-cells = <0x02>;
phandle = <0x47>;
};
flash@2a8 {
compatible = "sprd,sc2731-flash\0sprd,sc2721-flash";
reg = <0x2a8>;
status = "disabled";
phandle = <0xd9>;
};
typec@380 {
compatible = "sprd,sc2721-typec";
interrupt-parent = <0x40>;
interrupts = <0x0a>;
reg = <0x380>;
sprd,mode = <0x02>;
nvmem-cells = <0x41 0x42>;
nvmem-cell-names = "typec_cc1_cal\0typec_cc2_cal";
phandle = <0x93>;
};
adc@400 {
compatible = "sprd,sc27xx-adc\0sprd,sc2721-adc";
reg = <0x400>;
interrupt-parent = <0x40>;
vref-supply = <0x43>;
interrupts = <0x00>;
#io-channel-cells = <0x01>;
hwlocks = <0x44 0x04>;
nvmem-cells = <0x45 0x46>;
nvmem-cell-names = "big_scale_calib\0small_scale_calib";
phandle = <0x3b>;
};
fgu@a00 {
compatible = "sprd,sc27xx-fgu\0sprd,sc2721-fgu\0sprd,sprd-fgu";
reg = <0xa00>;
bat-detect-gpio = <0x47 0x09 0x00>;
nvmem-cell-names = "fgu_calib";
nvmem-cells = <0x48>;
io-channels = <0x3b 0x00 0x3b 0x0e>;
io-channel-names = "bat-temp\0charge-vol";
interrupt-parent = <0x40>;
interrupts = <0x03>;
phandle = <0xda>;
};
syscon@c00 {
compatible = "sprd,sc2731-syscon\0sprd,sc27xx-syscon";
reg = <0xc00 0xecc 0xec0>;
};
smpl@c00 {
compatible = "sprd,sc27xx-smpl\0sprd,sc2721-smpl";
reg = <0xc00>;
sprd,smpl-timer-threshold = <0xfa>;
phandle = <0xdb>;
};
poweroff@c20 {
compatible = "sprd,sc27xx-poweroff\0sprd,sc2721-poweroff";
reg = <0xc20>;
};
vibrator@eb4 {
compatible = "sprd,sc2731-vibrator\0sprd,sc2721-vibrator";
reg = <0xeb4>;
};
bc1p2@ec8 {
compatible = "sprd,sc27xx-bc1p2\0sprd,sc2721-bc1p2";
};
hw-reset@eec {
compatible = "sprd,sc27xx-7sreset\0sprd,sc2721-7sreset";
reg = <0xf1c 0xeec>;
};
audio-codec@700 {
compatible = "unisoc,sc2721-audio-codec\0unisoc,sc2731-audio-codec";
#sound-dai-cells = <0x01>;
reg = <0x700>;
interrupts = <0x06>;
sprd,syscon-pmu-apb = <0x49>;
status = "okay";
digital-codec = <0x4a>;
phandle = <0x9c>;
};
efuse@300 {
compatible = "sprd,sc2731-efuse\0sprd,sc2721-efuse";
reg = <0x300>;
#address-cells = <0x01>;
#size-cells = <0x01>;
hwlocks = <0x44 0x0c>;
calib@6 {
reg = <0x06 0x02>;
phandle = <0x48>;
};
calib@24 {
reg = <0x24 0x02>;
phandle = <0x45>;
};
calib@26 {
reg = <0x26 0x02>;
phandle = <0x46>;
};
calib@d1 {
reg = <0x1a 0x02>;
phandle = <0x41>;
};
calib@d2 {
reg = <0x1a 0x02>;
phandle = <0x42>;
};
calib@0 {
reg = <0x00 0x02>;
phandle = <0x94>;
};
calib@28 {
reg = <0x28 0x02>;
phandle = <0x95>;
};
calib@2c {
reg = <0x2c 0x02>;
phandle = <0x96>;
};
};
power-controller@c00 {
compatible = "sprd,sc2731-regulator\0sprd,sc2721-regulator";
regulator-debugfs-enable;
DCDC_CPU {
regulator-name = "vddcpu";
regulator-min-microvolt = <0x61a80>;
regulator-max-microvolt = <0x1e74e0>;
regulator-ramp-delay = <0x61a8>;
regulator-always-on;
phandle = <0xdc>;
};
DCDC_CORE {
regulator-name = "vddcore";
regulator-min-microvolt = <0x61a80>;
regulator-max-microvolt = <0x1e74e0>;
regulator-ramp-delay = <0x61a8>;
regulator-always-on;
phandle = <0xdd>;
};
DCDC_MEM {
regulator-name = "vddmem";
regulator-min-microvolt = <0x61a80>;
regulator-max-microvolt = <0x36e24b>;
regulator-ramp-delay = <0x61a8>;
regulator-always-on;
phandle = <0xde>;
};
DCDC_GEN {
regulator-name = "vddgen";
regulator-min-microvolt = <0x927c0>;
regulator-max-microvolt = <0x39ef8b>;
regulator-ramp-delay = <0x61a8>;
regulator-always-on;
phandle = <0xdf>;
};
LDO_VDDCAMA {
regulator-name = "vddcama";
regulator-min-microvolt = <0x124f80>;
regulator-max-microvolt = <0x393870>;
regulator-ramp-delay = <0x61a8>;
phandle = <0xe0>;
};
LDO_VDDCAMMOT {
regulator-name = "vddcammot";
regulator-min-microvolt = <0x124f80>;
regulator-max-microvolt = <0x393870>;
regulator-ramp-delay = <0x61a8>;
phandle = <0xe1>;
};
LDO_VDDSIM2 {
regulator-name = "vddsim2";
regulator-min-microvolt = <0x124f80>;
regulator-max-microvolt = <0x393870>;
regulator-ramp-delay = <0x61a8>;
status = "disabled";
phandle = <0xe2>;
};
LDO_VDDEMMCCORE {
regulator-name = "vddemmccore";
regulator-min-microvolt = <0x124f80>;
regulator-max-microvolt = <0x393870>;
regulator-ramp-delay = <0x61a8>;
phandle = <0x35>;
};
LDO_VDDSDCORE {
regulator-name = "vddsdcore";
regulator-min-microvolt = <0x124f80>;
regulator-max-microvolt = <0x393870>;
regulator-ramp-delay = <0x61a8>;
phandle = <0x33>;
};
LDO_VDDSDIO {
regulator-name = "vddsdio";
regulator-min-microvolt = <0x124f80>;
regulator-max-microvolt = <0x393870>;
regulator-ramp-delay = <0x61a8>;
phandle = <0x34>;
};
LDO_VDD28 {
regulator-name = "vdd28";
regulator-min-microvolt = <0x124f80>;
regulator-max-microvolt = <0x393870>;
regulator-ramp-delay = <0x61a8>;
regulator-always-on;
phandle = <0x43>;
};
LDO_VDDWIFIPA {
regulator-name = "vddwifipa";
regulator-min-microvolt = <0x124f80>;
regulator-max-microvolt = <0x393870>;
regulator-ramp-delay = <0x61a8>;
phandle = <0xe3>;
};
LDO_VDDDCXO {
regulator-name = "vdddcxo";
regulator-min-microvolt = <0x124f80>;
regulator-max-microvolt = <0x393870>;
regulator-ramp-delay = <0x61a8>;
regulator-always-on;
phandle = <0xe4>;
};
LDO_VDDUSB33 {
regulator-name = "vddusb33";
regulator-min-microvolt = <0x124f80>;
regulator-max-microvolt = <0x393870>;
regulator-ramp-delay = <0x61a8>;
phandle = <0x3c>;
};
LDO_VDDCAMD {
regulator-name = "vddcamd";
regulator-min-microvolt = <0xf5aaa>;
regulator-max-microvolt = <0x16e360>;
regulator-ramp-delay = <0x61a8>;
phandle = <0xe5>;
};
LDO_VDDCON {
regulator-name = "vddcon";
regulator-min-microvolt = <0x10e14a>;
regulator-max-microvolt = <0x186a00>;
regulator-ramp-delay = <0x61a8>;
phandle = <0xe6>;
};
LDO_VDDCAMIO {
regulator-name = "vddcamio";
regulator-min-microvolt = <0x10e14a>;
regulator-max-microvolt = <0x1cfde0>;
regulator-ramp-delay = <0x61a8>;
phandle = <0xe7>;
};
LDO_VDD18 {
regulator-name = "vdd18";
regulator-min-microvolt = <0x10e14a>;
regulator-max-microvolt = <0x1cfde0>;
regulator-ramp-delay = <0x61a8>;
regulator-always-on;
phandle = <0xe8>;
};
LDO_VDDRF18 {
regulator-name = "vddrf18";
regulator-min-microvolt = <0x10e14a>;
regulator-max-microvolt = <0x1cfde0>;
regulator-ramp-delay = <0x61a8>;
regulator-always-on;
phandle = <0xe9>;
};
LDO_VDDRF125 {
regulator-name = "vddrf125";
regulator-min-microvolt = <0x10e14a>;
regulator-max-microvolt = <0x155cc0>;
regulator-ramp-delay = <0x61a8>;
regulator-always-on;
phandle = <0xea>;
};
LDO_VDDLDOMEM {
regulator-name = "vddldomem";
regulator-min-microvolt = <0x10e14a>;
regulator-max-microvolt = <0x155cc0>;
regulator-ramp-delay = <0x61a8>;
regulator-always-on;
phandle = <0xeb>;
};
LDO_VDDKPLED {
regulator-name = "vddkpled";
regulator-min-microvolt = <0x124f80>;
regulator-max-microvolt = <0x393870>;
regulator-ramp-delay = <0x61a8>;
regulator-always-on;
phandle = <0xec>;
};
};
};
};
hwspinlock@40060000 {
compatible = "sprd,hwspinlock-r3p0";
reg = <0x00 0x40060000 0x00 0x10000>;
#hwlock-cells = <0x01>;
clock-names = "enable";
clocks = <0x4b 0x11>;
phandle = <0x44>;
};
mailbox@400a0000 {
compatible = "unisoc,mailbox";
reg = <0x00 0x400a0000 0x00 0x8000 0x00 0x400a8000 0x00 0x8000>;
reg-names = "inbox\0outbox";
sprd,mailbox_clk = <0x38 0x04 0x200000>;
interrupts = <0x00 0x44 0x04 0x00 0x45 0x04 0x00 0x77 0x04>;
interrupt-names = "inbox\0outbox\0oob-outbox";
#mbox-cells = <0x02>;
phandle = <0x81>;
};
watchdog@40310000 {
compatible = "sprd,wdt-r2p0-fiq";
reg = <0x00 0x40310000 0x00 0x1000>;
interrupts = <0x00 0x7c 0x04>;
timeout-sec = <0x1e>;
clock-names = "enable\0rtc_enable";
clocks = <0x4b 0x1f 0x4b 0x3b>;
};
djtag@40340000 {
compatible = "sprd,djtag";
reg = <0x00 0x40340000 0x00 0x1000>;
syscon-names = "soft_rst";
syscon = <0x38 0x130 0x80>;
clock-names = "enable";
clocks = <0x4b 0x29>;
hwlocks = <0x44 0x0a>;
hwlock-names = "djtag";
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0xed>;
aon-busmonitor@3 {
compatible = "sprd,busmonitor";
interrupts = <0x00 0x5c 0x04>;
reg = <0x03>;
sprd,bm-num = <0x07>;
sprd,bm-name = "AP\0WTLCP\0PUBCP\0SP\0DMA\0EAXI\0WCN";
sprd,bm-type = <0x01 0x01 0x01 0x01 0x01 0x01 0x01>;
sprd,bm-dap = <0x00 0x02 0x01 0x03 0x04 0x05 0x09>;
sprd,bm-config = <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x01 0x01>;
sprd,bm-id = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
sprd,bm-ranges = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
};
apcpu-busmonitor@7 {
compatible = "sprd,busmonitor";
interrupts = <0x00 0x57 0x04>;
reg = <0x07>;
sprd,bm-num = <0x02>;
sprd,bm-name = "ACE\0AP";
sprd,bm-type = <0x01 0x01>;
sprd,bm-dap = <0x01 0x02>;
sprd,bm-config = <0x00 0x01 0x01 0x00 0x01 0x01>;
sprd,bm-id = <0x00 0x00 0x00 0x00 0x00 0x00>;
sprd,bm-ranges = <0x00 0x00 0x00 0x00>;
};
};
dma-controller@40100000 {
compatible = "sprd,sharkl3-dma\0sprd,sc9860-dma";
reg = <0x00 0x40100000 0x00 0x4000>;
#dma-cells = <0x01>;
#dma-channels = <0x09>;
clock-names = "enable";
clocks = <0x4b 0x2b>;
phandle = <0x84>;
};
gpio@40210000 {
compatible = "sprd,sc9863a-eic-debounce\0sprd,sc9860-eic-debounce";
reg = <0x00 0x40210000 0x00 0x80 0x00 0x40370000 0x00 0x80>;
gpio-controller;
#gpio-cells = <0x02>;
interrupt-controller;
#interrupt-cells = <0x02>;
interrupts = <0x00 0x25 0x04>;
phandle = <0xee>;
};
gpio@40210080 {
compatible = "sprd,sc9863a-eic-latch\0sprd,sc9860-eic-latch";
reg = <0x00 0x40210080 0x00 0x20 0x00 0x40370080 0x00 0x20>;
gpio-controller;
#gpio-cells = <0x02>;
interrupt-controller;
#interrupt-cells = <0x02>;
interrupts = <0x00 0x25 0x04>;
phandle = <0xef>;
};
gpio@402100a0 {
compatible = "sprd,sc9863a-eic-async\0sprd,sc9860-eic-async";
reg = <0x00 0x402100a0 0x00 0x20 0x00 0x403700a0 0x00 0x20>;
gpio-controller;
#gpio-cells = <0x02>;
interrupt-controller;
#interrupt-cells = <0x02>;
interrupts = <0x00 0x25 0x04>;
phandle = <0xf0>;
};
gpio@402100c0 {
compatible = "sprd,sc9863a-eic-sync\0sprd,sc9860-eic-sync";
reg = <0x00 0x402100c0 0x00 0x20 0x00 0x403700c0 0x00 0x20>;
gpio-controller;
#gpio-cells = <0x02>;
interrupt-controller;
#interrupt-cells = <0x02>;
interrupts = <0x00 0x25 0x04>;
phandle = <0xf1>;
};
gpio@402c0000 {
compatible = "sprd,sharkl3-gpio-plus";
reg = <0x00 0x402c0000 0x00 0x1000>;
gpio-controller;
#gpio-cells = <0x02>;
interrupt-controller;
#interrupt-cells = <0x02>;
interrupts = <0x00 0x82 0x04>;
phandle = <0x99>;
};
i2c@40080000 {
compatible = "sprd,sc9863-i2c\0sprd,sharkl3-hw-i2c";
reg = <0x40080000 0x1000>;
interrupts = <0x00 0x22 0x04>;
clock-frequency = <0x186a0>;
#address-cells = <0x01>;
#size-cells = <0x00>;
status = "disabled";
reset-names = "i2c_rst";
resets = <0x4b 0x1e>;
clock-names = "enable\0i2c\0source";
clocks = <0x4b 0x49 0x30 0x1c 0x11>;
phandle = <0xf2>;
};
pwm@40260000 {
compatible = "sprd,s9863a-pwm\0sprd,ums512-pwm";
reg = <0x00 0x40260000 0x00 0x10000>;
clock-names = "pwm0\0enable0\0pwm1\0enable1\0pwm2\0enable2";
clocks = <0x30 0x0f 0x4b 0x01 0x30 0x10 0x4b 0x02 0x30 0x11 0x4b 0x03>;
assigned-clocks = <0x30 0x0f 0x30 0x10 0x30 0x11>;
assigned-clock-parents = <0x11 0x11 0x11>;
counter-bits = "10bit\010bit\010bit";
#pwm-cells = <0x02>;
phandle = <0xf3>;
};
pinctrl@402a0000 {
compatible = "sprd,sharkl3-pinctrl";
reg = <0x00 0x402a0000 0x00 0x10000>;
phandle = <0xa0>;
iismtx-inf0-8 {
pins = "SHARKL3_IIS_INF0_SYS_SEL";
sprd,control = <0x08>;
phandle = <0x4c>;
};
iismtx-inf0-0 {
pins = "SHARKL3_IIS_INF0_SYS_SEL";
sprd,control = <0x00>;
phandle = <0x4d>;
};
iismtx-inf0-1 {
pins = "SHARKL3_IIS_INF0_SYS_SEL";
sprd,control = <0x01>;
phandle = <0x4e>;
};
iismtx-inf0-4 {
pins = "SHARKL3_IIS_INF0_SYS_SEL";
sprd,control = <0x04>;
phandle = <0x4f>;
};
iismtx-inf0-5 {
pins = "SHARKL3_IIS_INF0_SYS_SEL";
sprd,control = <0x05>;
phandle = <0x50>;
};
iismtx-inf0-3 {
pins = "SHARKL3_IIS_INF0_SYS_SEL";
sprd,control = <0x03>;
phandle = <0x51>;
};
iismtx-inf3-8 {
pins = "SHARKL3_IIS_INF3_SYS_SEL";
sprd,control = <0x08>;
phandle = <0x52>;
};
iismtx-inf3-0 {
pins = "SHARKL3_IIS_INF3_SYS_SEL";
sprd,control = <0x00>;
phandle = <0x53>;
};
iismtx-inf3-4 {
pins = "SHARKL3_IIS_INF3_SYS_SEL";
sprd,control = <0x04>;
phandle = <0x54>;
};
iismtx-inf3-5 {
pins = "SHARKL3_IIS_INF3_SYS_SEL";
sprd,control = <0x05>;
phandle = <0x55>;
};
iismtx-inf3-3 {
pins = "SHARKL3_IIS_INF3_SYS_SEL";
sprd,control = <0x03>;
phandle = <0x56>;
};
iismtx-inf3-11 {
pins = "SHARKL3_IIS_INF3_SYS_SEL";
sprd,control = <0x0b>;
phandle = <0x57>;
};
iismtx-inf4-8 {
pins = "SHARKL3_IIS_INF4_SYS_SEL";
sprd,control = <0x08>;
phandle = <0x58>;
};
iismtx-inf4-0 {
pins = "SHARKL3_IIS_INF4_SYS_SEL";
sprd,control = <0x00>;
phandle = <0x59>;
};
iismtx-inf4-4 {
pins = "SHARKL3_IIS_INF4_SYS_SEL";
sprd,control = <0x04>;
phandle = <0x5a>;
};
iismtx-inf4-5 {
pins = "SHARKL3_IIS_INF4_SYS_SEL";
sprd,control = <0x05>;
phandle = <0x5b>;
};
iismtx-inf4-3 {
pins = "SHARKL3_IIS_INF4_SYS_SEL";
sprd,control = <0x03>;
phandle = <0x5c>;
};
iismtx-inf4-11 {
pins = "SHARKL3_IIS_INF4_SYS_SEL";
sprd,control = <0x0b>;
phandle = <0x5d>;
};
iismtx-inf3-inf4-loop-1 {
pins = "SHARKL3_IIS_INF4_INF3_LOOP";
sprd,control = <0x01>;
phandle = <0x5e>;
};
iismtx-inf3-inf4-loop-0 {
pins = "SHARKL3_IIS_INF4_INF3_LOOP";
sprd,control = <0x00>;
phandle = <0x5f>;
};
};
vbc@40020000 {
compatible = "unisoc,vbc-r1p0v3";
#sound-dai-cells = <0x01>;
reg = <0x00 0x40020000 0x00 0x10000>;
sprd,clk-stable = <0x402d0060 0x04>;
sprd,syscon-aon-apb = <0x38>;
sprd,syscon-pmu-apb = <0x49>;
sprd,dynamic-eq-support = <0x00>;
sprd,vbc-iis-lr-invert = <0x00 0x01 0x01>;
sprd,vbc-use-dma-type = <0x00 0x00 0x00 0x00>;
sprd,vbc-use-ad01-only = <0x01>;
sprd,iis_bt_fm_loop = <0x03 0x04>;
pinctrl-names = "vbc_iis1_0\0ap_iis0_0\0ap_iis1_0\0tgdsp_iis0_0\0tgdsp_iis1_0\0pubcp_iis0_0\0vbc_iis1_3\0ap_iis0_3\0tgdsp_iis0_3\0tgdsp_iis1_3\0pubcp_iis0_3\0wcn_iis0_3\0vbc_iis1_4\0ap_iis0_4\0tgdsp_iis0_4\0tgdsp_iis1_4\0pubcp_iis0_4\0wcn_iis0_4\0iis_bt_fm_loop_3_4_enable\0iis_bt_fm_loop_3_4_disable";
pinctrl-0 = <0x4c>;
pinctrl-1 = <0x4d>;
pinctrl-2 = <0x4e>;
pinctrl-3 = <0x4f>;
pinctrl-4 = <0x50>;
pinctrl-5 = <0x51>;
pinctrl-6 = <0x52>;
pinctrl-7 = <0x53>;
pinctrl-8 = <0x54>;
pinctrl-9 = <0x55>;
pinctrl-10 = <0x56>;
pinctrl-11 = <0x57>;
pinctrl-12 = <0x58>;
pinctrl-13 = <0x59>;
pinctrl-14 = <0x5a>;
pinctrl-15 = <0x5b>;
pinctrl-16 = <0x5c>;
pinctrl-17 = <0x5d>;
pinctrl-18 = <0x5e>;
pinctrl-19 = <0x5f>;
phandle = <0x9b>;
};
audio-codec@40000000 {
compatible = "unisoc,sharkl3-audio-codec";
reg = <0x00 0x40000000 0x00 0x2000>;
interrupts = <0x00 0x14 0x04>;
sprd,syscon-aon-apb = <0x38>;
sprd,anlg-phy-g-syscon = <0x60>;
phandle = <0x4a>;
};
efuse@40240000 {
compatible = "sprd,sharkl3-efuse";
reg = <0x00 0x40240000 0x00 0x10000>;
#address-cells = <0x01>;
#size-cells = <0x01>;
clock-names = "enable";
hwlocks = <0x44 0x08>;
clocks = <0x4b 0x09>;
phandle = <0xf4>;
uid-start@ec {
reg = <0xec 0x04>;
phandle = <0xf5>;
};
uid-end@e8 {
reg = <0xe8 0x04>;
phandle = <0xf6>;
};
dvfs-bin-cpu0@9 {
reg = <0x09 0x04>;
bits = <0x00 0x04>;
phandle = <0x88>;
};
dvfs-bin-cpu1@9 {
reg = <0x09 0x04>;
bits = <0x04 0x04>;
phandle = <0x89>;
};
gpu-bin@b {
reg = <0x0b 0x04>;
bits = <0x00 0x04>;
phandle = <0x73>;
};
wcn-alpha@14 {
reg = <0x14 0x04>;
phandle = <0xf7>;
};
wcn-beta@18 {
reg = <0x18 0x04>;
phandle = <0xf8>;
};
wcn-gamma@1c {
reg = <0x1c 0x04>;
phandle = <0xf9>;
};
wcn-delta@20 {
reg = <0x20 0x04>;
phandle = <0xfa>;
};
gthm-delta@21 {
reg = <0x21 0x04>;
bits = <0x01 0x07>;
phandle = <0x61>;
};
cthm-sign@22 {
reg = <0x22 0x04>;
bits = <0x00 0x01>;
phandle = <0x62>;
};
cthm-ratio@22 {
reg = <0x22 0x04>;
bits = <0x01 0x07>;
phandle = <0x63>;
};
cthm-delta@23 {
reg = <0x23 0x04>;
bits = <0x00 0x07>;
phandle = <0x64>;
};
};
gpu-thm@402f0000 {
compatible = "sprd,sharkl3-thermal";
reg = <0x00 0x402f0000 0x00 0x10000>;
clock-names = "enable";
clocks = <0x4b 0x19>;
#thermal-sensor-cells = <0x01>;
sprd,algor_ver = <0x02>;
nvmem-cells = <0x61>;
nvmem-cell-names = "thm_delta_cal";
phandle = <0x8a>;
};
cpu-thm@40390000 {
compatible = "sprd,sharkl3-thermal";
reg = <0x00 0x40390000 0x00 0x10000>;
clock-names = "enable";
clocks = <0x4b 0x19>;
#thermal-sensor-cells = <0x01>;
sprd,algor_ver = <0x01>;
nvmem-cells = <0x62 0x63 0x64>;
nvmem-cell-names = "thm_sign_cal\0thm_ratio_cal\0thm_delta_cal";
phandle = <0x8b>;
};
modem-dbg-log@1000c000 {
compatible = "sprd,dbg-log-sharkl3";
reg = <0x00 0x1000c000 0x00 0x4000>;
sprd,syscon-aon-apb = <0x38>;
sprd,syscon-dsi-apb = <0x65>;
sprd,syscon-pll-apb = <0x66>;
sprd,syscon-pmu-apb = <0x49>;
sprd,ch-name = "TRAINING\0WTL\0MDAR\0TPIU\0DBUS\0WCN";
sprd,ch-index = <0x0f 0x01 0x00 0x02 0x03 0x04>;
sprd,dcfix;
sprd,mm;
clock-names = "serdes_eb\0src0\0src1\0src2";
clocks = <0x4b 0x61 0x13 0x00 0x13 0x18 0x13 0x14>;
status = "okay";
phandle = <0xfb>;
};
};
mm {
compatible = "simple-bus";
#address-cells = <0x02>;
#size-cells = <0x02>;
ranges;
phandle = <0xfc>;
iommu@60a0c000 {
compatible = "unisoc,iommuexl3-dcam";
reg = <0x00 0x60a00000 0x00 0xc000 0x00 0x60a0c000 0x00 0x60>;
iova-base = <0x40000000>;
iova-size = <0x20000000>;
reg_name = "mmu_interrupt_reg\0mmu_reg";
status = "okay";
#iommu-cells = <0x00>;
phandle = <0x70>;
};
iommu@60bffc00 {
compatible = "unisoc,iommuexl3-isp";
reg = <0x00 0x60b00000 0x00 0xffc00 0x00 0x60bffc00 0x00 0x400>;
iova-base = <0x50000000>;
iova-size = <0x20000000>;
reg_name = "mmu_interrupt_reg\0mmu_reg";
status = "okay";
#iommu-cells = <0x00>;
phandle = <0x69>;
};
iommu@62200000 {
compatible = "unisoc,iommuexl3-vsp";
reg = <0x00 0x62200000 0x00 0x80 0x00 0x62200000 0x00 0x80>;
iova-base = <0x20000000>;
iova-size = <0x10000000>;
reg_name = "mmu_interrupt_reg\0mmu_reg";
status = "okay";
#iommu-cells = <0x00>;
phandle = <0x7d>;
};
iommu@62300300 {
compatible = "unisoc,iommuexl3-jpg";
reg = <0x00 0x62300000 0x00 0x300 0x00 0x62300300 0x00 0x80>;
iova-base = <0x70000000>;
iova-size = <0x10000000>;
reg_name = "mmu_interrupt_reg\0mmu_reg";
status = "okay";
#iommu-cells = <0x00>;
phandle = <0x7e>;
};
iommu@62400200 {
compatible = "unisoc,iommuexl3-cpp";
reg = <0x00 0x62400000 0x00 0x200 0x00 0x62400200 0x00 0x60>;
iova-base = <0x60000000>;
iova-size = <0x8000000>;
reg_name = "mmu_interrupt_reg\0mmu_reg";
status = "okay";
#iommu-cells = <0x00>;
phandle = <0x6c>;
};
iommu@63000000 {
compatible = "unisoc,iommuexl3-dispc";
reg = <0x00 0x63000000 0x00 0x800 0x00 0x63000800 0x00 0x80>;
iova-base = <0x30000000>;
iova-size = <0x10000000>;
reg_name = "mmu_interrupt_reg\0mmu_reg";
status = "okay";
#iommu-cells = <0x00>;
phandle = <0x74>;
};
campower-domain {
compatible = "sprd,sharkl3-camsys-domain";
shutdown-en = <0x49 0x1c 0x1000000>;
force-shutdown = <0x49 0x1c 0x2000000>;
pwr-status0 = <0x49 0xbc 0xf8000000>;
bus-status0 = <0x49 0x6ec 0x80000>;
aon-apb-mm-eb = <0x38 0x00 0x2000000>;
init-dis-bits = <0x38 0x50 0x1f3f8>;
clock-names = "clk_cphy_cfg_gate_eb\0clk_mm_eb\0clk_mm_ahb\0clk_mm_ahb_parent\0clk_mm_emc\0clk_mm_emc_parent";
clocks = <0x4b 0x5f 0x4b 0x13 0x30 0x2b 0x13 0x0f 0x30 0x2a 0x13 0x08>;
sprd,cam-ahb-syscon = <0x67>;
#power-domain-cells = <0x00>;
status = "okay";
phandle = <0x71>;
};
isp@60b00000 {
compatible = "sprd,isp";
reg = <0x00 0x60b00000 0x00 0x100000>;
interrupts = <0x00 0x2c 0x04 0x00 0x7d 0x04>;
interrupts_name = "ch0\0ch1";
reset = <0x67 0x04 0x80>;
clock-names = "isp_eb\0isp_axi_eb\0isp_clk\0isp_clk_128m\0isp_clk_256m\0isp_clk_307m2\0isp_clk_384m\0isp_clk_468m\0isp_clk_parent";
clocks = <0x68 0x02 0x68 0x07 0x30 0x2e 0x13 0x0a 0x13 0x09 0x13 0x0c 0x13 0x02 0x13 0x19 0x13 0x19>;
sprd,cam-ahb-syscon = <0x67>;
sprd,isp-count = <0x01>;
iommus = <0x69>;
status = "okay";
phandle = <0x6f>;
};
cpp@62400000 {
compatible = "sprd,cpp";
reg = <0x00 0x62400000 0x00 0x1000>;
interrupts = <0x00 0x7e 0x04>;
cpp_rst = <0x6a 0x04 0x3c0>;
path0_rst = <0x6a 0x04 0x80>;
path1_rst = <0x6a 0x04 0x100>;
dma_rst = <0x6a 0x04 0x200>;
clock-names = "cpp_eb\0cpp_clk\0cpp_clk_parent\0clk_mm_vsp_eb\0clk_mm_vsp_emc\0clk_mm_vsp_emc_parent";
clocks = <0x6b 0x03 0x30 0x30 0x13 0x0c 0x4b 0x25 0x30 0x34 0x13 0x19>;
iommus = <0x6c>;
power-domains = <0x6d>;
status = "okay";
phandle = <0xfd>;
};
dcam@60a00000 {
compatible = "sprd,sharkl3-cam";
reg = <0x00 0x60a00000 0x00 0x1000 0x00 0x60a01000 0x00 0x1000 0x00 0x60a02000 0x00 0x1000 0x00 0x60a03000 0x00 0x1000>;
reg_name = "dcam0_reg\0dcam1_reg\0dcam2_reg\0axi_ctrl_reg";
interrupts = <0x00 0x2d 0x04 0x00 0x9e 0x04 0x00 0x9f 0x04>;
interrupt-names = "dcam0\0dcam1\0dcam2";
dcam_all_reset = <0x67 0x04 0x40>;
dcam0_reset = <0x67 0x04 0x04>;
dcam1_reset = <0x67 0x04 0x08>;
dcam2_reset = <0x67 0x04 0x10>;
clock-names = "dcam_eb\0dcam_axi_eb\0clk_cphy_cfg_gate_eb\0clk_mm_eb\0clk_mm_ahb\0clk_mm_ahb_parent\0clk_mm_emc\0clk_mm_emc_parent\0dcam_clk\0dcam_clk_256m\0dcam_clk_307m2\0dcam_clk_384m\0dcam_clk_parent\0dcam_bpc_clk\0dcam_bpc_clk_parent";
clocks = <0x68 0x01 0x68 0x06 0x4b 0x5f 0x4b 0x13 0x30 0x2b 0x13 0x0f 0x30 0x2a 0x13 0x08 0x30 0x2d 0x13 0x09 0x13 0x0c 0x13 0x02 0x13 0x02 0x30 0x2c 0x6e 0x03>;
sprd,cam-ahb-syscon = <0x67>;
sprd,isp = <0x6f>;
sprd,dcam-count = <0x03>;
sprd,project-id = <0x00>;
iommus = <0x70>;
power-domains = <0x71>;
status = "okay";
phandle = <0xfe>;
};
mipi-csi-phy0 {
compatible = "sprd,mipi-csi-phy";
sprd,phyid = <0x00>;
sprd,phyname = "2p2";
status = "okay";
phandle = <0xff>;
};
mipi-csi-phy1 {
compatible = "sprd,mipi-csi-phy";
sprd,phyid = <0x01>;
sprd,phyname = "4lane";
status = "okay";
phandle = <0x100>;
};
mipi-csi-phy2 {
compatible = "sprd,mipi-csi-phy";
sprd,phyid = <0x02>;
sprd,phyname = "2lane";
status = "okay";
phandle = <0x101>;
};
mipi-csi-phy0-s {
compatible = "sprd,mipi-csi-phy";
sprd,phyid = <0x03>;
sprd,phyname = "2p2_m";
status = "okay";
phandle = <0x102>;
};
mipi-csi-phy0-m {
compatible = "sprd,mipi-csi-phy";
sprd,phyid = <0x04>;
sprd,phyname = "2p2_s";
status = "okay";
phandle = <0x103>;
};
mipi-csi-phy0-m1 {
compatible = "sprd,mipi-csi-phy";
sprd,phyid = <0x04>;
sprd,phyname = "2p2_s";
status = "okay";
phandle = <0x104>;
};
csi@60c00000 {
compatible = "sprd,csi-controller";
reg = <0x00 0x60c00000 0x00 0x1000>;
interrupts = <0x00 0x28 0x04 0x00 0x29 0x04>;
sprd,aon-apb-syscon = <0x38>;
sprd,cam-ahb-syscon = <0x67>;
sprd,anlg_phy_g1_controller = <0x65>;
clock-names = "clk_mipi_csi_gate_eb\0clk_csi_eb\0mipi_csi_src_eb\0clk_gate_eb";
clocks = <0x68 0x08 0x68 0x03 0x72 0x00 0x68 0x00>;
sprd,csi-id = <0x00>;
sprd,dcam-id = <0x00>;
sprd,ip-version = <0x200>;
status = "okay";
phandle = <0x105>;
};
csi@60d00000 {
compatible = "sprd,csi-controller";
reg = <0x00 0x60d00000 0x00 0x1000>;
interrupts = <0x00 0x47 0x04 0x00 0x48 0x04>;
sprd,aon-apb-syscon = <0x38>;
sprd,cam-ahb-syscon = <0x67>;
sprd,anlg_phy_g1_controller = <0x65>;
clock-names = "clk_mipi_csi_gate_eb\0clk_csi_eb\0mipi_csi_src_eb\0clk_gate_eb";
clocks = <0x68 0x09 0x68 0x04 0x72 0x01 0x68 0x00>;
sprd,csi-id = <0x01>;
sprd,dcam-id = <0x01>;
sprd,ip-version = <0x200>;
status = "okay";
phandle = <0x106>;
};
csi@60e00000 {
compatible = "sprd,csi-controller";
reg = <0x00 0x60e00000 0x00 0x1000>;
interrupts = <0x00 0x9c 0x04 0x00 0x9d 0x04>;
sprd,aon-apb-syscon = <0x38>;
sprd,cam-ahb-syscon = <0x67>;
sprd,anlg_phy_g1_controller = <0x65>;
clock-names = "clk_mipi_csi_gate_eb\0clk_csi_eb\0mipi_csi_src_eb\0clk_gate_eb";
clocks = <0x68 0x0a 0x68 0x05 0x72 0x02 0x68 0x00>;
sprd,csi-id = <0x02>;
sprd,dcam-id = <0x02>;
sprd,ip-version = <0x200>;
status = "okay";
phandle = <0x107>;
};
gpu@60000000 {
compatible = "sprd,rogue";
reg = <0x00 0x60000000 0x00 0x100000>;
top_force_shutdown = <0x49 0x20 0x2000000>;
core_force_shutdown = <0x49 0x124 0x2000000>;
core_auto_shutdown = <0x49 0x124 0x1000000>;
gpu_top_state = <0x49 0xbc 0x7c00000>;
gpu_core_state = <0x49 0x128 0x3e0>;
clk_gpu_eb = <0x38 0x50 0x01>;
interrupts = <0x00 0x27 0x04>;
nvmem-cells = <0x73>;
nvmem-cell-names = "gpu_bin";
operating-points = <0x3e800 0x00 0x5dc00 0x00 0x86470 0x00 0x927c0 0x00>;
sprd,dvfs-lists = <0x3e800 0x00 0x05 0x01 0x5dc00 0x00 0x07 0x01 0x86470 0x00 0x09 0x01 0x927c0 0x00 0x09 0x01>;
sprd,dvfs-default = <0x00>;
sprd,dvfs-scene-extreme = <0x02>;
sprd,dvfs-scene-high = <0x01>;
sprd,dvfs-scene-medium = <0x01>;
sprd,dvfs-scene-low = <0x00>;
sprd,dvfs-range-max = <0x02>;
sprd,dvfs-range-min = <0x00>;
clocks = <0x4b 0x45 0x30 0x28 0x30 0x29 0x13 0x0f 0x13 0x03 0x13 0x09 0x13 0x0c 0x13 0x02 0x13 0x08 0x13 0x17>;
phandle = <0x108>;
};
dpu@63000000 {
compatible = "sprd,sharkl3-dpu";
reg = <0x00 0x63000000 0x00 0x1000>;
interrupts = <0x00 0x2e 0x04>;
status = "okay";
iommus = <0x74>;
power-domains = <0x75>;
reset-syscon = <0x38 0x0c 0x100000>;
clock-names = "clk_src_128m\0clk_src_153m6\0clk_src_192m\0clk_src_256m\0clk_src_384m\0clk_dpu_core\0clk_dpu_dpi\0clk_aon_apb_disp_eb";
clocks = <0x13 0x0a 0x13 0x0f 0x13 0x03 0x13 0x09 0x13 0x02 0x30 0x23 0x30 0x24 0x4b 0x46>;
sprd,logo-memory = <0x76>;
phandle = <0x109>;
port {
phandle = <0x86>;
endpoint {
remote-endpoint = <0x77>;
phandle = <0x79>;
};
};
};
dsi@63100000 {
compatible = "sprd,sharkl3-dsi-host";
reg = <0x00 0x63100000 0x00 0x1000>;
interrupts = <0x00 0x30 0x04 0x00 0x31 0x04>;
status = "okay";
reset-syscon = <0x38 0x628 0x04>;
clock-names = "clk_aon_apb_disp_eb";
clocks = <0x4b 0x46>;
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0x10a>;
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
reg = <0x00>;
endpoint {
remote-endpoint = <0x78>;
phandle = <0x7c>;
};
};
port@1 {
reg = <0x01>;
endpoint {
remote-endpoint = <0x79>;
phandle = <0x77>;
};
};
};
panel {
compatible = "sprd,generic-mipi-panel";
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x00>;
phandle = <0x10b>;
port@1 {
reg = <0x01>;
endpoint {
remote-endpoint = <0x7a>;
phandle = <0x7b>;
};
};
};
};
dphy {
compatible = "sprd,sharkl3-dsi-phy";
reg = <0x00 0x63100000 0x00 0x1000>;
status = "okay";
enable-syscon = <0x38 0xb0 0x1800000>;
power-small-syscon = <0x38 0x24 0x8000>;
power-large-syscon = <0x38 0x24 0x4000>;
power-iso-syscon = <0x38 0x24 0x8000000>;
phandle = <0x10c>;
ports {
#address-cells = <0x01>;
#size-cells = <0x00>;
port@0 {
reg = <0x00>;
endpoint {
remote-endpoint = <0x7b>;
phandle = <0x7a>;
};
};
port@1 {
reg = <0x01>;
endpoint {
remote-endpoint = <0x7c>;
phandle = <0x78>;
};
};
};
};
gsp@63000000 {
compatible = "sprd,gsp-core";
reg = <0x00 0x63000000 0x00 0x2000>;
core-id = <0x00>;
kcfg-num = <0x10>;
interrupts = <0x00 0x33 0x04>;
iommus = <0x74>;
clock-names = "clk_dpu_core_src\0clk_dpu_core\0clk_aon_apb_disp_eb";
clocks = <0x13 0x02 0x30 0x23 0x4b 0x46>;
phandle = <0x85>;
};
video-codec@62200000 {
compatible = "sprd,sharkl3-vsp";
reg = <0x00 0x62200000 0x00 0xc000>;
interrupts = <0x00 0x2b 0x04>;
sprd,video_ip_version = <0x10>;
reset-syscon = <0x6a 0x04 0x0c>;
vsp-domain-eb-syscon = <0x38 0x04 0x4000>;
iommus = <0x7d>;
power-domains = <0x6d>;
status = "okay";
clock-names = "clk_mm_eb\0clk_ahb_gate_vsp_eb\0clk_axi_gate_vsp\0clk_vsp_ahb_mmu_eb\0clk_ahb_vsp\0clk_ahb_vsp_parent\0clk_emc_vsp\0clk_emc_vsp_parent\0clk_src_76m8\0clk_src_128m\0clk_src_256m\0clk_src_307m2\0clk_src_384m\0clk_vsp";
clocks = <0x4b 0x25 0x4b 0x4a 0x6b 0x00 0x6b 0x01 0x30 0x35 0x13 0x0f 0x30 0x34 0x13 0x19 0x13 0x10 0x13 0x0a 0x13 0x09 0x13 0x0c 0x13 0x02 0x30 0x36>;
phandle = <0x10d>;
};
jpeg-codec@62300000 {
compatible = "sprd,sharkl3-jpg";
reg = <0x00 0x62300000 0x00 0x8000>;
interrupts = <0x00 0x2a 0x04>;
reset-syscon = <0x6a 0x04 0x20>;
aon-apb-eb-syscon = <0x38 0x00 0x2000000>;
iommus = <0x7e>;
power-domains = <0x6d>;
status = "okay";
clock-names = "jpg_domain_eb\0clk_aon_jpg_emc_eb\0jpg_dev_eb\0jpg_ckg_eb\0clk_ahb_vsp\0clk_ahb_vsp_parent\0clk_emc_vsp\0clk_emc_vsp_parent\0clk_src_256m\0clk_src_307m2\0jpg_clk";
clocks = <0x4b 0x25 0x4b 0x4a 0x6b 0x00 0x6b 0x02 0x30 0x35 0x13 0x0f 0x30 0x34 0x13 0x19 0x13 0x09 0x13 0x0c 0x30 0x2f>;
phandle = <0x10e>;
};
};
syscon@402b0000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x402b0000 0x00 0x6000>;
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges = <0x00 0x00 0x402b0000 0x6000>;
phandle = <0x49>;
pmu-gate {
compatible = "sprd,sc9863a-pmu-gate";
reg = <0x00 0x6000>;
sprd,syscon = <0x49>;
clocks = <0x11>;
clock-names = "ext-26m";
#clock-cells = <0x01>;
#reset-cells = <0x01>;
phandle = <0x10f>;
};
};
power-domain@402b0058 {
compatible = "sprd,sharkl3-disp-domain";
reg = <0x00 0x402b0058 0x00 0x20>;
disp-power = <0x49 0x58 0x2000000>;
#power-domain-cells = <0x00>;
phandle = <0x75>;
};
syscon@40350000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x40350000 0x00 0x3000>;
phandle = <0x65>;
};
syscon@40353000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x40353000 0x00 0x3000>;
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges = <0x00 0x00 0x40353000 0x3000>;
phandle = <0x66>;
pll {
compatible = "sprd,sc9863a-pll";
reg = <0x00 0x3000>;
clocks = <0x11>;
clock-names = "ext-26m";
#clock-cells = <0x01>;
phandle = <0x13>;
};
};
syscon@40359000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x40359000 0x00 0x3000>;
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges = <0x00 0x00 0x40359000 0x3000>;
phandle = <0x3a>;
mpll {
compatible = "sprd,sc9863a-mpll";
reg = <0x00 0x3000>;
clocks = <0x11>;
clock-names = "ext-26m";
#clock-cells = <0x01>;
phandle = <0x110>;
};
};
syscon@4035c000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x4035c000 0x00 0x3000>;
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges = <0x00 0x00 0x4035c000 0x3000>;
phandle = <0x111>;
rpll {
compatible = "sprd,sc9863a-rpll";
reg = <0x00 0x3000>;
clocks = <0x11>;
clock-names = "ext-26m";
#clock-cells = <0x01>;
phandle = <0x32>;
};
};
syscon@40363000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x40363000 0x00 0x3000>;
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges = <0x00 0x00 0x40363000 0x3000>;
phandle = <0x60>;
dpll {
compatible = "sprd,sc9863a-dpll";
reg = <0x00 0x3000>;
clocks = <0x11>;
clock-names = "ext-26m";
#clock-cells = <0x01>;
phandle = <0x6e>;
};
};
syscon@40366000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x40366000 0x00 0x3000>;
phandle = <0x112>;
};
syscon@402e0000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x402e0000 0x00 0x4000>;
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges = <0x00 0x00 0x402e0000 0x4000>;
phandle = <0x38>;
aonapb-gate {
compatible = "sprd,sc9863a-aonapb-gate";
reg = <0x00 0x4000>;
clocks = <0x11>;
clock-names = "ext-26m";
#clock-cells = <0x01>;
#reset-cells = <0x01>;
phandle = <0x4b>;
};
};
syscon@20e00000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x20e00000 0x00 0x4000>;
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges = <0x00 0x00 0x20e00000 0x4000>;
phandle = <0x39>;
apahb-gate {
compatible = "sprd,sc9863a-apahb-gate";
reg = <0x00 0x4000>;
clocks = <0x11>;
clock-names = "ext-26m";
#clock-cells = <0x01>;
#reset-cells = <0x01>;
phandle = <0x31>;
};
};
syscon@300e0000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x300e0000 0x00 0x10000>;
phandle = <0x3e>;
};
syscon@300f0000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x300f0000 0x00 0x3000>;
phandle = <0x3d>;
};
syscon@403a0000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x403a0000 0x00 0x10000>;
phandle = <0x113>;
};
syscon@40500000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x40500000 0x00 0x10000>;
phandle = <0x114>;
};
syscon@40510000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x40510000 0x00 0x10000>;
phandle = <0x115>;
};
syscon@40520000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x40520000 0x00 0x10000>;
phandle = <0x116>;
};
syscon@40530000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x40530000 0x00 0x10000>;
phandle = <0x117>;
};
syscon@40540000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x40540000 0x00 0x10000>;
phandle = <0x118>;
};
syscon@40550000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x40550000 0x00 0x10000>;
phandle = <0x119>;
};
syscon@60800000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x60800000 0x00 0x3000>;
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges = <0x00 0x00 0x60800000 0x3000>;
phandle = <0x67>;
mm-gate {
compatible = "sprd,sc9863a-mm-gate";
reg = <0x00 0x3000>;
clocks = <0x11>;
clock-names = "ext-26m";
#clock-cells = <0x01>;
#reset-cells = <0x01>;
phandle = <0x68>;
};
};
syscon@62000000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x62000000 0x00 0x3000>;
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges = <0x00 0x00 0x62000000 0x3000>;
phandle = <0x6a>;
vspahb-gate {
compatible = "sprd,sc9863a-vspahb-gate";
reg = <0x00 0x3000>;
clocks = <0x11>;
clock-names = "ext-26m";
#clock-cells = <0x01>;
#reset-cells = <0x01>;
phandle = <0x6b>;
};
};
syscon@71300000 {
compatible = "sprd,sc9863a-glbregs\0syscon\0simple-mfd";
#syscon-cells = <0x02>;
reg = <0x00 0x71300000 0x00 0x4000>;
#address-cells = <0x01>;
#size-cells = <0x01>;
ranges = <0x00 0x00 0x71300000 0x4000>;
phandle = <0x12>;
apapb-gate {
compatible = "sprd,sc9863a-apapb-gate";
reg = <0x00 0x4000>;
clocks = <0x11>;
clock-names = "ext-26m";
#clock-cells = <0x01>;
#reset-cells = <0x01>;
phandle = <0x0f>;
};
};
clock-controller@21500000 {
compatible = "sprd,sc9863a-ap-clk";
reg = <0x00 0x21500000 0x00 0x1000>;
clocks = <0x3f 0x11>;
clock-names = "ext-32k\0ext-26m";
#clock-cells = <0x01>;
phandle = <0x10>;
};
clock-controller@402d0000 {
compatible = "sprd,sc9863a-aon-clk";
reg = <0x00 0x402d0000 0x00 0x1000>;
clocks = <0x11 0x7f 0x3f 0x80>;
clock-names = "ext-26m\0rco-100m\0ext-32k\0ext-4m";
#clock-cells = <0x01>;
phandle = <0x30>;
};
clock-controller@60900000 {
compatible = "sprd,sc9863a-mm-clk";
reg = <0x00 0x60900000 0x00 0x1000>;
clocks = <0x11>;
clock-names = "ext-26m";
#clock-cells = <0x01>;
phandle = <0x72>;
};
vsp-power-domain {
compatible = "sprd,vsp-pd";
pmu-vsp-force-shutdown-syscon = <0x49 0x30 0x2000000>;
pmu-vsp-auto-shutdown-syscon = <0x49 0x30 0x1000000>;
pmu-pwr-status-syscon = <0x49 0x128 0x1f>;
vsp-domain-eb-syscon = <0x38 0x04 0x4000>;
#power-domain-cells = <0x00>;
status = "okay";
phandle = <0x6d>;
};
};
sipc-virt {
compatible = "unisoc,sipc-virt-bus";
#address-cells = <0x01>;
#size-cells = <0x00>;
phandle = <0x11a>;
core@5 {
compatible = "sprd,sipc";
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x05>;
label = "sipc-lte";
mboxes = <0x81 0x02 0x00>;
sprd,smem-info = <0x8e000000 0x8e000000 0x980000>;
phandle = <0x11b>;
channel@2 {
compatible = "sprd,spool";
reg = <0x02>;
label = "imsbr_data";
sprd,tx-blksize = <0x5f4>;
sprd,tx-blknum = <0x40>;
sprd,rx-blksize = <0x5f4>;
sprd,rx-blknum = <0x40>;
phandle = <0x11c>;
};
channel@3 {
compatible = "sprd,spool";
reg = <0x03>;
label = "imsbr_ctrl";
sprd,tx-blksize = <0x80>;
sprd,tx-blknum = <0x40>;
sprd,rx-blksize = <0x80>;
sprd,rx-blknum = <0x40>;
phandle = <0x11d>;
};
channel@4 {
compatible = "sprd,spipe";
reg = <0x04>;
label = "spipe_lte";
sprd,ringnr = <0x14>;
sprd,size-rxbuf = <0x1000>;
sprd,size-txbuf = <0x1000>;
phandle = <0x11e>;
};
channel@6 {
compatible = "sprd,spipe";
reg = <0x06>;
label = "stty_lte";
sprd,ringnr = <0x20>;
sprd,size-rxbuf = <0x800>;
sprd,size-txbuf = <0x800>;
phandle = <0x11f>;
};
channel@21 {
compatible = "sprd,spipe";
reg = <0x15>;
label = "sdiag_lte";
sprd,ringnr = <0x01>;
sprd,size-rxbuf = <0x20000>;
sprd,size-txbuf = <0x8000>;
phandle = <0x120>;
};
channel@5 {
compatible = "sprd,spool";
reg = <0x05>;
label = "slog_lte";
sprd,tx-blksize = <0x00>;
sprd,tx-blknum = <0x00>;
sprd,rx-blksize = <0x1000>;
sprd,rx-blknum = <0x100>;
phandle = <0x121>;
};
route@0 {
compatible = "sprd,sipx";
reg = <0x00>;
label = "sipx_lte";
sprd,dl-pool = <0x800>;
sprd,dl-ack-pool = <0x40>;
sprd,ul-pool = <0x800>;
sprd,ul-ack-pool = <0x400>;
phandle = <0x82>;
};
channel@7 {
compatible = "sprd,seth";
reg = <0x07>;
sprd,router = <0x82>;
sprd,blknum = <0x100>;
phandle = <0x122>;
};
channel@8 {
compatible = "sprd,seth";
reg = <0x08>;
sprd,router = <0x82>;
sprd,blknum = <0x100>;
phandle = <0x123>;
};
channel@9 {
compatible = "sprd,seth";
reg = <0x09>;
sprd,router = <0x82>;
sprd,blknum = <0x100>;
phandle = <0x124>;
};
channel@18 {
compatible = "sprd,seth";
reg = <0x12>;
sprd,router = <0x82>;
sprd,blknum = <0x100>;
phandle = <0x125>;
};
channel@19 {
compatible = "sprd,seth";
reg = <0x13>;
sprd,router = <0x82>;
sprd,blknum = <0x100>;
phandle = <0x126>;
};
channel@20 {
compatible = "sprd,seth";
reg = <0x14>;
sprd,router = <0x82>;
sprd,blknum = <0x100>;
phandle = <0x127>;
};
channel@24 {
compatible = "sprd,seth";
reg = <0x18>;
sprd,router = <0x82>;
sprd,blknum = <0x100>;
phandle = <0x128>;
};
channel@25 {
compatible = "sprd,seth";
reg = <0x19>;
sprd,router = <0x82>;
sprd,blknum = <0x100>;
phandle = <0x129>;
};
channel@26 {
compatible = "sprd,seth";
reg = <0x1a>;
sprd,router = <0x82>;
sprd,blknum = <0x100>;
phandle = <0x12a>;
};
channel@27 {
compatible = "sprd,seth";
reg = <0x1b>;
sprd,router = <0x82>;
sprd,blknum = <0x100>;
phandle = <0x12b>;
};
channel@28 {
compatible = "sprd,seth";
reg = <0x1c>;
sprd,router = <0x82>;
sprd,blknum = <0x100>;
phandle = <0x12c>;
};
channel@29 {
compatible = "sprd,seth";
reg = <0x1d>;
sprd,router = <0x82>;
sprd,blknum = <0x100>;
phandle = <0x12d>;
};
channel@30 {
compatible = "sprd,seth";
reg = <0x1e>;
sprd,router = <0x82>;
sprd,blknum = <0x100>;
phandle = <0x12e>;
};
channel@31 {
compatible = "sprd,seth";
reg = <0x1f>;
sprd,router = <0x82>;
sprd,blknum = <0x100>;
phandle = <0x12f>;
};
};
core@6 {
compatible = "sprd,sipc";
#address-cells = <0x01>;
#size-cells = <0x00>;
reg = <0x06>;
label = "sipc-pmsys";
mboxes = <0x81 0x01 0x00 0x81 0x07 0x01>;
sprd,smem-info = <0xd000 0x2000b000 0x2000>;
phandle = <0x130>;
channel@4 {
compatible = "sprd,spipe";
label = "spipe_pm";
reg = <0x04>;
sprd,ringnr = <0x02>;
sprd,size-rxbuf = <0xb00>;
sprd,size-txbuf = <0x180>;
phandle = <0x131>;
};
channel@5 {
compatible = "sprd,spipe";
label = "slog_pm";
reg = <0x05>;
sprd,ringnr = <0x01>;
sprd,size-rxbuf = <0x500>;
sprd,size-txbuf = <0x00>;
phandle = <0x132>;
};
channel@6 {
compatible = "sprd,spipe";
label = "sctl_pm";
reg = <0x06>;
sprd,ringnr = <0x01>;
sprd,size-rxbuf = <0x40>;
sprd,size-txbuf = <0x20>;
phandle = <0x133>;
};
channel@41 {
compatible = "sprd,spipe";
label = "stime_pm";
reg = <0x29>;
sprd,ringnr = <0x01>;
sprd,size-rxbuf = <0x40>;
sprd,size-txbuf = <0x80>;
phandle = <0x134>;
};
};
sbridge-log {
compatible = "sprd,slog_bridge";
sprd,name = "slog_bridge";
sprd,tx_is_usb = <0x01>;
sprd,tx_dst = <0x00>;
sprd,rx_dst = <0x05>;
sprd,priority = <0x56>;
};
time_sync {
compatible = "sprd,time-sync";
};
};
scene-frequency {
compatible = "sprd,ddr-dvfs";
freq-num = <0x08>;
phandle = <0x135>;
};
ext-26m {
compatible = "fixed-clock";
#clock-cells = <0x00>;
clock-frequency = <0x18cba80>;
clock-output-names = "ext-26m";
phandle = <0x11>;
};
ext-32k {
compatible = "fixed-clock";
#clock-cells = <0x00>;
clock-frequency = <0x8000>;
clock-output-names = "ext-32k";
phandle = <0x3f>;
};
ext-4m {
compatible = "fixed-clock";
#clock-cells = <0x00>;
clock-frequency = "\0=\t";
clock-output-names = "ext-4m";
phandle = <0x80>;
};
rco-100m {
compatible = "fixed-clock";
#clock-cells = <0x00>;
clock-frequency = <0x5f5e100>;
clock-output-names = "rco-100m";
phandle = <0x7f>;
};
aliases {
v2-modem0 = "/modem@0";
v2-modem1 = "/modem@1";
seth0 = "/sipc-virt/core@5/channel@7";
seth1 = "/sipc-virt/core@5/channel@8";
seth2 = "/sipc-virt/core@5/channel@9";
seth3 = "/sipc-virt/core@5/channel@18";
seth4 = "/sipc-virt/core@5/channel@19";
seth5 = "/sipc-virt/core@5/channel@20";
seth6 = "/sipc-virt/core@5/channel@24";
seth7 = "/sipc-virt/core@5/channel@25";
seth8 = "/sipc-virt/core@5/channel@26";
seth9 = "/sipc-virt/core@5/channel@27";
seth10 = "/sipc-virt/core@5/channel@28";
seth11 = "/sipc-virt/core@5/channel@29";
seth12 = "/sipc-virt/core@5/channel@30";
seth13 = "/sipc-virt/core@5/channel@31";
cooling-device0 = "/cooling-devices/cluster0-cooling";
cooling-device1 = "/cooling-devices/cluster1-cooling";
serial0 = "/soc/ap-apb@70000000/serial@0";
serial1 = "/soc/ap-apb@70000000/serial@100000";
spi4 = "/soc/aon/spi@41800000";
i2c0 = "/soc/ap-apb@70000000/i2c@500000";
i2c1 = "/soc/ap-apb@70000000/i2c@600000";
i2c2 = "/soc/ap-apb@70000000/i2c@700000";
i2c3 = "/soc/ap-apb@70000000/i2c@800000";
i2c4 = "/soc/ap-apb@70000000/i2c@900000";
i2c5 = "/soc/ap-apb@70000000/i2c@1500000";
i2c6 = "/soc/ap-apb@70000000/i2c@1600000";
i2c7 = "/soc/aon/i2c@40080000";
mmc0 = "/soc/ap-ahb/sdio@20600000";
mmc1 = "/soc/ap-ahb/sdio@20300000";
};
modem@0 {
compatible = "unisoc,modem";
syscon0 = <0x38 0xff 0x00>;
syscon1 = <0x49 0xff 0x00>;
syscon2 = <0x49 0xb0 0x80>;
syscon3 = <0x38 0xff 0x00>;
syscon4 = <0x38 0xff 0x00>;
syscon-names = "shutdown\0deepsleep\0corereset\0sysreset\0getstatus";
sprd,version = <0x02>;
phandle = <0x136>;
};
modem@1 {
compatible = "unisoc,modem";
sprd,decoup = "cproc-use-decoup";
syscon0 = <0x49 0x48 0x2000000>;
syscon1 = <0x49 0xcc 0x40000>;
syscon2 = <0x38 0x284 0x400>;
syscon3 = <0x49 0xb0 0x02>;
syscon4 = <0x38 0xff 0x00>;
syscon5 = <0x38 0x130 0x30000>;
syscon-names = "shutdown\0deepsleep\0corereset\0sysreset\0getstatus\0dspreset";
sprd,version = <0x02>;
phandle = <0x137>;
};
cp_dump {
compatible = "sprd,cp_dump";
sprd,sys-bus-ctrl-sp = <0x38 0xdc 0x01>;
};
sprd-iq {
compatible = "sprd,iq";
sprd,region = <0x84d80000 0x4000000>;
sprd,mapping-offs = <0x00>;
};
pdbg {
compatible = "sprd,pdbg";
status = "okay";
sprd,pdbg-irq-domain-gic = "GICv3";
sprd,pdbg-irq-domain-gpio = "sprd-gpio-plus";
sprd,pdbg-irq-domain-ana = "spi4.0";
sprd,pdbg-irq-domain-ana-eic = "41800000.spi:pmic@0:gpio-controller@280";
sprd,pdbg-irq-domain-ap-eic-dbnc = "40210000.gpio";
sprd,pdbg-irq-domain-ap-eic-latch = "40210080.gpio";
sprd,pdbg-irq-domain-ap-eic-async = "402100a0.gpio";
sprd,pdbg-irq-domain-ap-eic-sync = "402100c0.gpio";
memory-region = <0x83>;
phandle = <0x138>;
chipset {
sprd,subsys-index = <0x00>;
sprd,subsys-slp-cnt = <0x49 0x2b4 0x00 0xffff>;
sprd,subsys-slp-time = <0x38 0x40 0x00 0xffffffff>;
};
ap {
sprd,subsys-index = <0x01>;
sprd,subsys-slp-cnt = <0x49 0x2ac 0x00 0xffff>;
};
pubcp {
sprd,subsys-index = <0x04>;
sprd,subsys-slp-state = <0x49 0xcc 0x02 0x01>;
};
wcn_btwf {
sprd,subsys-index = <0x06>;
sprd,subsys-slp-state = <0x49 0xcc 0x03 0x01>;
};
wcn_gnss {
sprd,subsys-index = <0x07>;
sprd,subsys-slp-state = <0x49 0xcc 0x03 0x01>;
};
};
sprd-pcm-audio {
compatible = "unisoc,sharkl3-pcm-platform";
#sound-dai-cells = <0x00>;
dmas = <0x84 0x07 0x84 0x08 0x84 0x09 0x84 0x0a 0x84 0x00 0x84 0x00 0x84 0x00 0x84 0x00 0x84 0x03 0x84 0x04>;
dma-names = "da01-l\0da01-r\0da23-l\0da23-r\0normal-2stage-p\0normal-2stage-c\0deep-2stage-p\0ad23-2stage-c\0ad01-l\0ad01-r";
sprd,dma-2stage-usecase = <0x02>;
sprd,node-count-2stage-level-1 = <0x01>;
sprd,syscon-pmu-apb = <0x49>;
sprd,dma-2stage-level-1-int-source = <0x01>;
phandle = <0x9a>;
};
vaudio {
compatible = "unisoc,vaudio";
#sound-dai-cells = <0x01>;
clock-names = "tuned_26m";
clocks = <0x32 0x00>;
phandle = <0x9d>;
};
sprd-pcm-iis {
compatible = "unisoc,sharkl3-pcm-platform";
#sound-dai-cells = <0x00>;
dmas = <0x0e 0x04 0x0e 0x03>;
dma-names = "iis0_tx\0iis0_rx";
sprd,dma-2stage-usecase = <0x02>;
sprd,node-count-2stage-level-1 = <0x01>;
sprd,syscon-pmu-apb = <0x49>;
sprd,dma-2stage-level-1-int-source = <0x01>;
phandle = <0x9e>;
};
saudio_lte {
compatible = "unisoc,saudio";
sprd,saudio-dst-id = <0x05>;
sprd,ctrl_channel = <0x0a>;
sprd,playback_channel = <0x0b 0x83 0x84>;
sprd,capture_channel = <0x0c>;
sprd,monitor_channel = <0x0d>;
sprd,device = <0x03>;
sprd,saudio-names = "saudiolte";
};
saudio_voip {
compatible = "unisoc,saudio";
sprd,saudio-dst-id = <0x05>;
sprd,ctrl_channel = <0x0e>;
sprd,playback_channel = <0x0f 0x97>;
sprd,capture_channel = <0x10>;
sprd,monitor_channel = <0x11>;
sprd,device = <0x02>;
sprd,saudio-names = "saudiovoip";
};
audio-mem-mgr {
compatible = "unisoc,sharkl3-audio-mem";
sprd,iram_phy_addr = <0x2000 0xb000>;
sprd,iram_normal = <0x2000 0x00>;
sprd,iram_deepbuf = <0x2000 0xa000>;
sprd,iram_4arm7 = <0xc000 0x1000>;
};
apipe-pcm {
compatible = "unisoc,apipe";
};
apipe-cmd-in {
compatible = "unisoc,apipe";
};
apipe-cmd-out {
compatible = "unisoc,apipe";
};
sensorhub {
compatible = "sprd,sharkl3-sensorhub\0sprd,sensor-hub";
};
sprd-gsp {
compatible = "sprd,gsp-r6p0-sharkl3";
core-cnt = <0x01>;
io-cnt = <0x07>;
cores = <0x85>;
phandle = <0x87>;
};
display-subsystem {
compatible = "sprd,display-subsystem";
ports = <0x86>;
gsp = <0x87>;
};
apcpu-dvfs {
compatible = "sprd,cpufreq-v2";
phandle = <0x139>;
cpufreq_clus0 {
nvmem-cells = <0x88>;
nvmem-cell-names = "dvfs_bin";
sprd,cpufreq-boost;
sprd,multi-version;
sprd,pmic-type = <0x02>;
sprd,temp-threshold = <0x0a 0x41>;
sprd,transition-delay = <0x1f4>;
sprd,thmzone-names = "cpu-thmzone";
#freq-domain-cells = <0x01>;
phandle = <0x0c>;
};
cpufreq_clus1 {
nvmem-cells = <0x89>;
nvmem-cell-names = "dvfs_bin";
sprd,cpufreq-boost;
sprd,multi-version;
sprd,pmic-type = <0x00>;
sprd,temp-threshold = <0x0a 0x41>;
sprd,transition-delay = <0x1f4>;
sprd,thmzone-names = "cpu-thmzone";
#freq-domain-cells = <0x01>;
phandle = <0x0d>;
};
};
thermal-zones {
phandle = <0x13a>;
gpu-thmzone {
polling-delay-passive = <0x00>;
polling-delay = <0x00>;
thermal-sensors = <0x8a 0x00>;
phandle = <0x13b>;
};
cpu-thmzone {
polling-delay-passive = <0x64>;
polling-delay = <0x3e8>;
sustainable-power = <0xe10>;
thermal-sensors = <0x8b 0x00>;
phandle = <0x13c>;
trips {
trip-point@0 {
temperature = <0x11170>;
hysteresis = <0x3e8>;
type = "passive";
phandle = <0x13d>;
};
trip-point@1 {
temperature = <0x14c08>;
hysteresis = <0x3e8>;
type = "passive";
phandle = <0x8c>;
};
bia_crit {
temperature = <0x1adb0>;
hysteresis = <0x7d0>;
type = "critical";
phandle = <0x13e>;
};
};
cooling-maps {
map0 {
trip = <0x8c>;
contribution = <0x400>;
cooling-device = <0x02 0xffffffff 0xffffffff 0x03 0xffffffff 0xffffffff 0x04 0xffffffff 0xffffffff 0x05 0xffffffff 0xffffffff>;
};
map1 {
trip = <0x8c>;
contribution = <0x300>;
cooling-device = <0x06 0xffffffff 0xffffffff 0x07 0xffffffff 0xffffffff 0x08 0xffffffff 0xffffffff 0x09 0xffffffff 0xffffffff>;
};
map2 {
trip = <0x8c>;
contribution = <0x400>;
cooling-device = <0x8d 0xffffffff 0xffffffff>;
};
map3 {
trip = <0x8c>;
contribution = <0x400>;
cooling-device = <0x8e 0xffffffff 0xffffffff>;
};
};
};
skin-thmzone {
polling-delay-passive = <0x00>;
polling-delay = <0x00>;
phandle = <0x13f>;
};
board-thmzone {
polling-delay-passive = <0x00>;
polling-delay = <0x00>;
thermal-sensors = <0x8f>;
phandle = <0x140>;
};
pa-thmzone {
polling-delay-passive = <0x00>;
polling-delay = <0x00>;
thermal-sensors = <0x90>;
phandle = <0x141>;
};
chg-thmzone {
polling-delay-passive = <0x00>;
polling-delay = <0x00>;
thermal-sensors = <0x91>;
phandle = <0x142>;
};
};
cooling-devices {
cluster0-cooling {
compatible = "sprd,cluster-cooling";
thermal-cluster-cpumask = <0x0f>;
#cooling-cells = <0x02>;
sprd,efuse-block7 = <0x07>;
sprd,efuse-block15 = <0x0f>;
sprd,leak-core = <0x02 0x55 0x74d>;
sprd,leak-cluster = <0x02 0x55 0x9dc>;
sprd,core-temp-scale = <0x1d 0xfffff7cc 0x186a0 0xfff72660>;
sprd,core-voltage-scale = <0xc9 0xffffff57 0x53 0xfffffff0>;
sprd,cluster-temp-scale = <0x1d 0xfffff7cc 0x186a0 0xfff72660>;
sprd,cluster-voltage-scale = <0xc9 0xffffff57 0x53 0xfffffff0>;
sprd,efuse-switch = <0x00>;
sprd,hotplug-period = <0x0a>;
sprd,min-cpufreq = <0xbb800>;
sprd,min-cpunum = <0x04>;
sprd,max-temp = <0x15f90>;
sprd,core-base = <0x960>;
sprd,cluster-base = <0xf82>;
sprd,dynamic-core = <0x3ef 0x3e8 0x3e8>;
sprd,dynamic-cluster = <0x2eb 0x3e8 0x3e8>;
phandle = <0x8d>;
};
cluster1-cooling {
compatible = "sprd,cluster-cooling";
thermal-cluster-cpumask = <0xf0>;
#cooling-cells = <0x02>;
sprd,efuse-block7 = <0x07>;
sprd,efuse-block15 = <0x0f>;
sprd,leak-core = <0x08 0x55 0x7c0>;
sprd,leak-cluster = <0x08 0x55 0x810>;
sprd,core-temp-scale = <0x1d 0xfffff7cc 0x186a0 0xfff72660>;
sprd,core-voltage-scale = <0xc9 0xffffff57 0x53 0xfffffff0>;
sprd,cluster-temp-scale = <0x1d 0xfffff7cc 0x186a0 0xfff72660>;
sprd,cluster-voltage-scale = <0xc9 0xffffff57 0x53 0xfffffff0>;
sprd,efuse-switch = <0x00>;
sprd,hotplug-period = <0x0a>;
sprd,min-cpufreq = <0xbb800>;
sprd,min-cpunum = <0x00>;
sprd,max-temp = <0x14c08>;
sprd,core-base = <0x105e>;
sprd,cluster-base = <0xf82>;
sprd,dynamic-core = <0x600 0x3e8 0x3e8>;
sprd,dynamic-cluster = <0x2eb 0x3e8 0x3e8>;
phandle = <0x8e>;
};
};
trusty {
compatible = "sprd,trusty-smc-v1";
irq {
compatible = "sprd,trusty-irq-v1";
interrupt-templates = <0x01 0x00 0x00 0x00 0x01 0x01 0x01 0x08 0x01 0x01 0x00 0x04>;
interrupt-ranges = <0x00 0x0f 0x00 0x10 0x1f 0x01 0x20 0xdf 0x02>;
};
virtio {
compatible = "sprd,trusty-virtio-v1";
};
log {
compatible = "sprd,trusty-log-v1";
};
sprd-tshm {
compatible = "sprd,tshm";
memory-region = <0x92>;
};
tui {
compatible = "sprd,trusty-tui-v1";
};
};
sprd-headset {
compatible = "unisoc,headset";
status = "okay";
jack-type = <0x00>;
io-channels = <0x3b 0x14>;
io-channel-names = "headmic_in_little";
gpios = <0x47 0x03 0x00 0x47 0x08 0x00 0x47 0x0c 0x00 0x47 0x05 0x00 0x47 0x0d 0x00>;
gpio-trigger-levels = <0x01 0x01 0x01 0x01 0x01>;
gpio-dbnc-intervals = <0x0a 0x64 0x64 0x64 0x64>;
gpio-names = "button\0detect_l\0detect_h\0detect_mic\0detect_all";
extcon = <0x93>;
sprd,typec-lr-gpio-level = <0x01>;
typec_switch-supply = <0x3c>;
sprd,typec_switch-voltage = <0x325aa0>;
typec-adc-threshold-3pole-detect = <0x70>;
adc-threshold-3pole-detect = <0xbee>;
sprd,adc-gnd = <0x150>;
sprd,stable-value = <0x8af>;
sprd,coefficient = <0xe573c>;
irq-threshold-button = <0x09>;
nvmem-cells = <0x94 0x95 0x96>;
nvmem-cell-names = "protectbit\0auxadc\0headmic";
sprd,spk-route-hp;
phandle = <0x97>;
headset-button@0 {
adc-min = <0x00>;
adc-max = <0x1ea>;
code = <0xe2>;
};
headset-button@1 {
adc-min = <0x21c>;
adc-max = <0x3fc>;
code = <0x73>;
};
headset-button@2 {
adc-min = <0x442>;
adc-max = <0x960>;
code = <0x72>;
};
};
sound@0 {
compatible = "unisoc,vbc-r1p0v3-codec-sc2721";
status = "okay";
sprd-audio-card,name = "sprdphone";
sprd-audio-card,routing = "HPMIC Pin\0HP Mic Jack\0MIC Pin\0Mic Jack\0MIC2 Pin\0Aux Mic Jack\0HeadPhone Jack\0HP Pin\0Ext Spk\0HP Pin\0Ext Spk1\0HP Pin\0Ext Spk\0SPK Pin\0Ext Spk1\0SPK Pin\0Ext Ear\0EAR Pin\0Ext Ear\0SPK Pin\0Ext Ear\0HP Pin\0DMIC\0DMic Jack\0DMIC1\0DMic1 Jack\0Aud input\0AD Clk\0Aud1 input\0AD Clk\0Aud input\0Digital ADCL Switch\0Aud input\0Digital ADCR Switch\0Aud1 input\0Digital ADC1L Switch\0Aud1 input\0Digital ADC1R Switch";
sprd-audio-card,headset = <0x97>;
sprd-audio-card,fm-open-src = <0x01>;
sprd-audio-card,fm-hw-rate = <0x7d00>;
sprd-audio-card,codec-replace-adc-rate = <0xbb80>;
si,sia81xx-max-num = <0x01>;
si,sia81xx-aux-devs = <0x98>;
si,sia81xx-aux-devs-prefix = "SpkrLeft";
sprd,spk-ext-pa-info = <0x00 0x00 0x04 0x00 0x02 0x00 0x01 0x01>;
sprd,spk-ext-pa-gpio = <0x99 0x9c 0x00>;
sprd,spk-ext-pa-id-pin = <0x99 0x0b 0x00>;
phandle = <0x143>;
sprd-audio-card,dai-link@0 {
plat {
sound-dai = <0x9a>;
};
cpu {
sound-dai = <0x9b 0x00>;
};
codec {
sound-dai = <0x9c 0x00>;
};
};
sprd-audio-card,dai-link@1 {
plat {
sound-dai = <0x9a>;
};
cpu {
sound-dai = <0x9d 0x00>;
};
codec {
sound-dai = <0x9c 0x00>;
};
};
sprd-audio-card,dai-link@2 {
plat {
sound-dai = <0x9a>;
};
cpu {
sound-dai = <0x9b 0x01>;
};
codec {
sound-dai = <0x9c 0x01>;
};
};
sprd-audio-card,dai-link@3 {
plat {
sound-dai = <0x9a>;
};
cpu {
sound-dai = <0x9d 0x01>;
};
codec {
sound-dai = <0x9c 0x01>;
};
};
sprd-audio-card,dai-link@4 {
ops = <0x00>;
plat {
sound-dai = <0x9a>;
};
cpu {
sound-dai = <0x9b 0x02>;
};
codec {
sound-dai = <0x9c 0x00>;
};
};
sprd-audio-card,dai-link@5 {
plat {
sound-dai = <0x9a>;
};
cpu {
sound-dai = <0x9b 0x03>;
};
codec {
sound-dai = <0x9c 0x00>;
};
};
};
sound@1 {
compatible = "unisoc,i2s-null-codec";
status = "okay";
sprd-audio-card,name = "all-i2s";
phandle = <0x144>;
sprd-audio-card,dai-link@0 {
plat {
sound-dai = <0x9e>;
};
cpu {
sound-dai = <0x9f 0x00>;
};
codec {
sound-dai = <0x00 0x00>;
};
};
};
thermal-sensor {
compatible = "generic-adc-thermal";
#thermal-sensor-cells = <0x00>;
io-channels = <0x3b 0x01>;
io-channel-names = "sensor-channel";
temperature-lookup-table = <0xffff63c0 0x5dd 0xffff67a8 0x5cd 0xffff6b90 0x5bd 0xffff6f78 0x5ac 0xffff7360 0x59b 0xffff7748 0x589 0xffff7b30 0x577 0xffff7f18 0x564 0xffff8300 0x551 0xffff86e8 0x53e 0xffff8ad0 0x52a 0xffff8eb8 0x516 0xffff92a0 0x501 0xffff9688 0x4ec 0xffff9a70 0x4d7 0xffff9e58 0x4c1 0xffffa240 0x4ac 0xffffa628 0x496 0xffffaa10 0x47f 0xffffadf8 0x469 0xffffb1e0 0x453 0xffffb5c8 0x43c 0xffffb9b0 0x426 0xffffbd98 0x40f 0xffffc180 0x3f8 0xffffc568 0x3e2 0xffffc950 0x3cb 0xffffcd38 0x3b5 0xffffd120 0x39e 0xffffd508 0x388 0xffffd8f0 0x372 0xffffdcd8 0x35c 0xffffe0c0 0x347 0xffffe4a8 0x331 0xffffe890 0x31c 0xffffec78 0x307 0xfffff060 0x2f3 0xfffff448 0x2de 0xfffff830 0x2ca 0xfffffc18 0x2b7 0x00 0x2a3 0x3e8 0x290 0x7d0 0x27e 0xbb8 0x26c 0xfa0 0x25a 0x1388 0x248 0x1770 0x237 0x1b58 0x227 0x1f40 0x216 0x2328 0x207 0x2710 0x1f7 0x2af8 0x1e8 0x2ee0 0x1d9 0x32c8 0x1cb 0x36b0 0x1bd 0x3a98 0x1b0 0x3e80 0x1a2 0x4268 0x196 0x4650 0x189 0x4a38 0x17d 0x4e20 0x171 0x5208 0x166 0x55f0 0x15b 0x59d8 0x150 0x5dc0 0x146 0x61a8 0x13c 0x6590 0x132 0x6978 0x129 0x6d60 0x11f 0x7148 0x117 0x7530 0x10e 0x7918 0x106 0x7d00 0xfe 0x80e8 0xf6 0x84d0 0xee 0x88b8 0xe7 0x8ca0 0xe0 0x9088 0xd9 0x9470 0xd3 0x9858 0xcc 0x9c40 0xc6 0xa028 0xc0 0xa410 0xba 0xa7f8 0xb5 0xabe0 0xaf 0xafc8 0xaa 0xb3b0 0xa5 0xb798 0xa0 0xbb80 0x9b 0xbf68 0x97 0xc350 0x92 0xc738 0x8c 0xcb20 0x88 0xcf08 0x84 0xd2f0 0x80 0xd6d8 0x7c 0xdac0 0x79 0xdea8 0x75 0xe290 0x72 0xe678 0x6f 0xea60 0x6b 0xee48 0x68 0xf230 0x65 0xf618 0x62 0xfa00 0x60 0xfde8 0x5d 0x101d0 0x5a 0x105b8 0x58 0x109a0 0x55 0x10d88 0x53 0x11170 0x51 0x11558 0x4f 0x11940 0x4c 0x11d28 0x4a 0x12110 0x48 0x124f8 0x46 0x128e0 0x44 0x12cc8 0x43 0x130b0 0x41 0x13498 0x3f 0x13880 0x3d 0x13c68 0x3c 0x14050 0x3a 0x14438 0x39 0x14820 0x37 0x14c08 0x36 0x14ff0 0x34 0x153d8 0x33 0x157c0 0x31 0x15ba8 0x30 0x15f90 0x2f 0x16378 0x2e 0x16760 0x2d 0x16b48 0x2b 0x16f30 0x2a 0x17318 0x29 0x17700 0x28 0x17ae8 0x27 0x17ed0 0x26 0x182b8 0x25 0x186a0 0x25 0x18a88 0x24 0x18e70 0x23 0x19258 0x22 0x19640 0x21 0x19a28 0x20 0x19e10 0x20 0x1a1f8 0x1f 0x1a5e0 0x1e 0x1a9c8 0x1e 0x1adb0 0x1d 0x1b198 0x1c 0x1b580 0x1c 0x1b968 0x1b 0x1bd50 0x1a 0x1c138 0x1a 0x1c520 0x19 0x1c908 0x19 0x1ccf0 0x18 0x1d0d8 0x18 0x1d4c0 0x17 0x1d8a8 0x17 0x1dc90 0x16 0x1e078 0x16 0x1e460 0x15 0x1e848 0x15>;
phandle = <0x8f>;
};
pa-sensor {
compatible = "generic-adc-thermal";
#thermal-sensor-cells = <0x00>;
io-channels = <0x3b 0x02>;
io-channel-names = "sensor-channel";
temperature-lookup-table = <0xffffd8f0 0x5dd 0xffffd8f0 0x5cd 0xffffd8f0 0x5bd 0xffffd8f0 0x5ac 0x00 0x2a3 0x3e8 0x290 0x7d0 0x27e 0xbb8 0x26c 0xfa0 0x25a 0x1388 0x248 0x1770 0x237 0x1b58 0x227 0x1f40 0x216 0x2328 0x207 0x2710 0x1f7 0x2af8 0x1e8 0x2ee0 0x1d9 0x32c8 0x1cb 0x36b0 0x1bd 0x3a98 0x1b0 0x3e80 0x1a2 0x4268 0x196 0x4650 0x189 0x4a38 0x17d 0x4e20 0x171 0x5208 0x166 0x55f0 0x15b 0x59d8 0x150 0x5dc0 0x15>;
phandle = <0x90>;
};
chg-sensor {
compatible = "generic-adc-thermal";
#thermal-sensor-cells = <0x00>;
io-channels = <0x3b 0x04>;
io-channel-names = "sensor-channel";
temperature-lookup-table = <0xffff63c0 0x5dd 0xffff67a8 0x5cd 0xffff6b90 0x5bd 0xffff6f78 0x5ac 0xffff7360 0x59b 0xffff7748 0x589 0xffff7b30 0x577 0xffff7f18 0x564 0xffff8300 0x551 0xffff86e8 0x53e 0xffff8ad0 0x52a 0xffff8eb8 0x516 0xffff92a0 0x501 0xffff9688 0x4ec 0xffff9a70 0x4d7 0xffff9e58 0x4c1 0xffffa240 0x4ac 0xffffa628 0x496 0xffffaa10 0x47f 0xffffadf8 0x469 0xffffb1e0 0x453 0xffffb5c8 0x43c 0xffffb9b0 0x426 0xffffbd98 0x40f 0xffffc180 0x3f8 0xffffc568 0x3e2 0xffffc950 0x3cb 0xffffcd38 0x3b5 0xffffd120 0x39e 0xffffd508 0x388 0xffffd8f0 0x372 0xffffdcd8 0x35c 0xffffe0c0 0x347 0xffffe4a8 0x331 0xffffe890 0x31c 0xffffec78 0x307 0xfffff060 0x2f3 0xfffff448 0x2de 0xfffff830 0x2ca 0xfffffc18 0x2b7 0x00 0x2a3 0x3e8 0x290 0x7d0 0x27e 0xbb8 0x26c 0xfa0 0x25a 0x1388 0x248 0x1770 0x237 0x1b58 0x227 0x1f40 0x216 0x2328 0x207 0x2710 0x1f7 0x2af8 0x1e8 0x2ee0 0x1d9 0x32c8 0x1cb 0x36b0 0x1bd 0x3a98 0x1b0 0x3e80 0x1a2 0x4268 0x196 0x4650 0x189 0x4a38 0x17d 0x4e20 0x171 0x5208 0x166 0x55f0 0x15b 0x59d8 0x150 0x5dc0 0x146 0x61a8 0x13c 0x6590 0x132 0x6978 0x129 0x6d60 0x11f 0x7148 0x117 0x7530 0x10e 0x7918 0x106 0x7d00 0xfe 0x80e8 0xf6 0x84d0 0xee 0x88b8 0xe7 0x8ca0 0xe0 0x9088 0xd9 0x9470 0xd3 0x9858 0xcc 0x9c40 0xc6 0xa028 0xc0 0xa410 0xba 0xa7f8 0xb5 0xabe0 0xaf 0xafc8 0xaa 0xb3b0 0xa5 0xb798 0xa0 0xbb80 0x9b 0xbf68 0x97 0xc350 0x92 0xc738 0x8c 0xcb20 0x88 0xcf08 0x84 0xd2f0 0x80 0xd6d8 0x7c 0xdac0 0x79 0xdea8 0x75 0xe290 0x72 0xe678 0x6f 0xea60 0x6b 0xee48 0x68 0xf230 0x65 0xf618 0x62 0xfa00 0x60 0xfde8 0x5d 0x101d0 0x5a 0x105b8 0x58 0x109a0 0x55 0x10d88 0x53 0x11170 0x51 0x11558 0x4f 0x11940 0x4c 0x11d28 0x4a 0x12110 0x48 0x124f8 0x46 0x128e0 0x44 0x12cc8 0x43 0x130b0 0x41 0x13498 0x3f 0x13880 0x3d 0x13c68 0x3c 0x14050 0x3a 0x14438 0x39 0x14820 0x37 0x14c08 0x36 0x14ff0 0x34 0x153d8 0x33 0x157c0 0x31 0x15ba8 0x30 0x15f90 0x2f 0x16378 0x2e 0x16760 0x2d 0x16b48 0x2b 0x16f30 0x2a 0x17318 0x29 0x17700 0x28 0x17ae8 0x27 0x17ed0 0x26 0x182b8 0x25 0x186a0 0x25 0x18a88 0x24 0x18e70 0x23 0x19258 0x22 0x19640 0x21 0x19a28 0x20 0x19e10 0x20 0x1a1f8 0x1f 0x1a5e0 0x1e 0x1a9c8 0x1e 0x1adb0 0x1d 0x1b198 0x1c 0x1b580 0x1c 0x1b968 0x1b 0x1bd50 0x1a 0x1c138 0x1a 0x1c520 0x19 0x1c908 0x19 0x1ccf0 0x18 0x1d0d8 0x18 0x1d4c0 0x17 0x1d8a8 0x17 0x1dc90 0x16 0x1e078 0x16 0x1e460 0x15 0x1e848 0x15>;
phandle = <0x91>;
};
sia81xx@L {
compatible = "si,sia81xx";
si,si_pa_type = "sia8100x";
si,si_pa_reset = <0x99 0x9c 0x00>;
si,si_pa_owi = <0x99 0x9c 0x00>;
si,si_pa_id = <0x99 0x0b 0x00>;
si,si_pa_disable_pin = <0x00>;
en_dynamic_id = <0x01>;
channel_num = <0x00>;
phandle = <0x98>;
};
memory@80000000 {
device_type = "memory";
reg = <0x00 0x80000000 0x00 0x80000000>;
};
chosen {
stdout-path = "serial1:921600n8";
bootargs = "earlycon console=ttyS1,921600n8 loop.max_part=7\n loglevel=1 log_buf_len=2M init=/init root=/dev/ram0 rw printk.devkmsg=on\n firmware_class.path=/odm/firmware,/vendor/firmware\n dummy_hcd.num=0 swiotlb=1 initcall_debug=1 kpti=0\n rcupdate.rcu_expedited=1 rcu_nocbs=0-7";
phandle = <0x145>;
};
extcon-gpio {
compatible = "linux,extcon-usb-gpio";
vbus-gpio = <0x47 0x00 0x00>;
phandle = <0x37>;
};
firmware {
android {
compatible = "android,firmware";
vbmeta {
compatible = "android,vbmeta";
parts = "vbmeta,boot,init_boot,vendor_boot,dtbo,l_modem,pm_sys,l_ldsp,l_gdsp";
};
};
};
autotest {
compatible = "sprd,autotest";
sprd,pinctrl = <0xa0>;
phandle = <0x146>;
};
dmabuf {
compatible = "sprd,dmabuf";
phandle = <0x147>;
};
rebootescrow@0 {
compatible = "pmem-region";
reg = <0x00 0xfff70000 0x00 0x10000>;
};
sprd-map-user {
compatible = "unisoc,map-user";
};
__symbols__ {
bat = "/battery";
bat0 = "/battery0";
bat1_0 = "/battery1_0";
bat1_1 = "/battery1_1";
bat1_2 = "/battery1_2";
bat1_3 = "/battery1_3";
bat2_0 = "/battery2_0";
bat2_1 = "/battery2_1";
bat2_2 = "/battery2_2";
bat2_3 = "/battery2_3";
cm = "/charger-manager";
reserved_memory = "/reserved-memory";
ddrbist_reserved = "/reserved-memory/ddrbist-mem@0x80000000";
sysdump_reserved = "/reserved-memory/sysdumpinfo-mem@80001000";
pdbg_reserved = "/reserved-memory/pdbg-mem@0x80002000";
cp_reserved = "/reserved-memory/cp-mem@89600000";
smem_reserved = "/reserved-memory/sipc-mem@8e000000";
iq_reserved = "/reserved-memory/iq-mem@90000000";
uboot_log_reserved = "/reserved-memory/uboot_log-mem";
logo_reserved = "/reserved-memory/logobuffer@9e000000";
uboot_reserved = "/reserved-memory/sysdump-uboot@9f000000";
sml_reserved = "/reserved-memory/sml-mem@b0000000";
tos_reserved = "/reserved-memory/tos-mem@b0040000";
tos_shm_reserved = "/reserved-memory/sh-mem@b6000000";
pstore_reserved = "/reserved-memory/ramoops@fff80000";
wcn_reserved = "/reserved-memory/wcn-mem@84000000";
gnss_reserved = "/reserved-memory/gnss-mem@84300000";
sp_ddr_reserved = "/reserved-memory/sp-ddr-mem@89400000";
CPU0 = "/cpus/cpu@0";
CPU1 = "/cpus/cpu@100";
CPU2 = "/cpus/cpu@200";
CPU3 = "/cpus/cpu@300";
CPU4 = "/cpus/cpu@400";
CPU5 = "/cpus/cpu@500";
CPU6 = "/cpus/cpu@600";
CPU7 = "/cpus/cpu@700";
CORE_PD = "/idle-states/core-pd";
APSYS_PD = "/idle-states/apsys_pd";
soc = "/soc";
apapb = "/soc/ap-apb@70000000";
i2c0 = "/soc/ap-apb@70000000/i2c@500000";
i2c1 = "/soc/ap-apb@70000000/i2c@600000";
i2c2 = "/soc/ap-apb@70000000/i2c@700000";
i2c3 = "/soc/ap-apb@70000000/i2c@800000";
i2c4 = "/soc/ap-apb@70000000/i2c@900000";
i2c5 = "/soc/ap-apb@70000000/i2c@1500000";
i2c6 = "/soc/ap-apb@70000000/i2c@1600000";
i2s0 = "/soc/ap-apb@70000000/i2s@d00000";
spi0 = "/soc/ap-apb@70000000/spi@a00000";
spi1 = "/soc/ap-apb@70000000/spi@b00000";
spi2 = "/soc/ap-apb@70000000/spi@c00000";
spi3 = "/soc/ap-apb@70000000/spi@1400000";
uart0 = "/soc/ap-apb@70000000/serial@0";
uart1 = "/soc/ap-apb@70000000/serial@100000";
uart2 = "/soc/ap-apb@70000000/serial@200000";
uart3 = "/soc/ap-apb@70000000/serial@300000";
uart4 = "/soc/ap-apb@70000000/serial@400000";
gic = "/soc/interrupt-controller@14000000";
funnel_soc_out_port = "/soc/funnel@10001000/out-ports/port/endpoint";
funnel_soc_in_port = "/soc/funnel@10001000/in-ports/port/endpoint";
etb_in = "/soc/etb@10003000/in-ports/port/endpoint";
funnel_little_out_port = "/soc/funnel@12001000/out-ports/port/endpoint";
funnel_little_in_port0 = "/soc/funnel@12001000/in-ports/port@0/endpoint";
funnel_little_in_port1 = "/soc/funnel@12001000/in-ports/port@1/endpoint";
funnel_little_in_port2 = "/soc/funnel@12001000/in-ports/port@2/endpoint";
funnel_little_in_port3 = "/soc/funnel@12001000/in-ports/port@3/endpoint";
etf_little_out = "/soc/etf@12002000/out-ports/port/endpoint";
etf_little_in = "/soc/etf@12002000/in-port/port/endpoint";
etf_big_out = "/soc/etf@12003000/out-ports/port/endpoint";
etf_big_in = "/soc/etf@12003000/in-ports/port/endpoint";
funnel_ca55_out_port = "/soc/funnel@12004000/out-ports/port/endpoint";
funnel_ca55_in_port0 = "/soc/funnel@12004000/in-ports/port@0/endpoint";
funnel_ca55_in_port1 = "/soc/funnel@12004000/in-ports/port@1/endpoint";
funnel_big_out_port = "/soc/funnel@12005000/out-ports/port/endpoint";
funnel_big_in_port0 = "/soc/funnel@12005000/in-ports/port@0/endpoint";
funnel_big_in_port1 = "/soc/funnel@12005000/in-ports/port@1/endpoint";
funnel_big_in_port2 = "/soc/funnel@12005000/in-ports/port@2/endpoint";
funnel_big_in_port3 = "/soc/funnel@12005000/in-ports/port@3/endpoint";
etm0_out = "/soc/etm@13040000/out-ports/port/endpoint";
etm1_out = "/soc/etm@13140000/out-ports/port/endpoint";
etm2_out = "/soc/etm@13240000/out-ports/port/endpoint";
etm3_out = "/soc/etm@13340000/out-ports/port/endpoint";
etm4_out = "/soc/etm@13440000/out-ports/port/endpoint";
etm5_out = "/soc/etm@13540000/out-ports/port/endpoint";
etm6_out = "/soc/etm@13640000/out-ports/port/endpoint";
etm7_out = "/soc/etm@13740000/out-ports/port/endpoint";
apahb = "/soc/ap-ahb";
sdio0 = "/soc/ap-ahb/sdio@20300000";
sdio3 = "/soc/ap-ahb/sdio@20600000";
ap_dma = "/soc/ap-ahb/dma-controller@20100000";
usb = "/soc/ap-ahb/usb@20200000";
hsphy = "/soc/ap-ahb/hsphy@20e00000";
pub = "/soc/pub";
dmc_controller = "/soc/pub/dmc-controller@300001a8";
dmc_mpu = "/soc/pub/dmc-mpu@300e0000";
ptm_trace = "/soc/pub/ptm@30010000";
aon = "/soc/aon";
aon_systimer = "/soc/aon/timer@40230000";
aon_sysfrt = "/soc/aon/timer@40040000";
adi_bus = "/soc/aon/spi@41800000";
sc2721_pmic = "/soc/aon/spi@41800000/pmic@0";
pmic_wdt = "/soc/aon/spi@41800000/pmic@0/watchdog@40";
pmic_eic = "/soc/aon/spi@41800000/pmic@0/gpio-controller@280";
pmic_flash = "/soc/aon/spi@41800000/pmic@0/flash@2a8";
pmic_typec = "/soc/aon/spi@41800000/pmic@0/typec@380";
pmic_adc = "/soc/aon/spi@41800000/pmic@0/adc@400";
pmic_fgu = "/soc/aon/spi@41800000/pmic@0/fgu@a00";
pmic_smpl = "/soc/aon/spi@41800000/pmic@0/smpl@c00";
sprd_audio_codec_ana = "/soc/aon/spi@41800000/pmic@0/audio-codec@700";
fgu_calib = "/soc/aon/spi@41800000/pmic@0/efuse@300/calib@6";
adc_bcal = "/soc/aon/spi@41800000/pmic@0/efuse@300/calib@24";
adc_scal = "/soc/aon/spi@41800000/pmic@0/efuse@300/calib@26";
typec_cc1_cal = "/soc/aon/spi@41800000/pmic@0/efuse@300/calib@d1";
typec_cc2_cal = "/soc/aon/spi@41800000/pmic@0/efuse@300/calib@d2";
efuse_blk0 = "/soc/aon/spi@41800000/pmic@0/efuse@300/calib@0";
efuse_blk14 = "/soc/aon/spi@41800000/pmic@0/efuse@300/calib@28";
efuse_blk16 = "/soc/aon/spi@41800000/pmic@0/efuse@300/calib@2c";
vddcpu = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/DCDC_CPU";
vddcore = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/DCDC_CORE";
vddmem = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/DCDC_MEM";
vddgen = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/DCDC_GEN";
vddcama = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDCAMA";
vddcammot = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDCAMMOT";
vddsim2 = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDSIM2";
vddemmccore = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDEMMCCORE";
vddsdcore = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDSDCORE";
vddsdio = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDSDIO";
vdd28 = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDD28";
vddwifipa = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDWIFIPA";
vdddcxo = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDDCXO";
vddusb33 = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDUSB33";
vddcamd = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDCAMD";
vddcon = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDCON";
vddcamio = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDCAMIO";
vdd18 = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDD18";
vddrf18 = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDRF18";
vddrf125 = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDRF125";
vddldomem = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDLDOMEM";
vddkpled = "/soc/aon/spi@41800000/pmic@0/power-controller@c00/LDO_VDDKPLED";
hwlock = "/soc/aon/hwspinlock@40060000";
mailbox = "/soc/aon/mailbox@400a0000";
djtag = "/soc/aon/djtag@40340000";
aon_dma = "/soc/aon/dma-controller@40100000";
eic_debounce = "/soc/aon/gpio@40210000";
eic_latch = "/soc/aon/gpio@40210080";
eic_async = "/soc/aon/gpio@402100a0";
eic_sync = "/soc/aon/gpio@402100c0";
ap_gpio = "/soc/aon/gpio@402c0000";
i2c7 = "/soc/aon/i2c@40080000";
pwms = "/soc/aon/pwm@40260000";
pin_controller = "/soc/aon/pinctrl@402a0000";
vbc_iis1_0 = "/soc/aon/pinctrl@402a0000/iismtx-inf0-8";
ap_iis0_0 = "/soc/aon/pinctrl@402a0000/iismtx-inf0-0";
ap_iis1_0 = "/soc/aon/pinctrl@402a0000/iismtx-inf0-1";
tgdsp_iis0_0 = "/soc/aon/pinctrl@402a0000/iismtx-inf0-4";
tgdsp_iis1_0 = "/soc/aon/pinctrl@402a0000/iismtx-inf0-5";
pubcp_iis0_0 = "/soc/aon/pinctrl@402a0000/iismtx-inf0-3";
vbc_iis1_3 = "/soc/aon/pinctrl@402a0000/iismtx-inf3-8";
ap_iis0_3 = "/soc/aon/pinctrl@402a0000/iismtx-inf3-0";
tgdsp_iis0_3 = "/soc/aon/pinctrl@402a0000/iismtx-inf3-4";
tgdsp_iis1_3 = "/soc/aon/pinctrl@402a0000/iismtx-inf3-5";
pubcp_iis0_3 = "/soc/aon/pinctrl@402a0000/iismtx-inf3-3";
wcn_iis0_3 = "/soc/aon/pinctrl@402a0000/iismtx-inf3-11";
vbc_iis1_4 = "/soc/aon/pinctrl@402a0000/iismtx-inf4-8";
ap_iis0_4 = "/soc/aon/pinctrl@402a0000/iismtx-inf4-0";
tgdsp_iis0_4 = "/soc/aon/pinctrl@402a0000/iismtx-inf4-4";
tgdsp_iis1_4 = "/soc/aon/pinctrl@402a0000/iismtx-inf4-5";
pubcp_iis0_4 = "/soc/aon/pinctrl@402a0000/iismtx-inf4-3";
wcn_iis0_4 = "/soc/aon/pinctrl@402a0000/iismtx-inf4-11";
iis_loop_3_4_enable = "/soc/aon/pinctrl@402a0000/iismtx-inf3-inf4-loop-1";
iis_loop_3_4_disable = "/soc/aon/pinctrl@402a0000/iismtx-inf3-inf4-loop-0";
vbc = "/soc/aon/vbc@40020000";
sprd_audio_codec_dig = "/soc/aon/audio-codec@40000000";
ap_efuse = "/soc/aon/efuse@40240000";
uid_start = "/soc/aon/efuse@40240000/uid-start@ec";
uid_end = "/soc/aon/efuse@40240000/uid-end@e8";
dvfs_bin_cpu0 = "/soc/aon/efuse@40240000/dvfs-bin-cpu0@9";
dvfs_bin_cpu1 = "/soc/aon/efuse@40240000/dvfs-bin-cpu1@9";
gpu_bin = "/soc/aon/efuse@40240000/gpu-bin@b";
wcn_alpha = "/soc/aon/efuse@40240000/wcn-alpha@14";
wcn_beta = "/soc/aon/efuse@40240000/wcn-beta@18";
wcn_gamma = "/soc/aon/efuse@40240000/wcn-gamma@1c";
wcn_delta = "/soc/aon/efuse@40240000/wcn-delta@20";
gthm_delta = "/soc/aon/efuse@40240000/gthm-delta@21";
cthm_sign = "/soc/aon/efuse@40240000/cthm-sign@22";
cthm_ratio = "/soc/aon/efuse@40240000/cthm-ratio@22";
cthm_delta = "/soc/aon/efuse@40240000/cthm-delta@23";
gpu_thm = "/soc/aon/gpu-thm@402f0000";
cpu_thm = "/soc/aon/cpu-thm@40390000";
modem_dbg_log = "/soc/aon/modem-dbg-log@1000c000";
mm = "/soc/mm";
iommu_dcam = "/soc/mm/iommu@60a0c000";
iommu_isp = "/soc/mm/iommu@60bffc00";
iommu_vsp = "/soc/mm/iommu@62200000";
iommu_jpg = "/soc/mm/iommu@62300300";
iommu_cpp = "/soc/mm/iommu@62400200";
iommu_dispc = "/soc/mm/iommu@63000000";
mm_domain = "/soc/mm/campower-domain";
isp = "/soc/mm/isp@60b00000";
cpp = "/soc/mm/cpp@62400000";
dcam = "/soc/mm/dcam@60a00000";
mipi_csi_phy0 = "/soc/mm/mipi-csi-phy0";
mipi_csi_phy1 = "/soc/mm/mipi-csi-phy1";
mipi_csi_phy2 = "/soc/mm/mipi-csi-phy2";
mipi_csi_phy0_m = "/soc/mm/mipi-csi-phy0-s";
mipi_csi_phy0_s = "/soc/mm/mipi-csi-phy0-m";
mipi_csi_phy0_s1 = "/soc/mm/mipi-csi-phy0-m1";
csi0 = "/soc/mm/csi@60c00000";
csi1 = "/soc/mm/csi@60d00000";
csi2 = "/soc/mm/csi@60e00000";
gpu = "/soc/mm/gpu@60000000";
dpu = "/soc/mm/dpu@63000000";
dpu_port = "/soc/mm/dpu@63000000/port";
dpu_out = "/soc/mm/dpu@63000000/port/endpoint";
dsi = "/soc/mm/dsi@63100000";
dsi_out = "/soc/mm/dsi@63100000/ports/port@0/endpoint";
dsi_in = "/soc/mm/dsi@63100000/ports/port@1/endpoint";
panel = "/soc/mm/dsi@63100000/panel";
panel_in = "/soc/mm/dsi@63100000/panel/port@1/endpoint";
dphy = "/soc/mm/dphy";
dphy_out = "/soc/mm/dphy/ports/port@0/endpoint";
dphy_in = "/soc/mm/dphy/ports/port@1/endpoint";
gsp_core0 = "/soc/mm/gsp@63000000";
vsp = "/soc/mm/video-codec@62200000";
jpg = "/soc/mm/jpeg-codec@62300000";
pmu_apb_regs = "/soc/syscon@402b0000";
pmu_gate = "/soc/syscon@402b0000/pmu-gate";
disp_pd = "/soc/power-domain@402b0058";
anlg_phy_g1_regs = "/soc/syscon@40350000";
anlg_phy_g2_regs = "/soc/syscon@40353000";
pll = "/soc/syscon@40353000/pll";
anlg_phy_g4_regs = "/soc/syscon@40359000";
mpll = "/soc/syscon@40359000/mpll";
anlg_phy_g5_regs = "/soc/syscon@4035c000";
rpll = "/soc/syscon@4035c000/rpll";
anlg_phy_g7_regs = "/soc/syscon@40363000";
dpll = "/soc/syscon@40363000/dpll";
anlg_wrap_wcn_regs = "/soc/syscon@40366000";
aon_apb_regs = "/soc/syscon@402e0000";
aonapb_gate = "/soc/syscon@402e0000/aonapb-gate";
ap_ahb_regs = "/soc/syscon@20e00000";
apahb_gate = "/soc/syscon@20e00000/apahb-gate";
pub_apb_regs = "/soc/syscon@300e0000";
pub_wrap_regs = "/soc/syscon@300f0000";
wcn_regs = "/soc/syscon@403a0000";
ap_intc0_regs = "/soc/syscon@40500000";
ap_intc1_regs = "/soc/syscon@40510000";
ap_intc2_regs = "/soc/syscon@40520000";
ap_intc3_regs = "/soc/syscon@40530000";
ap_intc4_regs = "/soc/syscon@40540000";
ap_intc5_regs = "/soc/syscon@40550000";
mm_ahb_regs = "/soc/syscon@60800000";
mm_gate = "/soc/syscon@60800000/mm-gate";
mm_vsp_ahb_regs = "/soc/syscon@62000000";
vspahb_gate = "/soc/syscon@62000000/vspahb-gate";
ap_apb_regs = "/soc/syscon@71300000";
apapb_gate = "/soc/syscon@71300000/apapb-gate";
ap_clk = "/soc/clock-controller@21500000";
aon_clk = "/soc/clock-controller@402d0000";
mm_clk = "/soc/clock-controller@60900000";
vsp_pd = "/soc/vsp-power-domain";
sipc = "/sipc-virt";
sipc_lte = "/sipc-virt/core@5";
imsbr_data = "/sipc-virt/core@5/channel@2";
imsbr_ctrl = "/sipc-virt/core@5/channel@3";
spipe_lte = "/sipc-virt/core@5/channel@4";
stty_lte = "/sipc-virt/core@5/channel@6";
sdiag_lte = "/sipc-virt/core@5/channel@21";
slog_lte = "/sipc-virt/core@5/channel@5";
sipx = "/sipc-virt/core@5/route@0";
seth_ch7 = "/sipc-virt/core@5/channel@7";
seth_ch8 = "/sipc-virt/core@5/channel@8";
seth_ch9 = "/sipc-virt/core@5/channel@9";
seth_ch18 = "/sipc-virt/core@5/channel@18";
seth_ch19 = "/sipc-virt/core@5/channel@19";
seth_ch20 = "/sipc-virt/core@5/channel@20";
seth_ch24 = "/sipc-virt/core@5/channel@24";
seth_ch25 = "/sipc-virt/core@5/channel@25";
seth_ch26 = "/sipc-virt/core@5/channel@26";
seth_ch27 = "/sipc-virt/core@5/channel@27";
seth_ch28 = "/sipc-virt/core@5/channel@28";
seth_ch29 = "/sipc-virt/core@5/channel@29";
seth_ch30 = "/sipc-virt/core@5/channel@30";
seth_ch31 = "/sipc-virt/core@5/channel@31";
sipc_sp = "/sipc-virt/core@6";
spipe_pm = "/sipc-virt/core@6/channel@4";
slog_pm = "/sipc-virt/core@6/channel@5";
sctl_pm = "/sipc-virt/core@6/channel@6";
stime_pm = "/sipc-virt/core@6/channel@41";
ddr_dfs = "/scene-frequency";
ext_26m = "/ext-26m";
ext_32k = "/ext-32k";
ext_4m = "/ext-4m";
rco_100m = "/rco-100m";
pmsys = "/modem@0";
modem = "/modem@1";
power_debug = "/pdbg";
sprd_pcm = "/sprd-pcm-audio";
vaudio = "/vaudio";
sprd_pcm_iis = "/sprd-pcm-iis";
gsp = "/sprd-gsp";
apcpu_dvfs = "/apcpu-dvfs";
cpufreq_clus0 = "/apcpu-dvfs/cpufreq_clus0";
cpufreq_clus1 = "/apcpu-dvfs/cpufreq_clus1";
thm_zone = "/thermal-zones";
gpu_thmzone = "/thermal-zones/gpu-thmzone";
cpu_thmzone = "/thermal-zones/cpu-thmzone";
cpu_threshold = "/thermal-zones/cpu-thmzone/trips/trip-point@0";
cpu_target = "/thermal-zones/cpu-thmzone/trips/trip-point@1";
cpu_crit = "/thermal-zones/cpu-thmzone/trips/bia_crit";
skin_thmzone = "/thermal-zones/skin-thmzone";
bd_thmzone = "/thermal-zones/board-thmzone";
pa_thmzone = "/thermal-zones/pa-thmzone";
chg_thmzone = "/thermal-zones/chg-thmzone";
cluster0_cooling = "/cooling-devices/cluster0-cooling";
cluster1_cooling = "/cooling-devices/cluster1-cooling";
sprd_headset = "/sprd-headset";
sound_vbc_r1p0v3_sprd_codec = "/sound@0";
sound_sprd_ap_alliis = "/sound@1";
tboard_thermistor = "/thermal-sensor";
pa_thermistor = "/pa-sensor";
chg_thermistor = "/chg-sensor";
sia81xx_L = "/sia81xx@L";
chosen = "/chosen";
extcon_gpio = "/extcon-gpio";
autotest = "/autotest";
dmabuf = "/dmabuf";
};
};
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