gistfile1.txt

-- VHDL

-- arbit3.vhd
-- Asynkron 3-ing. Arbitrerare
-- Fredrik Brosser 2011-03-02

library IEEE;
use IEEE.std_logic_1164.all;

Entity arbit is
  port( r     : in std_logic_vector(2 downto 0);
        g     : out std_logic_vector(2 downto 0)
  );
End Entity;

Architecture arbit_bhv of arbit is
type state_type is (idle, gnt2, gnt1, gnt0);
signal state : state_type;
begin
  
  -- Kombinatorisk process
  comb : process (state, r) 
  begin
    
    -- Default
    g <= "000";
    
    -- Idle state
    case state is
      when idle =>
        if r(2) = '1' then
          state <= gnt2;
        elsif r(1) = '1' then
          state <= gnt1;
        elsif r(0) = '1' then
          state <= gnt0;
        else 
          state <= idle;
        end if;
        
    -- Gnt2
    when gnt2 =>
      g(2) <= '1';
      if r(2) = '1' then
        state <= gnt2;
      else 
        state <= idle;
      end if;
      
    -- Gnt1
    when gnt1 =>
      g(1) <= '1';
      if r(1) = '1' then
        state <= gnt1;
      else 
        state <= idle;
      end if;
      
    -- Gnt0
    when gnt0 =>
      g(0) <= '1';
      if r(0) = '1' then
        state <= gnt0;
      else 
        state <= idle;
      end if;
      
    end case;
    
  end process;
  
end Architecture;




-- DO

# arbit3.do
restart -f -nowave
view signals wave
add wave g r state

force r 000
run 50 ns

force r 001
run 50 ns 

force r 000
run 50 ns 

force r 010
run 50 ns 

force r 110
run 50 ns 

force r 010
run 50 ns 

force r 000
run 50 ns 

force r 100
run 50 ns 

force r 110
run 50 ns

force r 111
run 50 ns  

force r 011
run 50 ns 

force r 001
run 50 ns 

force r 101
run 50 ns 

force r 001
run 50 ns 

force r 000
run 150 ns 

Kombinatorisk process?

Haha, klassiker alltså, men kör en s/arbitrerare/albitrerare