fbrosser

-- VHDL

-- arbit3.vhd
-- Asynkron 3-ing. Arbitrerare
-- Fredrik Brosser 2011-03-02

library IEEE;
use IEEE.std_logic_1164.all;

Entity arbit is

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# flank.do
restart -f -nowave
view signals wave
add wave x y u q1 q2 reset

force reset 1
force x 0
force y 0
run 400 ns
force reset 0

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restart -f

force clk 0 0, 1 50 -repeat 100
force reset 1 0, 0 100

force t 1 55, 0 115 -repeat 200
run 1000

fbrosser

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.mypackage.all;

entity ftr is
  port (
    clk, reset, t : in  std_logic;
    q             : out std_logic
    ) ;

fbrosser

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.mypackage.all;

entity ftr is
  port (
    clk, reset, t : in  std_logic;
    q             : out std_logic
    ) ;