lab4 template

lab4

.include "m8Adef.inc" ;

; = Macro ========================================
	.MACRO Reset
	RAM_Flush:	
		LDI	ZL,Low(SRAM_START)
		LDI	ZH,High(SRAM_START)
		CLR	R16
	Flush:		
		ST 	Z+, R16
		CPI	ZH, High(RAMEND)
		BRNE	Flush			
 
		CPI	ZL, Low(RAMEND)	
		BRNE	Flush

		CLR	ZL
		CLR	ZH

		CLR	R0
		CLR	R1
		CLR	R2
		CLR	R3
		CLR	R4
		CLR	R5
		CLR	R6
		CLR	R7
		CLR	R8
		CLR	R9
		CLR	R10
		CLR	R11
		CLR	R12
		CLR	R13
		CLR	R14
		CLR	R15
		CLR	R16
		CLR	R17
		CLR	R18
		CLR	R19
		CLR	R20
		CLR	R21
		CLR	R22
		CLR	R23
		CLR	R24
		CLR	R25
		CLR	R26
		CLR	R27
		CLR	R28
		CLR	R29

		LDI R16,Low(RAMEND)
		OUT SPL,R16
 
		LDI R16,High(RAMEND)
		OUT SPH,R16
	.ENDM	

	.MACRO outi
		ldi r16, @1
		out @0, r16
	.ENDM

; FLASH ===================================================

.DSEG
 		%VAR_NAME%: .byte 1 

.CSEG
		RJMP Start
		.ORG 0x0001	; External Interrupt Request 0
		RETI
		.ORG 0x0002	; External Interrupt Request 1
		RETI
		.ORG 0x0003	; Timer/Counter2 Compare Match
		RETI
		.ORG 0x0004	; Timer/Counter2 Overflow
		RETI
		.ORG 0x0005	; Timer/Counter1 Capture Event
		RETI
		.ORG 0x0006	; Timer/Counter1 Compare Match A
		RETI
		.ORG 0x0007	; Timer/Counter1 Compare Match B
		RETI
		.ORG 0x0008	; Timer/Counter1 Overflow
		RETI
		.ORG 0x0009	; Timer/Counter0 Overflow
		RJMP %INT_NAME%
		.ORG 0x000a	; Serial Transfer Complete
		RETI
		.ORG 0x000b	; USART, Rx Complete
		RETI
		.ORG 0x000c	; USART Data Register Empty
		RETI
		.ORG 0x000d	; USART, Tx Complete
		RETI
		.ORG 0x000e	; ADC Conversion Complete
		RJMP %INT_NAME%
		.ORG 0x000f	; EEPROM Ready
		RETI
		.ORG 0x0010	; Analog Comparator
		RETI
		.ORG 0x0011	; 2-wire Serial Interface
		RETI
		.ORG 0x0012	; Store Program Memory Ready
		RETI
		.ORG	INT_VECTORS_SIZE	; size in words


Start:  
	Reset

	ldi r16, low(RAMEND)
	out SPL, r16
	ldi r16, high(RAMEND)
	out SPH, r16

	; init out to PORTB
	ldi r16, 0b10000000
	out DDRD, r16	

	;init timer0
	ldi r16, (1<<CS01)|(1<<CS00)
	out TCCR0,r16
	ldi r16, (1<<TOIE0)
	out TIMSK, r16

	;init ADC
	outi ADCSRA, (1<<ADEN)|(1<<ADIE)|(1<<ADSC)|(1<<ADFR)|(3<<ADPS0)
	outi ADMUX, (1<<REFS0)|(1<<ADLAR)	

	;init sleep mode
	outi MCUCR, (1<<SE)

	clr r16		
	
	sei	

LOOP:
	sleep
	rjmp LOOP