Created
December 1, 2014 16:36
-
-
Save gshrikant/d27e627f21d12eccda2b to your computer and use it in GitHub Desktop.
VHDL Course
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
-- hw.vhd | |
-- Hello World in VHDL | |
-- Switch an LED in response to a button | |
library IEEE; | |
use IEEE.STD_LOGIC_1164.ALL; | |
entity LED_Switch is | |
Port ( switch_0 : in STD_LOGIC; | |
LED_0 : out STD_LOGIC ); | |
end LED_Switch; | |
architecture Behavioral of LED_Switch is | |
begin | |
LED_0 <= switch_0; | |
end Behavioral; |
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
-- logical.vhd | |
-- Logical operations (AND, OR, XOR) | |
library IEEE; | |
use IEEE.STD_LOGIC_1164.ALL; | |
entity LED_Switch is | |
Port ( LED_0 : out STD_LOGIC; | |
LED_1 : out STD_LOGIC; | |
Switch_0 : in STD_LOGIC; | |
Switch_1 : in STD_LOGIC ); | |
end LED_Switch | |
architecture Behavioral of LED_Switch is | |
begin | |
LED_0 <= Switch_1 AND Switch_0; | |
LED_1 <= Switch_1 OR Switch_0; | |
end Behavioral; |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
From Mark Fields' VHDL/FPGA course