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@h0m3us3r
Created March 9, 2020 01:01
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ARM64 translation table utils
page_start = 0x18001C000
from_addr = 0x18001C000 + 0x002000610
into_addr = 0x18001C000
UXN = 0
PXN = 0
Con = 0
nG = 0
AF = 1
SH = 0b10
AP = 0b10
'''
Data access permissions for stage 1 of the EL1&O translation regime,
AP[2:1] Access from EL1 Access from ELO
00 Read/write None
01 Read/write Read/write
10 Read-only None
11 Read-only Read-only
'''
NS = 1
Ind = 0b001
ua = '0'*9 + '{}{}{}'.format(UXN, PXN, Con)
la = '{}{}{:02b}{:02b}{}{:03b}'.format(nG, AF, SH, AP, NS, Ind)
value = '{}0000{:018b}000000000000000000{}01'.format(ua, into_addr >> 30, la)
print 'value: {}'.format(hex(int(value, 2)).rstrip("L"))
offset = from_addr >> 22
print 'offset: {}'.format(hex(offset).rstrip("L"))
print 'adress: {}'.format(hex(page_start + offset).rstrip("L"))
page_start = 0x1800B0000
address = 0x1800B0000 + 0x608
value = 0x1800006A5
offset = address - page_start
bits = '{:064b}'.format(value)
print bits
bits = bits[::-1]
from_addr = offset << 22
addr = bits[47:30 - 1:-1]
addr += '0' * 30
into_addr = int(addr, 2)
print '# i:\t{}\r\n# o:\t{}'.format(hex(from_addr).rstrip("L"), hex(into_addr).rstrip("L"))
ua = bits[63:52 - 1:-1]
la = bits[11:2 - 1:-1]
# print 'upper attribute:\t{}'.format(ua)
print '# UXN:\t{}'.format(ua[len(ua) - 1 - 2])
print '# PXN:\t{}'.format(ua[len(ua) - 1 - 1])
print '# Cont:\t{}'.format(ua[len(ua) - 1 - 0])
# print '\r\nlower attribute:\t{}'.format(la)
print '# nG:\t{}'.format(la[10 - 1 - 9])
print '# AF:\t{}'.format(la[10 - 1 - 8])
print '# SH:\t{}'.format(la[10 - 1 - 7: 10 - 6])
AP = la[10 - 1 - 5: 10 - 4]
print '# AP:\t{} (EL1: {} EL0: {})'.format(AP,
'rw' if AP[0] == '0' else 'r',
'rw' if AP[0] == '0' and AP[1] == '1' else
'r' if AP[0] == '1' and AP[1] == '1' else 'None')
print '# NS:\t{}'.format(la[10 - 1 - 3])
print '# Ind:\t{}'.format(la[10 - 1 - 2: 10 - 0])
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