Created
April 20, 2022 22:15
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stdin
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#ifndef CRG_H | |
#define CRG_H | |
#define CRG_REG_APLL0 0x0000 | |
#define R_PLLx_FRAC_SHIFT 0 | |
#define R_PLLx_FRAC_LENGTH 24 | |
#define R_PLLx_FRAC_MASK ((~0ULL) >> (32 - (24))) << (0) | |
#define R_PLLx_POSTDIV1_SHIFT 23 | |
#define R_PLLx_POSTDIV1_LENGTH 3 | |
#define R_PLLx_POSTDIV1_MASK ((~0) >> (32 - (3))) << (23) | |
#define R_PLLx_POSTDIV2_SHIFT 38 | |
#define R_PLLx_POSTDIV2_LENGTH 3 | |
#define R_PLLx_POSTDIV2_MASK ((~0) >> (32 - (3))) << (38) | |
#define CRG_REG_APLL1 0x0004 | |
#define REG_CRG13 0x0034 | |
#define REG_CRG33 0x0084 | |
#define REG_CRG34 0x0088 | |
#define REG_SC_GEN0 0x0138 | |
#endif /* CRG_H */ |
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