rollingmountains

UV Cheat Sheet for macOS

Installation

Method 1: Official Installer (Recommended)

curl -LsSf https://astral.sh/uv/install.sh | sh

Method 2: Homebrew

mietzen

How to crossflash intel X710 OEM cards

Disclaimer

ONLY do this if you understand what this script does and when you are sure that this method is applicable to your card!!!

I'm not responsible for your doings! You are flashing the firmware of your ethernet card, in the worst case you endup with a soft- or even hardbricked card! Also this might void your warrenty.

Having said this, if you are uncertain if this will work for your card be sure to dump the ROM with a RPI, RPI Pico or 3.3v moded SPI-Flash Programmer:

spali

#!/usr/local/bin/php
<?php

require_once("config.inc");
require_once("interfaces.inc");
require_once("util.inc");

$subsystem = !empty($argv[1]) ? $argv[1] : '';
$type = !empty($argv[2]) ? $argv[2] : '';

flaviut

These instructions have moved to https://github.com/emporia-vue-local/esphome

prologic

Learn Go in ~5mins

This is inspired by A half-hour to learn Rust and Zig in 30 minutes.

Basics

Your first Go program as a classical "Hello World" is pretty simple:

First we create a workspace for our project:

oofnikj

#!/usr/bin/env bash

### UPDATED SCRIPT AVAILABLE AT https://github.com/oofnikj/openwrt-efi-tools ###

# gen-efi-image.sh [DEST_IMG] [EFI_IMG] [SOURCE_IMG]
# 
# Generates an EFI-compatible x86-64 disk image for OpenWrt
# by combining the rootfs and kernel from the latest stable release
# with the EFI image available in snapshot since @a6b7c3e.
# 

IanColdwater

Mute these words in your settings here: https://twitter.com/settings/muted_keywords

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sgup

The Beginner’s Guide to the Recommended Routine (RR)

r/BodyweightFitness Recommended Routine

A free, beginner-friendly calisthenics program you can do at home with no gym or equipment required.

3 days per week • ~60 minutes per session • Build strength & muscle with bodyweight exercises

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erincandescent

Foreward

This document was originally written several years ago. At the time I was working as an execution core verification engineer at Arm. The following points are coloured heavily by working in and around the execution cores of various processors. Apply a pinch of salt; points contain varying degrees of opinion.

It is still my opinion that RISC-V could be much better designed; though I will also say that if I was building a 32 or 64-bit CPU today I'd likely implement the architecture to benefit from the existing tooling.

Mostly based upon the RISC-V ISA spec v2.0. Some updates have been made for v2.2

Original Foreword: Some Opinion

The RISC-V ISA has pursued minimalism to a fault. There is a large emphasis on minimizing instruction count, normalizing encoding, etc. This pursuit of minimalism has resulted in false orthogonalities (such as reusing the same instruction for branches, calls and returns) and a requirement for superfluous instructions which impacts code density both in terms of size and

lizthegrey

default['sshd']['sshd_config']['AuthenticationMethods'] = 'publickey,keyboard-interactive:pam'
default['sshd']['sshd_config']['ChallengeResponseAuthentication'] = 'yes'
default['sshd']['sshd_config']['PasswordAuthentication'] = 'no'