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June 15, 2016 16:28
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An example of conversion problems when a signal is used in more than one conversion.
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from myhdl import * | |
@block | |
def block1(clock, input_signal, output_signal): | |
@always(clock.posedge) | |
def driver(): | |
output_signal.next = input_signal | |
return driver | |
@block | |
def block2(clock, input_signal, output_signal): | |
@always(clock.posedge) | |
def driver(): | |
output_signal.next = input_signal | |
return driver | |
clock = Signal(False) | |
output_signal = Signal(False) | |
input_signal = Signal(False) | |
inst1 = block1(clock, input_signal, output_signal) | |
inst2 = block2(clock, input_signal, output_signal) | |
inst1.convert() | |
inst2.convert() |
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