Makefile nesting example

Makefile

EXEC=test
all:
        cd src; make
        mv src/$(EXEC) ./

clean:
        rm -f src/*.o $(EXEC)
 

src-Makefile

CC=g++
EXEC=test
FLAGS=-g
 
SRC=DataType.cpp Exception.cpp Interpreter.cpp IO.cpp MyFloat.cpp MyInteger.cpp MyList.cpp MyString.cpp

OBJ=$(addsuffix .o, $(basename $(SRC)))
 
all:    $(OBJ)
                $(CC) $(FLAGS) -o $(EXEC) $(OBJ)

.cpp.o:
                $(CC) $(FLAGS) -c $<