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@id4ehsan
Created July 15, 2018 10:38
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synopsys source of license
PACKAGE EFA_Synopsys_1 snpslmd 2030.12 0 COMPONENTS="VDesktop-Debug \
VDesktop-GUI \
VDesktop-VCDTrans \
VDesktop-VHDL \
VDesktop-Verilog \
VEHICLE_ELECTRIC_LIB \
VEHICLE_ELECTRIC_LIB \
VEHICLE_ELECTRIC_LIB_MEMSSE \
VENDOR_LIBRARY \
VENDOR_LIBRARY_MEMSSE \
VERIAS_HSPICE_COMPILER \
VERIAS_SIMULATOR \
VHDL-Analyzer \
VHDL-Compiler \
VHDL-Compiler-Old \
VHDL-Compiler-Presto \
VHDL-Cycle-Sim \
VHDL-Elaborator \
VHDL-Event-Sim \
VHDL-Netlist-Writer \
VHDL-ScSim \
VHDL-To-BE VHDL-Tools \
VHDL-VirSim \
VHDLAMS_TAURI \
VHDLAMS_TAURILI \
VHDLi-Elaborator \
VHDLi-Event-Sim \
VHMC-Eval \
VHMC-GenUnlocked \
VHMC-Runtime \
VIEWLOGIC_FRAMEWAY \
VIEWLOGIC_FRAMEWAY_MEMSSE \
VIEWLOGIC_NET \
VIEWLOGIC_NET_MEMSSE \
VIRTEX \
VIRTEX2 \
VIRTEX2P \
VIRTEXE \
VIRTEXEA \
VMCCompiler \
VMCCompiler_Net \
VMCCompiler_Node \
VMCCore \
VMCEvaluation \
VMCEvaluation_Net \
VMCEvaluation_Node \
VMCExpress_Compiler \
VMCExpress_Compiler_Net \
VMCExpress_Compiler_Node \
VMCGeneratorUnlocked \
VMCGeneratorUnlocked_Net \
VMCGeneratorUnlocked_Node \
VMCRuntime \
VMCRuntime_Net \
VMCRuntime_Node \
VSS-Analyzer \
VSS-Backplane \
VSS-CLI \
VSS-Cadence-Interface \
VSS-CompiledSim \
VSS-Debugger \
VSS-Falcon-Interface \
VSS-GateSim \
VSS-LAI-Models \
VSS-LMSI \
VSS-Lib-Tools \
VSS-Model-Developer \
VSS-NEC-Tran \
VSS-SDF-Interface \
VSS-SGE-Tool \
VSS-SPC \
VSS-Simulator \
VSS-SmartModels \
VSS-Tran \
VSS-Utilities \
VSS-VIP-Interface \
VSS-Verilog-PLI \
VSS-Wave-Display \
VSS-XP-Accelerator" ck=0
PACKAGE EFA_Synopsys_2 snpslmd 2030.12 0 COMPONENTS="FPGA-Library-Compiler \
FPGA-Option \
FPGA-VHDL-Bundle \
FPPRT \
FPTA \
FPTime \
Fridge-GUI \
Fridge-Interpolator \
Fridge-Simulation \
FSM-Reader \
FSM-Writer \
FusionVantageLmcInterface \
Gaia \
Galaxy-AdvCTS \
Galaxy-AdvTech \
Galaxy-Common \
Galaxy-DFT \
Galaxy-DFY \
Galaxy-FP \
Galaxy-ICC \
Galaxy-IU \
Galaxy-MV \
Galaxy-PNR \
Galaxy-Power \
Galaxy-Prototype \
Galaxy-PSYN \
Gate2LayoutCorrelation \
Gate2RTLCorrelation \
gemini_hspice \
GENERICVSP \
GENESISe_all \
gentech \
GRAPHICS_INTERFACE \
Gsim_dump_advance \
Gsim_dump_basic \
Gsim_framework_advance" ck=0
PACKAGE EFA_Synopsys_3 snpslmd 2030.12 0 COMPONENTS="HLS-FPGA-SystemC \
HLS-SystemC \
hsim \
hsim-cosim \
hsim-xl \
hspice \
hspice_adv \
hspice_cosim \
hspice_gui \
HSPICE_MODEL_LIBRARY \
hspice_mt \
hspice_rf \
hspice_rf_char \
hspice3des \
hspicecmidev \
hspicecmirt \
hspicemt \
hspicerf \
hspiceva \
hspicewin \
hspice-XO \
hspicext \
hsptest \
hspui \
Hsp-vacomp \
ICInteractive \
Inspect_all \
Interface-Shell \
Interfise_all \
IQBUS_AUTHOR \
IQBUS_LIB \
IROI \
ISExtract_all \
ispLSI1K \
ispLSI2K \
ispLSI2KE \
ispLSI3K \
ispLSI5000S \
ispLSI5000SE" ck=0
PACKAGE EFA_Synopsys_4 snpslmd 2030.12 0 COMPONENTS="HARNESS_CATIA \
HARNESS_MCADREAD \
HARNESS_PROCABLE \
HARNESS_UNIGRAPHICS \
HSPICE_MODEL_LIBRARY_MEMSSE \
IC_DESIGN_LIB \
IMECH_LIBRARY \
IQBUS_AUTHOR_MEMSSE \
IQBUS_DESIGNER \
IQBUS_LIB_MEMSSE \
LINK_MATLAB \
LINK_MATLAB_MEMSSE \
LINK_XMATH \
LOAD_TOOL \
LOAD_TOOL_MEMSSE \
LSA_MEMSSE \
LSA \
LTX_LIBRARY \
COVENTOR_LIB10 \
COVENTOR_LIB10_MEMSSE \
COVENTOR_LIB11 \
COVENTOR_LIB11_MEMSSE \
COVENTOR_LIB12 \
COVENTOR_LIB12_MEMSSE \
COVENTOR_LIB13 \
COVENTOR_LIB13_MEMSSE \
COVENTOR_LIB14 \
COVENTOR_LIB14_MEMSSE \
COVENTOR_LIB15 \
COVENTOR_LIB15_MEMSSE \
COVENTOR_LIB8 \
COVENTOR_LIB8_MEMSSE \
COVENTOR_LIB9 \
COVENTOR_LIB9_MEMSSE \
DESIGNSTAR \
DESIGNSTAR_NET \
DIODE_TOOL \
DIODE_TOOL_MEMSSE \
DRCYCLE_TOOL \
DRCYCLE_TOOL_MEMSSE" ck=0
PACKAGE EFA_Synopsys_5 snpslmd 2030.12 0 COMPONENTS="SABERRT_ADI \
SABERRT_ADI_MEMSSE \
SABERRT_AP2633 \
SABERRT_FE \
SABERRT_FE_MEMSSE \
SABERRT_HIL \
SABERRT_HIL_MEMSSE \
SABER_DEV_MM \
SABER_GUIDE_MEMSSE \
SABER_INTERFACE_MEMSSE \
SABER_LEAPFROG_MM \
SABER_MODELSIM_MM \
SABER_MODELSIM_MM_MEMSSE \
SABER_MODELSIM_PLUS_MM \
SABER_MODELSIM_PLUS_MM_MEMSSE \
SABER_MODELSIM_VHDL_MM \
SABER_MODELSIM_VHDL_MM_MEMSSE \
SABER_MODELSIM_VLOG_MM \
SABER_PLUGNSIM_MM \
SABER_QSIM_MM \
SABER_QVSPRO_MM \
SABER_RT_MM \
SABER_RT_MM_MEMSSE \
SABER_RUNTIME \
SABER_SCOPE_MEMSSE \
SABER_SIMMATRIX_MM \
SABER_SIMULATOR_MEMSSE \
SABER_SKETCH_MEMSSE \
SYMLIB_POWER \
SYMLIB_POWER_MEMSSE \
TESTIFY \
TESTIFY_MEMSSE \
TESTIFY_NETLISTER_MEMSSE \
THERM_TOOL \
THERM_TOOL_MEMSSE \
TLU_TOOL \
TLU_TOOL_MEMSSE \
TR_ANALYSIS \
TR_ANALYSIS_MEMSSE \
VEHICLE_ELECTRIC_LIB_MEMSSE \
VENDOR_LIBRARY \
VENDOR_LIBRARY_MEMSSE \
VERIAS_HSPICE_COMPILER \
VERIAS_SIMULATOR \
VIEWLOGIC_FRAMEWAY \
VIEWLOGIC_FRAMEWAY_MEMSSE \
VIEWLOGIC_NET_MEMSSE \
WF_API_HSPICE \
WF_API_HSPICE_MEMSSE \
WF_API_MEMSSE \
WF_API_STARSIM \
WF_API_STARSIM_MEMSSE" ck=0
PACKAGE EFA_Synopsys_6 snpslmd 2030.12 0 COMPONENTS="WF_API_HSPICE \
WF_API_HSPICE_MEMSSE \
WF_API_MEMSSE \
WF_API_STARSIM \
WF_API_STARSIM_MEMSSE" ck=0
PACKAGE snps_lic_1 snpslmd 2030.12 0 COMPONENTS="gemini_hspice \
gentech" ck=0
PACKAGE snps_lic_2 snpslmd 2030.12 0 COMPONENTS="fastspice_xa \
ficdr_test \
ficdr_test/gds \
ficdr_test/goa \
ficdr_test/io \
ficdr_test/nc \
ficdr_test/poly \
ficdr_test/size \
ficdr_test/sizeOr \
ficdr_test/stmp \
ficdr_test/tio \
fpc_foundation \
fpc_pna \
fpc_special1 \
fpc_special2 \
fpc_special3 \
fpc_utils \
features \
fullhspice" ck=0
PACKAGE snps_lic_3 snpslmd 2030.12 0 COMPONENTS="WF_API_HSPICE \
WF_API_HSPICE_MEMSSE \
WF_API_MEMSSE \
WF_API_STARSIM \
WF_API_STARSIM_MEMSSE \
WhatIfAnalysis \
WRITE" ck=0
PACKAGE snps_lic_4 snpslmd 2030.12 0 COMPONENTS="VANTIS \
VCSAMSCompiler \
VCSAMSCompiler_Net \
VCSAMSRuntime \
VCSAMSRuntime_Net \
VCSCompile \
VCSCompile_Net \
VCSCompile_Node \
VCSCompiler \
VCSCompiler_Net \
VCSCompiler_Node \
VCSDebugger \
VCSDebugger_Net \
VCSDebugger_Node \
VCS-Express-Compile \
VCS-Express-Runtime \
VCSiCompile \
VCSiCompile_Net \
VCSiCompile_Node \
VCSiCompiler \
VCSiCompiler_Net \
VCSiCompiler_Node \
VCSiDebugger \
VCSiDebugger_Net \
VCSiDebugger_Node \
VCSiRuntime \
VCSiRuntime_Net \
VCSiRuntime_Net(3) \
VCSiRuntime_Node \
VCSiRuntimeLimited \
VCSiRuntimeLimited_Net \
VCSiRuntimeLimited_Node \
VCSlm_Hm \
VCSlm_Hm_Net \
VCSlm_Hm_Node \
VCSMXiRunTime_Net \
VCSMXRunTime_Net \
VCSNativeCode \
VCSNativeCode_Net \
VCSNativeCode_Node \
VCSOldPostProcDebugger_Net \
VCSOldPostProcDebugger_Node \
VCSParallelCompiler \
VCSParallelCompiler_Net \
VCSParallelCompiler_Node \
VCSParallelRuntime \
VCSParallelRuntime_Net \
VCSParallelRuntime_Node \
VCSParallelThread \
VCSParallelThread_Net \
VCSParallelThread_Node \
VCSPostProcDebugger \
VCSPostProcDebugger_Net \
VCSPostProcDebugger_Node \
VCSRuntime \
VCSRuntime_Net \
VCSRuntime_Node \
VCSRuntimeLimited \
VCSRuntimeLimited_Net \
VCSRuntimeLimited_Node \
VCSStd \
VCSStd_Net \
VCSStd_Node \
VCSTools \
VCSTools_Net \
VCSTools_Node \
VCS-VERIFICATION-LIBRARY \
VDesktop-Debug \
VDesktop-GUI \
VDesktop-VCDTrans \
VDesktop-Verilog \
VDesktop-VHDL \
VEHICLE_ELECTRIC_LIB \
VEHICLE_ELECTRIC_LIB_MEMSSE \
VENDOR_LIBRARY \
VENDOR_LIBRARY_MEMSSE \
Vera \
Vera_debug \
Vera_rtime \
Verdi \
VERIAS_HSPICE_COMPILER \
VERIAS_SIMULATOR" ck=0
PACKAGE snps_lic_5 snpslmd 2030.12 0 COMPONENTS="HARNESS_CATIA \
HARNESS_MCADREAD \
HARNESS_PROCABLE \
HARNESS_UNIGRAPHICS \
HDL \
HDL2SC_mixed \
HDL2SC_verilog \
HDL2SC_vhdl \
HDL-Advisor \
HDL-Advisor-Estimator \
HDL-Advisor-Estimator-Package \
HDL-Advisor-Package \
HDL-Advisor-Shell \
HDL-Advisor-Shell-Estimator \
HDL-Advisor-Shell-Estm-Package \
HDL-Advisor-Shell-Package \
HDL-Compiler \
HDL-Compiler-Old \
HDL-Compiler-SystemVerilog \
HERCULES_DEBUGGER \
HERCULES_DEVICE \
HERCULES_DRC \
HERCULES_ERC \
HERCULES_HDRC \
HERCULES_HDRC-HTML \
HERCULES_HERC-ADV \
HERCULES_HERC-BASIC \
HERCULES_HLPE \
HERCULES_HLVS \
HERCULES_HLVS-DEBUG \
HERCULES_HLVS-HTML \
HERCULES_LVS \
HERCULES_MANAGER \
HERCULES_MASK \
HERCULES_RCE \
HERCULES_VUE \
HERCULES-CRYPT_XREF_DATA \
HERCULES-DISTRIBUTED \
HERCULES-DISTRIBUTED-2 \
HERCULES-DISTRIBUTED-24 \
HERCULES-DISTRIBUTED-24/2000.4 \
HERCULES-DISTRIBUTED-4 \
HERCULES-DP_MT \
HERCULES-EXPLORER_DRC \
HERCULES-EXPLORER_FILTERS \
HERCULES-EXPLORER_LVS \
HERCULES-FINDSHORT \
HERCULES-NETLIST \
HERCULES-RUN_TRAN \
HighLevel-Power-Analysis \
HighLevel-Power-Optimization \
HLS-FPGA-SystemC \
HLS-SystemC \
HSPICE_MODEL_LIBRARY \
HSPICE_MODEL_LIBRARY_MEMSSE \
Hsp-vacomp" ck=0
PACKAGE snps_lic_6 snpslmd 2030.12 0 COMPONENTS="hd_foundation \
hd_pna \
hd_special1 \
hd_special2 \
hd_special3 \
hd_utils \
hdlin \
hdlin_mixed \
hdlin_verilog \
hdlin_vhdl \
hicdr_test \
hicdr_test/test1 \
hicdr_test/test2 \
hicdr_test/test3 \
hicdr_test/test4 \
hicdr_test/test5 \
hicdr_test/test6 \
hicdr_test/test7 \
hicdr_test/test8 \
him_mb \
him_mb_dsml \
him_mm_pi \
him_mod \
him_sml \
hsim \
hsim-cosim \
hsim-xl \
hspice \
hspice_adv \
hspice_cosim \
hspice_gui \
hspice_mt \
hspice_pack \
hspice_rf \
hspice_rf_char \
hspice3des \
hspicecmidev \
hspicecmirt \
hspicemt \
hspicerf \
hspiceva \
hspicewin \
hspice-XO \
hspicext \
hsptest \
hspui" ck=0
FEATURE EFA_Synopsys_1 snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S SUPERSEDE ISSUER=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
FEATURE EFA_Synopsys_2 snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S SUPERSEDE ISSUER=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
FEATURE EFA_Synopsys_3 snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S SUPERSEDE ISSUER=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
FEATURE EFA_Synopsys_4 snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S SUPERSEDE ISSUER=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
FEATURE EFA_Synopsys_5 snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S SUPERSEDE ISSUER=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
FEATURE EFA_Synopsys_6 snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S SUPERSEDE ISSUER=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
FEATURE hspice_pack snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S SUPERSEDE ISSUER=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
FEATURE fullhspice snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S %h SUPERSEDE ISSUER=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
FEATURE hspice snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S %h SUPERSEDE ISSUER=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
FEATURE hspicewin snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S %h SUPERSEDE ISSUER=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
FEATURE hspice3des snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S %h SUPERSEDE ISSUER=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
FEATURE hspicecmidev snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S %h SUPERSEDE ISSUER=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
FEATURE hspicecmirt snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S %h SUPERSEDE ISSUER=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
FEATURE hspicerf snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S %h SUPERSEDE ISSUER=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
FEATURE hspiceva snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S %h SUPERSEDE ISSUER=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
INCREMENT snps_lic_1 snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S %h SUPERSEDE ISSUED=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
INCREMENT snps_lic_2 snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S %h SUPERSEDE ISSUED=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
INCREMENT snps_lic_3 snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S %h SUPERSEDE ISSUED=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
INCREMENT snps_lic_4 snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S %h SUPERSEDE ISSUED=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
INCREMENT snps_lic_5 snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S %h SUPERSEDE ISSUED=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
INCREMENT snps_lic_6 snpslmd 2030.12 31-dec-2030 uncounted 0 %h VENDOR_STRING=^1Platform:ALL+S %h SUPERSEDE ISSUED=SYNOPSYS ISSUED=26-may-2018 ck=0 SN=SL:2100-0:100000:0 START=26-may-2018
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