Created
March 23, 2015 20:00
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diff --git a/arch/arm/boot/dts/msm8226-mdss.dtsi b/arch/arm/boot/dts/msm8226-mdss.dtsi | |
index 7f1c103..cedec5f 100644 | |
--- a/arch/arm/boot/dts/msm8226-mdss.dtsi | |
+++ b/arch/arm/boot/dts/msm8226-mdss.dtsi | |
@@ -52,6 +52,10 @@ | |
qcom,mdss-pipe-rgb-xin-id = <1>; | |
qcom,mdss-pipe-dma-xin-id = <2>; | |
+ qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x3AC 0 0>; | |
+ qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x3AC 4 8>; | |
+ qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x3AC 8 12>; | |
+ | |
qcom,mdss-smp-data = <7 4096>; | |
qcom,mdss-no-lut-read; | |
@@ -70,8 +74,7 @@ | |
qcom,vbif-settings = <0x004 0x00000001>, | |
<0x0D8 0x00000707>, | |
- <0x124 0x00000003>, | |
- <0x0C0 0x04101010>;//for limiting the number of outstanding transactions for the rotator write port | |
+ <0x124 0x00000003>; | |
qcom,mdp-settings = <0x02E0 0x000000A5>, | |
<0x02E4 0x00000055>, | |
<0x03AC 0xC0000CCC>, | |
@@ -108,15 +111,17 @@ | |
compatible = "qcom,mdss-dsi-ctrl"; | |
label = "MDSS DSI CTRL->0"; | |
cell-index = <0>; | |
- reg = <0xfd922800 0x600>; | |
+ reg = <0xfd922800 0x1f8>, | |
+ <0xfd922b00 0x2b0>, | |
+ <0xfd828000 0x108>; | |
+ reg-names = "dsi_ctrl", "dsi_phy", "mmss_misc_phys"; | |
qcom,mdss-fb-map = <&mdss_fb0>; | |
qcom,mdss-mdp = <&mdss_mdp>; | |
vdd-supply = <&pm8226_l15>; | |
vddio-supply = <&pm8226_l8>; | |
vdda-supply = <&pm8226_l4>; | |
- qcom,platform-enable-gpio = <&msmgpio 111 0>; | |
qcom,platform-reset-gpio = <&msmgpio 25 0>; | |
- /*qcom,platform-te-gpio = <&msmgpio 24 0>;*/ | |
+ qcom,platform-te-gpio = <&msmgpio 24 0>; | |
qcom,platform-strength-ctrl = [ff 06]; | |
qcom,platform-bist-ctrl = [00 00 b1 ff 00 00]; | |
qcom,platform-regulator-settings = [07 09 03 00 20 00 01]; |
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