Created
January 14, 2015 20:21
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| /dts-v1/; | |
| / { | |
| #size-cells = <0x1>; | |
| qcom,board-id = <0x8 0x0>; | |
| #address-cells = <0x1>; | |
| qcom,msm-id = <0xd0 0x10000 0xd1 0x10000 0xd3 0x10000 0xd4 0x10000 0xd6 0x10000 0xd7 0x10000 0xd9 0x10000 0xda 0x10000>; | |
| compatible = "qcom,msm8974-mtp", "qcom,msm8974", "qcom,mtp"; | |
| interrupt-parent = <0x1>; | |
| model = "Qualcomm MSM 8974Pro-AA/AB MTP"; | |
| aliases { | |
| smd2 = "/soc/qcom,smdtty/smdtty-apps-riva-bt-acl"; | |
| smd11 = "/soc/qcom,smdtty/qcom,smdtty-data11"; | |
| smd1 = "/soc/qcom,smdtty/qcom,smdtty-apps-fm"; | |
| spi5 = "/soc/spi@f9927000"; | |
| sdhc1 = "/soc/sdhci@f9824900"; | |
| smd36 = "/soc/qcom,smdtty/smdtty-loopback"; | |
| sdhc3 = "/soc/sdhci@f9864900"; | |
| smd5 = "/soc/qcom,smdtty/smdtty-apps-riva-ant-cmd"; | |
| smd4 = "/soc/qcom,smdtty/qcom,smdtty-mbalbridge"; | |
| serial0 = "/soc/serial@f991e000"; | |
| smd7 = "/soc/qcom,smdtty/qcom,smdtty-data1"; | |
| sdhc4 = "/soc/sdhci@f98e4900"; | |
| sdhc2 = "/soc/sdhci@f98a4900"; | |
| smd6 = "/soc/qcom,smdtty/smdtty-apps-riva-ant-data"; | |
| spi9 = "/soc/spi@f9965000"; | |
| spi8 = "/soc/spi@f9964000"; | |
| smd21 = "/soc/qcom,smdtty/qcom,smdtty-data21"; | |
| smd3 = "/soc/qcom,smdtty/qcom,smdtty-apps-riva-bt-cmd"; | |
| smd27 = "/soc/qcom,smdtty/smdtty-gpsnmea"; | |
| }; | |
| chosen { | |
| linux,initrd-end = <0x20bd623>; | |
| bootargs = "console=ttyHSL0,115200,n8 androidboot.hardware=qcom user_debug=31 msm_rtb.filter=0x3F ehci-hcd.park=3 androidboot.emmc=true androidboot.serialno=8d608e1e androidboot.baseband=msm mdss_mdp.panel=1:dsi:0:qcom,mdss_dsi_jdi_1080p_cmd", "oppo.pcb_version=43 LCD_id<4 oppo.rf_version=96 maxcpus=2 androidboot.startupmode=charger androidboot.mode=reboot lk_version=V1.0"; | |
| linux,initrd-start = <0x2000000>; | |
| }; | |
| soc { | |
| #size-cells = <0x1>; | |
| ranges; | |
| #address-cells = <0x1>; | |
| wcd9xxx-irq { | |
| linux,phandle = <0x4c>; | |
| interrupt-names = "cdc-int"; | |
| interrupt-controller; | |
| compatible = "qcom,wcd9xxx-irq"; | |
| #interrupt-cells = <0x1>; | |
| interrupt-parent = <0x5>; | |
| phandle = <0x4c>; | |
| interrupts = <0x48 0x0>; | |
| }; | |
| qcom,smp2pgpio-rdbg-2-in { | |
| linux,phandle = <0x38>; | |
| qcom,remote-pid = <0x2>; | |
| qcom,is-inbound; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "rdbg"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x38>; | |
| }; | |
| replicator@fc31c000 { | |
| linux,phandle = <0x13>; | |
| coresight-child-list = <0x11 0x12>; | |
| reg-names = "replicator-base"; | |
| coresight-outports = <0x0 0x1>; | |
| coresight-nr-inports = <0x1>; | |
| reg = <0xfc31c000 0x1000>; | |
| compatible = "qcom,coresight-replicator"; | |
| coresight-child-ports = <0x0 0x0>; | |
| phandle = <0x13>; | |
| coresight-id = <0x2>; | |
| coresight-name = "coresight-replicator"; | |
| }; | |
| qcom,clock-krait@f9016000 { | |
| qcom,speed1-pvs14-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xd9490 0x4c 0x14997000 0xd9490 0x57 0x192d5000 0xd9490 0x6c 0x1dc13000 0xd9490 0x81 0x22551000 0xd9490 0x96 0x26e8f000 0xd9490 0xab 0x2b7cd000 0xd9490 0xc1 0x3010b000 0xd9490 0xd7 0x34a49000 0xd9490 0xed 0x39387000 0xd9490 0x104 0x3dcc5000 0xdbba0 0x11a 0x42603000 0xde2b0 0x132 0x46f41000 0xe09c0 0x14a 0x4b87f000 0xe30d0 0x162 0x501bd000 0xe57e0 0x17a 0x54afb000 0xe7ef0 0x194 0x59439000 0xea600 0x1af 0x5dd77000 0xecd10 0x1ca 0x626b5000 0xef420 0x1e6 0x66ff3000 0xf1b30 0x203 0x6b931000 0xf4240 0x21f 0x7026f000 0xf6950 0x23c 0x74bad000 0xf9060 0x25c 0x794eb000 0xfcaf8 0x27c 0x7de29000 0x100590 0x29d 0x802c8000 0x104028 0x2bf 0x82767000 0x104028 0x2bf 0x870a5000 0x107ac0 0x2e2>; | |
| qcom,speed1-pvs6-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xdbba0 0x4c 0x14997000 0xdbba0 0x57 0x192d5000 0xdbba0 0x6c 0x1dc13000 0xdcf28 0x81 0x22551000 0xdf638 0x96 0x26e8f000 0xe1d48 0xab 0x2b7cd000 0xe4458 0xc1 0x3010b000 0xe6b68 0xd7 0x34a49000 0xe9278 0xed 0x39387000 0xeb988 0x104 0x3dcc5000 0xecd10 0x11a 0x42603000 0xecd10 0x132 0x46f41000 0xecd10 0x14a 0x4b87f000 0xee098 0x162 0x501bd000 0xf07a8 0x17a 0x54afb000 0xf2eb8 0x194 0x59439000 0xf6950 0x1af 0x5dd77000 0xfa3e8 0x1ca 0x626b5000 0xfde80 0x1e6 0x66ff3000 0x101918 0x203 0x6b931000 0x1053b0 0x21f 0x7026f000 0x108e48 0x23c 0x74bad000 0x10c8e0 0x25c 0x794eb000 0x110378 0x27c 0x7de29000 0x113e10 0x29d 0x802c8000 0x1178a8 0x2bf 0x82767000 0x1178a8 0x2bf 0x870a5000 0x11b340 0x2e2>; | |
| qcom,speed1-pvs7-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xdbba0 0x4c 0x14997000 0xdbba0 0x57 0x192d5000 0xdbba0 0x6c 0x1dc13000 0xdcf28 0x81 0x22551000 0xdf638 0x96 0x26e8f000 0xe1d48 0xab 0x2b7cd000 0xe4458 0xc1 0x3010b000 0xe6b68 0xd7 0x34a49000 0xe9278 0xed 0x39387000 0xea600 0x104 0x3dcc5000 0xea600 0x11a 0x42603000 0xea600 0x132 0x46f41000 0xea600 0x14a 0x4b87f000 0xecd10 0x162 0x501bd000 0xef420 0x17a 0x54afb000 0xf1b30 0x194 0x59439000 0xf4240 0x1af 0x5dd77000 0xf7cd8 0x1ca 0x626b5000 0xfb770 0x1e6 0x66ff3000 0xff208 0x203 0x6b931000 0x102ca0 0x21f 0x7026f000 0x106738 0x23c 0x74bad000 0x10a1d0 0x25c 0x794eb000 0x10dc68 0x27c 0x7de29000 0x111700 0x29d 0x802c8000 0x115198 0x2bf 0x82767000 0x115198 0x2bf 0x870a5000 0x118c30 0x2e2>; | |
| qcom,speed1-pvs15-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xd6d80 0x4c 0x14997000 0xd6d80 0x57 0x192d5000 0xd6d80 0x6c 0x1dc13000 0xd6d80 0x81 0x22551000 0xd6d80 0x96 0x26e8f000 0xd6d80 0xab 0x2b7cd000 0xd6d80 0xc1 0x3010b000 0xd6d80 0xd7 0x34a49000 0xd6d80 0xed 0x39387000 0xd8108 0x104 0x3dcc5000 0xda818 0x11a 0x42603000 0xdcf28 0x132 0x46f41000 0xdf638 0x14a 0x4b87f000 0xe1d48 0x162 0x501bd000 0xe4458 0x17a 0x54afb000 0xe6b68 0x194 0x59439000 0xe9278 0x1af 0x5dd77000 0xeb988 0x1ca 0x626b5000 0xee098 0x1e6 0x66ff3000 0xf07a8 0x203 0x6b931000 0xf2eb8 0x21f 0x7026f000 0xf55c8 0x23c 0x74bad000 0xf7cd8 0x25c 0x794eb000 0xfa3e8 0x27c 0x7de29000 0xfde80 0x29d 0x802c8000 0x101918 0x2bf 0x82767000 0x101918 0x2bf 0x870a5000 0x1053b0 0x2e2>; | |
| qcom,speed3-pvs11-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbd358 0xbd 0x3010b000 0xbd358 0xd3 0x34a49000 0xbd358 0xe9 0x39387000 0xbe6e0 0x100 0x3dcc5000 0xc0df0 0x116 0x42603000 0xc3500 0x12d 0x46f41000 0xc5c10 0x144 0x4b87f000 0xc8320 0x15c 0x501bd000 0xcaa30 0x174 0x54afb000 0xcd140 0x18c 0x59439000 0xcf850 0x1a5 0x5dd77000 0xd1f60 0x1be 0x626b5000 0xd4670 0x1d9 0x66ff3000 0xd6d80 0x1f5 0x6b931000 0xd9490 0x211 0x7026f000 0xdbba0 0x22e 0x74bad000 0xdf638 0x24c 0x794eb000 0xe30d0 0x269 0x7de29000 0xe6b68 0x289 0x802c8000 0xea600 0x2aa 0x82767000 0xea600 0x2aa 0x870a5000 0xee098 0x2cc 0x8b9e3000 0xf1b30 0x2ef 0x90321000 0xf55c8 0x312 0x927c0000 0xf6950 0x322>; | |
| reg-names = "hfpll_l2_clk", "hfpll0_clk", "hfpll1_clk", "hfpll2_clk", "hfpll3_clk", "efuse"; | |
| qcom,speed0-pvs0-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xc6f98 0x49 0x14997000 0xc96a8 0x55 0x192d5000 0xcbdb8 0x68 0x1dc13000 0xce4c8 0x7c 0x22551000 0xd0bd8 0x90 0x26e8f000 0xd32e8 0xa5 0x2b7cd000 0xd59f8 0xba 0x3010b000 0xd9490 0xd0 0x34a49000 0xdbba0 0xe5 0x39387000 0xdf638 0xfc 0x3dcc5000 0xe1d48 0x113 0x42603000 0xe57e0 0x12a 0x46f41000 0xe7ef0 0x141 0x4b87f000 0xeb988 0x15a 0x501bd000 0xef420 0x173 0x54afb000 0xf2eb8 0x18d 0x59439000 0xf6950 0x1a7 0x5dd77000 0xfa3e8 0x1c2 0x626b5000 0xfde80 0x1dd 0x66ff3000 0x101918 0x1fa 0x6b931000 0x1053b0 0x218 0x7026f000 0x108e48 0x237 0x74bad000 0x10c8e0 0x256>; | |
| qcom,speed1-pvs3-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4a 0x14997000 0xb71b0 0x55 0x192d5000 0xb71b0 0x68 0x1dc13000 0xb71b0 0x7c 0x22551000 0xb71b0 0x90 0x26e8f000 0xb8538 0xa4 0x2b7cd000 0xbac48 0xb8 0x3010b000 0xbd358 0xce 0x34a49000 0xbfa68 0xe3 0x39387000 0xc2178 0xf9 0x3dcc5000 0xc4888 0x10f 0x42603000 0xc6f98 0x127 0x46f41000 0xc96a8 0x13e 0x4b87f000 0xcbdb8 0x156 0x501bd000 0xcf850 0x16d 0x54afb000 0xd1f60 0x188 0x59439000 0xd4670 0x1a0 0x5dd77000 0xd8108 0x1ba 0x626b5000 0xdbba0 0x1d5 0x66ff3000 0xde2b0 0x1f1 0x6b931000 0xe1d48 0x20d 0x7026f000 0xe4458 0x22a 0x74bad000 0xe6b68 0x247 0x794eb000 0xea600 0x265 0x7de29000 0xecd10 0x282 0x802c8000 0xf07a8 0x297 0x82767000 0xf07a8 0x2a3 0x870a5000 0xf4240 0x2c4>; | |
| qcom,speed3-pvs3-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc3500 0x7e 0x22551000 0xc3500 0x93 0x26e8f000 0xc3500 0xa8 0x2b7cd000 0xc5c10 0xbd 0x3010b000 0xc8320 0xd3 0x34a49000 0xcaa30 0xe9 0x39387000 0xcd140 0x100 0x3dcc5000 0xcf850 0x116 0x42603000 0xd1f60 0x12d 0x46f41000 0xd4670 0x144 0x4b87f000 0xd6d80 0x15c 0x501bd000 0xd9490 0x174 0x54afb000 0xdbba0 0x18c 0x59439000 0xde2b0 0x1a5 0x5dd77000 0xe09c0 0x1be 0x626b5000 0xe4458 0x1d9 0x66ff3000 0xe7ef0 0x1f5 0x6b931000 0xeb988 0x211 0x7026f000 0xef420 0x22e 0x74bad000 0xf2eb8 0x24c 0x794eb000 0xf6950 0x269 0x7de29000 0xfa3e8 0x289 0x802c8000 0xfde80 0x2aa 0x82767000 0xfde80 0x2aa 0x870a5000 0x101918 0x2cc 0x8b9e3000 0x1053b0 0x2ef 0x90321000 0x108e48 0x312 0x927c0000 0x10a1d0 0x322>; | |
| qcom,speed1-pvs10-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xdbba0 0x4c 0x14997000 0xdbba0 0x57 0x192d5000 0xdbba0 0x6c 0x1dc13000 0xdcf28 0x81 0x22551000 0xdf638 0x96 0x26e8f000 0xe1d48 0xab 0x2b7cd000 0xe30d0 0xc1 0x3010b000 0xe30d0 0xd7 0x34a49000 0xe30d0 0xed 0x39387000 0xe30d0 0x104 0x3dcc5000 0xe30d0 0x11a 0x42603000 0xe30d0 0x132 0x46f41000 0xe57e0 0x14a 0x4b87f000 0xe7ef0 0x162 0x501bd000 0xea600 0x17a 0x54afb000 0xecd10 0x194 0x59439000 0xef420 0x1af 0x5dd77000 0xf1b30 0x1ca 0x626b5000 0xf4240 0x1e6 0x66ff3000 0xf7cd8 0x203 0x6b931000 0xfb770 0x21f 0x7026f000 0xff208 0x23c 0x74bad000 0x102ca0 0x25c 0x794eb000 0x106738 0x27c 0x7de29000 0x10a1d0 0x29d 0x802c8000 0x10dc68 0x2bf 0x82767000 0x10dc68 0x2bf 0x870a5000 0x111700 0x2e2>; | |
| cpu3-supply = <0x5c>; | |
| qcom,speed1-pvs3-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xdbba0 0x4c 0x14997000 0xdbba0 0x57 0x192d5000 0xdbba0 0x6c 0x1dc13000 0xdcf28 0x81 0x22551000 0xdf638 0x96 0x26e8f000 0xe1d48 0xab 0x2b7cd000 0xe4458 0xc1 0x3010b000 0xe6b68 0xd7 0x34a49000 0xe9278 0xed 0x39387000 0xeb988 0x104 0x3dcc5000 0xee098 0x11a 0x42603000 0xf1b30 0x132 0x46f41000 0xf4240 0x14a 0x4b87f000 0xf4240 0x162 0x501bd000 0xf6950 0x17a 0x54afb000 0xfa3e8 0x194 0x59439000 0xfde80 0x1af 0x5dd77000 0x101918 0x1ca 0x626b5000 0x1053b0 0x1e6 0x66ff3000 0x108e48 0x203 0x6b931000 0x10c8e0 0x21f 0x7026f000 0x110378 0x23c 0x74bad000 0x113e10 0x25c 0x794eb000 0x1178a8 0x27c 0x7de29000 0x11b340 0x29d 0x802c8000 0x11edd8 0x2bf 0x82767000 0x11edd8 0x2bf 0x870a5000 0x122870 0x2e2>; | |
| qcom,speed3-pvs1-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc3500 0x7e 0x22551000 0xc5c10 0x93 0x26e8f000 0xc8320 0xa8 0x2b7cd000 0xcaa30 0xbd 0x3010b000 0xcd140 0xd3 0x34a49000 0xcf850 0xe9 0x39387000 0xd1f60 0x100 0x3dcc5000 0xd4670 0x116 0x42603000 0xd6d80 0x12d 0x46f41000 0xd9490 0x144 0x4b87f000 0xdbba0 0x15c 0x501bd000 0xde2b0 0x174 0x54afb000 0xe09c0 0x18c 0x59439000 0xe30d0 0x1a5 0x5dd77000 0xe57e0 0x1be 0x626b5000 0xe9278 0x1d9 0x66ff3000 0xecd10 0x1f5 0x6b931000 0xf07a8 0x211 0x7026f000 0xf4240 0x22e 0x74bad000 0xf7cd8 0x24c 0x794eb000 0xfb770 0x269 0x7de29000 0xff208 0x289 0x802c8000 0x102ca0 0x2aa 0x82767000 0x102ca0 0x2aa 0x870a5000 0x106738 0x2cc 0x8b9e3000 0x10a1d0 0x2ef 0x90321000 0x10dc68 0x312 0x927c0000 0x10eff0 0x322>; | |
| qcom,speed2-pvs4-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x48 0x14997000 0xbd358 0x53 0x192d5000 0xbd358 0x66 0x1dc13000 0xbd358 0x79 0x22551000 0xbd358 0x8d 0x26e8f000 0xbe6e0 0xa1 0x2b7cd000 0xc0df0 0xb5 0x3010b000 0xc3500 0xca 0x34a49000 0xc5c10 0xdf 0x39387000 0xc8320 0xf5 0x3dcc5000 0xcaa30 0x10b 0x42603000 0xcd140 0x121 0x46f41000 0xcf850 0x139 0x4b87f000 0xd1f60 0x150 0x501bd000 0xd4670 0x168 0x54afb000 0xd6d80 0x17f 0x59439000 0xda818 0x199 0x5dd77000 0xde2b0 0x1b3 0x626b5000 0xe09c0 0x1cd 0x66ff3000 0xe30d0 0x1e8 0x6b931000 0xe57e0 0x204 0x7026f000 0xe7ef0 0x21f 0x74bad000 0xea600 0x23d 0x794eb000 0xee098 0x25c 0x7de29000 0xf07a8 0x27c 0x802c8000 0xf4240 0x290>; | |
| qcom,speed1-pvs2-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4a 0x14997000 0xb71b0 0x55 0x192d5000 0xb71b0 0x68 0x1dc13000 0xb71b0 0x7c 0x22551000 0xb98c0 0x90 0x26e8f000 0xbbfd0 0xa4 0x2b7cd000 0xbe6e0 0xb8 0x3010b000 0xc0df0 0xce 0x34a49000 0xc3500 0xe3 0x39387000 0xc5c10 0xf9 0x3dcc5000 0xc8320 0x10f 0x42603000 0xcaa30 0x127 0x46f41000 0xcd140 0x13e 0x4b87f000 0xcf850 0x156 0x501bd000 0xd32e8 0x16d 0x54afb000 0xd59f8 0x188 0x59439000 0xd8108 0x1a0 0x5dd77000 0xdbba0 0x1ba 0x626b5000 0xdf638 0x1d5 0x66ff3000 0xe30d0 0x1f1 0x6b931000 0xe6b68 0x20d 0x7026f000 0xe9278 0x22a 0x74bad000 0xecd10 0x247 0x794eb000 0xef420 0x265 0x7de29000 0xf2eb8 0x282 0x802c8000 0xf6950 0x297 0x82767000 0xf6950 0x2a3 0x870a5000 0xfa3e8 0x2c4>; | |
| qcom,speed3-pvs9-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbd358 0xbd 0x3010b000 0xbd358 0xd3 0x34a49000 0xbe6e0 0xe9 0x39387000 0xc0df0 0x100 0x3dcc5000 0xc3500 0x116 0x42603000 0xc5c10 0x12d 0x46f41000 0xc8320 0x144 0x4b87f000 0xcaa30 0x15c 0x501bd000 0xcd140 0x174 0x54afb000 0xcf850 0x18c 0x59439000 0xd1f60 0x1a5 0x5dd77000 0xd4670 0x1be 0x626b5000 0xd6d80 0x1d9 0x66ff3000 0xd9490 0x1f5 0x6b931000 0xdcf28 0x211 0x7026f000 0xe09c0 0x22e 0x74bad000 0xe4458 0x24c 0x794eb000 0xe7ef0 0x269 0x7de29000 0xeb988 0x289 0x802c8000 0xef420 0x2aa 0x82767000 0xef420 0x2aa 0x870a5000 0xf2eb8 0x2cc 0x8b9e3000 0xf6950 0x2ef 0x90321000 0xfa3e8 0x312 0x927c0000 0xfb770 0x322>; | |
| qcom,speed2-pvs2-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x48 0x14997000 0xbd358 0x53 0x192d5000 0xbd358 0x66 0x1dc13000 0xbfa68 0x79 0x22551000 0xc2178 0x8d 0x26e8f000 0xc4888 0xa1 0x2b7cd000 0xc6f98 0xb5 0x3010b000 0xc96a8 0xca 0x34a49000 0xcbdb8 0xdf 0x39387000 0xce4c8 0xf5 0x3dcc5000 0xd0bd8 0x10b 0x42603000 0xd32e8 0x121 0x46f41000 0xd59f8 0x139 0x4b87f000 0xd9490 0x150 0x501bd000 0xdbba0 0x168 0x54afb000 0xde2b0 0x17f 0x59439000 0xe1d48 0x199 0x5dd77000 0xe57e0 0x1b3 0x626b5000 0xe9278 0x1cd 0x66ff3000 0xecd10 0x1e8 0x6b931000 0xef420 0x204 0x7026f000 0xf2eb8 0x21f 0x74bad000 0xf55c8 0x23d 0x794eb000 0xf9060 0x25c 0x7de29000 0xfcaf8 0x27c 0x802c8000 0x100590 0x290>; | |
| qcom,speed1-pvs6-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb1008 0x4a 0x14997000 0xb1008 0x55 0x192d5000 0xb1008 0x68 0x1dc13000 0xb1008 0x7c 0x22551000 0xb1008 0x90 0x26e8f000 0xb1008 0xa4 0x2b7cd000 0xb3718 0xb8 0x3010b000 0xb5e28 0xce 0x34a49000 0xb8538 0xe3 0x39387000 0xbac48 0xf9 0x3dcc5000 0xbd358 0x10f 0x42603000 0xbfa68 0x127 0x46f41000 0xc2178 0x13e 0x4b87f000 0xc4888 0x156 0x501bd000 0xc6f98 0x16d 0x54afb000 0xc96a8 0x188 0x59439000 0xcbdb8 0x1a0 0x5dd77000 0xce4c8 0x1ba 0x626b5000 0xcf850 0x1d5 0x66ff3000 0xd1f60 0x1f1 0x6b931000 0xd4670 0x20d 0x7026f000 0xd6d80 0x22a 0x74bad000 0xd9490 0x247 0x794eb000 0xda818 0x265 0x7de29000 0xdcf28 0x282 0x802c8000 0xdf638 0x297 0x82767000 0xdf638 0x2a3 0x870a5000 0xe1d48 0x2c4>; | |
| qcom,speed3-pvs2-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7d 0x22551000 0xbd358 0x91 0x26e8f000 0xbd358 0xa5 0x2b7cd000 0xbd358 0xba 0x3010b000 0xbe6e0 0xd0 0x34a49000 0xc0df0 0xe5 0x39387000 0xc3500 0xfb 0x3dcc5000 0xc5c10 0x111 0x42603000 0xc8320 0x128 0x46f41000 0xcaa30 0x13f 0x4b87f000 0xcd140 0x156 0x501bd000 0xcf850 0x16d 0x54afb000 0xd1f60 0x186 0x59439000 0xd4670 0x19f 0x5dd77000 0xd6d80 0x1b7 0x626b5000 0xda818 0x1d1 0x66ff3000 0xde2b0 0x1ed 0x6b931000 0xe1d48 0x209 0x7026f000 0xe57e0 0x225 0x74bad000 0xe9278 0x243 0x794eb000 0xecd10 0x260 0x7de29000 0xf07a8 0x27e 0x802c8000 0xf4240 0x29b 0x82767000 0xf4240 0x29b 0x870a5000 0xf7cd8 0x2bc 0x8b9e3000 0xfb770 0x2de 0x90321000 0xff208 0x301 0x927c0000 0x100590 0x311>; | |
| qcom,speed3-pvs7-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbe6e0 0xbd 0x3010b000 0xbfa68 0xd3 0x34a49000 0xc2178 0xe9 0x39387000 0xc4888 0x100 0x3dcc5000 0xc6f98 0x116 0x42603000 0xc96a8 0x12d 0x46f41000 0xcbdb8 0x144 0x4b87f000 0xce4c8 0x15c 0x501bd000 0xd0bd8 0x174 0x54afb000 0xd32e8 0x18c 0x59439000 0xd59f8 0x1a5 0x5dd77000 0xd8108 0x1be 0x626b5000 0xda818 0x1d9 0x66ff3000 0xde2b0 0x1f5 0x6b931000 0xe1d48 0x211 0x7026f000 0xe57e0 0x22e 0x74bad000 0xe9278 0x24c 0x794eb000 0xecd10 0x269 0x7de29000 0xf07a8 0x289 0x802c8000 0xf4240 0x2aa 0x82767000 0xf4240 0x2aa 0x870a5000 0xf7cd8 0x2cc 0x8b9e3000 0xfb770 0x2ef 0x90321000 0xff208 0x312 0x927c0000 0x100590 0x322>; | |
| qcom,speed2-pvs6-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x48 0x14997000 0xb71b0 0x53 0x192d5000 0xb71b0 0x66 0x1dc13000 0xb71b0 0x79 0x22551000 0xb71b0 0x8d 0x26e8f000 0xb98c0 0xa1 0x2b7cd000 0xbbfd0 0xb5 0x3010b000 0xbe6e0 0xca 0x34a49000 0xc0df0 0xdf 0x39387000 0xc3500 0xf5 0x3dcc5000 0xc5c10 0x10b 0x42603000 0xc8320 0x121 0x46f41000 0xcaa30 0x139 0x4b87f000 0xcd140 0x150 0x501bd000 0xcf850 0x168 0x54afb000 0xd1f60 0x17f 0x59439000 0xd4670 0x199 0x5dd77000 0xd59f8 0x1b3 0x626b5000 0xd8108 0x1cd 0x66ff3000 0xda818 0x1e8 0x6b931000 0xdcf28 0x204 0x7026f000 0xdf638 0x21f 0x74bad000 0xe09c0 0x23d 0x794eb000 0xe30d0 0x25c 0x7de29000 0xe57e0 0x27c 0x802c8000 0xe7ef0 0x290>; | |
| qcom,speed0-pvs1-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x49 0x14997000 0xc5c10 0x55 0x192d5000 0xc8320 0x68 0x1dc13000 0xcaa30 0x7c 0x22551000 0xcd140 0x90 0x26e8f000 0xcf850 0xa5 0x2b7cd000 0xd1f60 0xba 0x3010b000 0xd59f8 0xd0 0x34a49000 0xd8108 0xe5 0x39387000 0xda818 0xfc 0x3dcc5000 0xde2b0 0x113 0x42603000 0xe09c0 0x12a 0x46f41000 0xe30d0 0x141 0x4b87f000 0xe6b68 0x15a 0x501bd000 0xea600 0x173 0x54afb000 0xee098 0x18d 0x59439000 0xf1b30 0x1a7 0x5dd77000 0xf55c8 0x1c2 0x626b5000 0xf9060 0x1dd 0x66ff3000 0xfb770 0x1fa 0x6b931000 0xff208 0x218 0x7026f000 0x102ca0 0x237 0x74bad000 0x106738 0x256>; | |
| qcom,speed3-pvs10-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbd358 0xbd 0x3010b000 0xbd358 0xd3 0x34a49000 0xbe6e0 0xe9 0x39387000 0xbfa68 0x100 0x3dcc5000 0xc2178 0x116 0x42603000 0xc4888 0x12d 0x46f41000 0xc6f98 0x144 0x4b87f000 0xc96a8 0x15c 0x501bd000 0xcbdb8 0x174 0x54afb000 0xce4c8 0x18c 0x59439000 0xd0bd8 0x1a5 0x5dd77000 0xd32e8 0x1be 0x626b5000 0xd59f8 0x1d9 0x66ff3000 0xd8108 0x1f5 0x6b931000 0xda818 0x211 0x7026f000 0xde2b0 0x22e 0x74bad000 0xe1d48 0x24c 0x794eb000 0xe57e0 0x269 0x7de29000 0xe9278 0x289 0x802c8000 0xecd10 0x2aa 0x82767000 0xecd10 0x2aa 0x870a5000 0xf07a8 0x2cc 0x8b9e3000 0xf4240 0x2ef 0x90321000 0xf7cd8 0x312 0x927c0000 0xf9060 0x322>; | |
| qcom,speed3-pvs4-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc3500 0x7e 0x22551000 0xc3500 0x93 0x26e8f000 0xc3500 0xa8 0x2b7cd000 0xc3500 0xbd 0x3010b000 0xc5c10 0xd3 0x34a49000 0xc8320 0xe9 0x39387000 0xcaa30 0x100 0x3dcc5000 0xcd140 0x116 0x42603000 0xcf850 0x12d 0x46f41000 0xd1f60 0x144 0x4b87f000 0xd4670 0x15c 0x501bd000 0xd6d80 0x174 0x54afb000 0xd9490 0x18c 0x59439000 0xdbba0 0x1a5 0x5dd77000 0xde2b0 0x1be 0x626b5000 0xe1d48 0x1d9 0x66ff3000 0xe57e0 0x1f5 0x6b931000 0xe9278 0x211 0x7026f000 0xecd10 0x22e 0x74bad000 0xf07a8 0x24c 0x794eb000 0xf4240 0x269 0x7de29000 0xf7cd8 0x289 0x802c8000 0xfb770 0x2aa 0x82767000 0xfb770 0x2aa 0x870a5000 0xff208 0x2cc 0x8b9e3000 0x102ca0 0x2ef 0x90321000 0x106738 0x312 0x927c0000 0x107ac0 0x322>; | |
| cpu2-supply = <0x5b>; | |
| cpu1-supply = <0x5a>; | |
| qcom,speed1-pvs9-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xdbba0 0x4c 0x14997000 0xdbba0 0x57 0x192d5000 0xdbba0 0x6c 0x1dc13000 0xdcf28 0x81 0x22551000 0xdf638 0x96 0x26e8f000 0xe1d48 0xab 0x2b7cd000 0xe4458 0xc1 0x3010b000 0xe57e0 0xd7 0x34a49000 0xe57e0 0xed 0x39387000 0xe57e0 0x104 0x3dcc5000 0xe57e0 0x11a 0x42603000 0xe57e0 0x132 0x46f41000 0xe6b68 0x14a 0x4b87f000 0xe9278 0x162 0x501bd000 0xeb988 0x17a 0x54afb000 0xee098 0x194 0x59439000 0xf07a8 0x1af 0x5dd77000 0xf2eb8 0x1ca 0x626b5000 0xf6950 0x1e6 0x66ff3000 0xfa3e8 0x203 0x6b931000 0xfde80 0x21f 0x7026f000 0x101918 0x23c 0x74bad000 0x1053b0 0x25c 0x794eb000 0x108e48 0x27c 0x7de29000 0x10c8e0 0x29d 0x802c8000 0x110378 0x2bf 0x82767000 0x110378 0x2bf 0x870a5000 0x113e10 0x2e2>; | |
| qcom,speed3-pvs0-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc3500 0x7d 0x22551000 0xc3500 0x91 0x26e8f000 0xc5c10 0xa5 0x2b7cd000 0xc8320 0xba 0x3010b000 0xcaa30 0xd0 0x34a49000 0xcd140 0xe5 0x39387000 0xcf850 0xfb 0x3dcc5000 0xd1f60 0x111 0x42603000 0xd4670 0x128 0x46f41000 0xd6d80 0x13f 0x4b87f000 0xd9490 0x156 0x501bd000 0xdbba0 0x16d 0x54afb000 0xde2b0 0x186 0x59439000 0xe09c0 0x19f 0x5dd77000 0xe30d0 0x1b7 0x626b5000 0xe6b68 0x1d1 0x66ff3000 0xea600 0x1ed 0x6b931000 0xee098 0x209 0x7026f000 0xf1b30 0x225 0x74bad000 0xf55c8 0x243 0x794eb000 0xf9060 0x260 0x7de29000 0xfcaf8 0x27e 0x802c8000 0x100590 0x29b 0x82767000 0x100590 0x29b 0x870a5000 0x104028 0x2bc 0x8b9e3000 0x107ac0 0x2de 0x90321000 0x10b558 0x301 0x927c0000 0x10c8e0 0x311>; | |
| reg = <0xf9016000 0x20 0xf908a000 0x20 0xf909a000 0x20 0xf90aa000 0x20 0xf90ba000 0x20 0xfc4b80b0 0x8>; | |
| qcom,speed3-pvs12-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbd358 0xbd 0x3010b000 0xbd358 0xd3 0x34a49000 0xbd358 0xe9 0x39387000 0xbe6e0 0x100 0x3dcc5000 0xbfa68 0x116 0x42603000 0xc2178 0x12d 0x46f41000 0xc4888 0x144 0x4b87f000 0xc6f98 0x15c 0x501bd000 0xc96a8 0x174 0x54afb000 0xcbdb8 0x18c 0x59439000 0xce4c8 0x1a5 0x5dd77000 0xd0bd8 0x1be 0x626b5000 0xd32e8 0x1d9 0x66ff3000 0xd59f8 0x1f5 0x6b931000 0xd8108 0x211 0x7026f000 0xda818 0x22e 0x74bad000 0xdcf28 0x24c 0x794eb000 0xe09c0 0x269 0x7de29000 0xe4458 0x289 0x802c8000 0xe7ef0 0x2aa 0x82767000 0xe7ef0 0x2aa 0x870a5000 0xeb988 0x2cc 0x8b9e3000 0xef420 0x2ef 0x90321000 0xf2eb8 0x312 0x927c0000 0xf4240 0x322>; | |
| qcom,speed3-pvs13-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbd358 0xbd 0x3010b000 0xbd358 0xd3 0x34a49000 0xbd358 0xe9 0x39387000 0xbd358 0x100 0x3dcc5000 0xbe6e0 0x116 0x42603000 0xc0df0 0x12d 0x46f41000 0xc3500 0x144 0x4b87f000 0xc5c10 0x15c 0x501bd000 0xc8320 0x174 0x54afb000 0xcaa30 0x18c 0x59439000 0xcd140 0x1a5 0x5dd77000 0xcf850 0x1be 0x626b5000 0xd1f60 0x1d9 0x66ff3000 0xd4670 0x1f5 0x6b931000 0xd6d80 0x211 0x7026f000 0xd9490 0x22e 0x74bad000 0xdbba0 0x24c 0x794eb000 0xde2b0 0x269 0x7de29000 0xe1d48 0x289 0x802c8000 0xe57e0 0x2aa 0x82767000 0xe57e0 0x2aa 0x870a5000 0xe9278 0x2cc 0x8b9e3000 0xecd10 0x2ef 0x90321000 0xf07a8 0x312 0x927c0000 0xf1b30 0x322>; | |
| compatible = "qcom,clock-krait-8974"; | |
| qcom,speed3-pvs5-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc3500 0x7e 0x22551000 0xc3500 0x93 0x26e8f000 0xc3500 0xa8 0x2b7cd000 0xc3500 0xbd 0x3010b000 0xc3500 0xd3 0x34a49000 0xc5c10 0xe9 0x39387000 0xc8320 0x100 0x3dcc5000 0xcaa30 0x116 0x42603000 0xcd140 0x12d 0x46f41000 0xcf850 0x144 0x4b87f000 0xd1f60 0x15c 0x501bd000 0xd4670 0x174 0x54afb000 0xd6d80 0x18c 0x59439000 0xd9490 0x1a5 0x5dd77000 0xdbba0 0x1be 0x626b5000 0xdf638 0x1d9 0x66ff3000 0xe30d0 0x1f5 0x6b931000 0xe6b68 0x211 0x7026f000 0xea600 0x22e 0x74bad000 0xee098 0x24c 0x794eb000 0xf1b30 0x269 0x7de29000 0xf55c8 0x289 0x802c8000 0xf9060 0x2aa 0x82767000 0xf9060 0x2aa 0x870a5000 0xfcaf8 0x2cc 0x8b9e3000 0x100590 0x2ef 0x90321000 0x104028 0x312 0x927c0000 0x1053b0 0x322>; | |
| qcom,speed1-pvs2-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xdbba0 0x4c 0x14997000 0xdbba0 0x57 0x192d5000 0xdbba0 0x6c 0x1dc13000 0xde2b0 0x81 0x22551000 0xe09c0 0x96 0x26e8f000 0xe30d0 0xab 0x2b7cd000 0xe57e0 0xc1 0x3010b000 0xe7ef0 0xd7 0x34a49000 0xea600 0xed 0x39387000 0xecd10 0x104 0x3dcc5000 0xef420 0x11a 0x42603000 0xf1b30 0x132 0x46f41000 0xf4240 0x14a 0x4b87f000 0xf6950 0x162 0x501bd000 0xf9060 0x17a 0x54afb000 0xfcaf8 0x194 0x59439000 0x100590 0x1af 0x5dd77000 0x104028 0x1ca 0x626b5000 0x107ac0 0x1e6 0x66ff3000 0x10b558 0x203 0x6b931000 0x10eff0 0x21f 0x7026f000 0x112a88 0x23c 0x74bad000 0x116520 0x25c 0x794eb000 0x119fb8 0x27c 0x7de29000 0x11da50 0x29d 0x802c8000 0x1214e8 0x2bf 0x82767000 0x1214e8 0x2bf 0x870a5000 0x124f80 0x2e2>; | |
| qcom,speed1-pvs5-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb1008 0x4a 0x14997000 0xb1008 0x55 0x192d5000 0xb1008 0x68 0x1dc13000 0xb1008 0x7c 0x22551000 0xb1008 0x90 0x26e8f000 0xb3718 0xa4 0x2b7cd000 0xb5e28 0xb8 0x3010b000 0xb8538 0xce 0x34a49000 0xbac48 0xe3 0x39387000 0xbd358 0xf9 0x3dcc5000 0xbfa68 0x10f 0x42603000 0xc2178 0x127 0x46f41000 0xc4888 0x13e 0x4b87f000 0xc6f98 0x156 0x501bd000 0xc96a8 0x16d 0x54afb000 0xcbdb8 0x188 0x59439000 0xce4c8 0x1a0 0x5dd77000 0xd0bd8 0x1ba 0x626b5000 0xd32e8 0x1d5 0x66ff3000 0xd59f8 0x1f1 0x6b931000 0xd8108 0x20d 0x7026f000 0xda818 0x22a 0x74bad000 0xdcf28 0x247 0x794eb000 0xdf638 0x265 0x7de29000 0xe30d0 0x282 0x802c8000 0xe57e0 0x297 0x82767000 0xe57e0 0x2a3 0x870a5000 0xe7ef0 0x2c4>; | |
| qcom,speed3-pvs6-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbe6e0 0xbd 0x3010b000 0xc0df0 0xd3 0x34a49000 0xc3500 0xe9 0x39387000 0xc5c10 0x100 0x3dcc5000 0xc8320 0x116 0x42603000 0xcaa30 0x12d 0x46f41000 0xcd140 0x144 0x4b87f000 0xcf850 0x15c 0x501bd000 0xd1f60 0x174 0x54afb000 0xd4670 0x18c 0x59439000 0xd6d80 0x1a5 0x5dd77000 0xd9490 0x1be 0x626b5000 0xdcf28 0x1d9 0x66ff3000 0xe09c0 0x1f5 0x6b931000 0xe4458 0x211 0x7026f000 0xe7ef0 0x22e 0x74bad000 0xeb988 0x24c 0x794eb000 0xef420 0x269 0x7de29000 0xf2eb8 0x289 0x802c8000 0xf6950 0x2aa 0x82767000 0xf6950 0x2aa 0x870a5000 0xfa3e8 0x2cc 0x8b9e3000 0xfde80 0x2ef 0x90321000 0x101918 0x312 0x927c0000 0x102ca0 0x322>; | |
| cpu0-supply = <0x59>; | |
| qcom,speed3-pvs0-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc5c10 0x7e 0x22551000 0xc8320 0x93 0x26e8f000 0xcaa30 0xa8 0x2b7cd000 0xcd140 0xbd 0x3010b000 0xcf850 0xd3 0x34a49000 0xd1f60 0xe9 0x39387000 0xd4670 0x100 0x3dcc5000 0xd6d80 0x116 0x42603000 0xd9490 0x12d 0x46f41000 0xdbba0 0x144 0x4b87f000 0xde2b0 0x15c 0x501bd000 0xe09c0 0x174 0x54afb000 0xe30d0 0x18c 0x59439000 0xe57e0 0x1a5 0x5dd77000 0xe7ef0 0x1be 0x626b5000 0xeb988 0x1d9 0x66ff3000 0xef420 0x1f5 0x6b931000 0xf2eb8 0x211 0x7026f000 0xf6950 0x22e 0x74bad000 0xfa3e8 0x24c 0x794eb000 0xfde80 0x269 0x7de29000 0x101918 0x289 0x802c8000 0x1053b0 0x2aa 0x82767000 0x1053b0 0x2aa 0x870a5000 0x108e48 0x2cc 0x8b9e3000 0x10c8e0 0x2ef 0x90321000 0x110378 0x312 0x927c0000 0x111700 0x322>; | |
| qcom,speed1-pvs13-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xdbba0 0x4c 0x14997000 0xdbba0 0x57 0x192d5000 0xdbba0 0x6c 0x1dc13000 0xdbba0 0x81 0x22551000 0xdbba0 0x96 0x26e8f000 0xdbba0 0xab 0x2b7cd000 0xdbba0 0xc1 0x3010b000 0xdbba0 0xd7 0x34a49000 0xdbba0 0xed 0x39387000 0xdbba0 0x104 0x3dcc5000 0xdcf28 0x11a 0x42603000 0xdf638 0x132 0x46f41000 0xe1d48 0x14a 0x4b87f000 0xe4458 0x162 0x501bd000 0xe6b68 0x17a 0x54afb000 0xe9278 0x194 0x59439000 0xeb988 0x1af 0x5dd77000 0xee098 0x1ca 0x626b5000 0xf07a8 0x1e6 0x66ff3000 0xf2eb8 0x203 0x6b931000 0xf55c8 0x21f 0x7026f000 0xf7cd8 0x23c 0x74bad000 0xfb770 0x25c 0x794eb000 0xff208 0x27c 0x7de29000 0x102ca0 0x29d 0x802c8000 0x106738 0x2bf 0x82767000 0x106738 0x2bf 0x870a5000 0x10a1d0 0x2e2>; | |
| qcom,speed3-pvs15-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4c 0x14997000 0xb71b0 0x57 0x192d5000 0xb71b0 0x6a 0x1dc13000 0xb71b0 0x7e 0x22551000 0xb71b0 0x93 0x26e8f000 0xb71b0 0xa8 0x2b7cd000 0xb71b0 0xbd 0x3010b000 0xb71b0 0xd3 0x34a49000 0xb8538 0xe9 0x39387000 0xb98c0 0x100 0x3dcc5000 0xbbfd0 0x116 0x42603000 0xbe6e0 0x12d 0x46f41000 0xc0df0 0x144 0x4b87f000 0xc3500 0x15c 0x501bd000 0xc5c10 0x174 0x54afb000 0xc8320 0x18c 0x59439000 0xcaa30 0x1a5 0x5dd77000 0xcd140 0x1be 0x626b5000 0xcf850 0x1d9 0x66ff3000 0xd1f60 0x1f5 0x6b931000 0xd4670 0x211 0x7026f000 0xd6d80 0x22e 0x74bad000 0xd9490 0x24c 0x794eb000 0xdbba0 0x269 0x7de29000 0xde2b0 0x289 0x802c8000 0xe09c0 0x2aa 0x82767000 0xe09c0 0x2aa 0x870a5000 0xe4458 0x2cc 0x8b9e3000 0xe7ef0 0x2ef 0x90321000 0xeb988 0x312 0x927c0000 0xecd10 0x322>; | |
| qcom,speed1-pvs0-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4a 0x14997000 0xbd358 0x55 0x192d5000 0xbd358 0x68 0x1dc13000 0xbe6e0 0x7c 0x22551000 0xc0df0 0x90 0x26e8f000 0xc3500 0xa4 0x2b7cd000 0xc5c10 0xb8 0x3010b000 0xc8320 0xce 0x34a49000 0xcaa30 0xe3 0x39387000 0xcd140 0xf9 0x3dcc5000 0xcf850 0x10f 0x42603000 0xd32e8 0x127 0x46f41000 0xd59f8 0x13e 0x4b87f000 0xd9490 0x156 0x501bd000 0xdbba0 0x16d 0x54afb000 0xdf638 0x188 0x59439000 0xe1d48 0x1a0 0x5dd77000 0xe57e0 0x1ba 0x626b5000 0xe9278 0x1d5 0x66ff3000 0xecd10 0x1f1 0x6b931000 0xf07a8 0x20d 0x7026f000 0xf4240 0x22a 0x74bad000 0xf7cd8 0x247 0x794eb000 0xfb770 0x265 0x7de29000 0xff208 0x282 0x802c8000 0x102ca0 0x297 0x82767000 0x102ca0 0x2a3 0x870a5000 0x106738 0x2c4>; | |
| qcom,speed1-pvs5-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xdbba0 0x4c 0x14997000 0xdbba0 0x57 0x192d5000 0xdbba0 0x6c 0x1dc13000 0xdcf28 0x81 0x22551000 0xdf638 0x96 0x26e8f000 0xe1d48 0xab 0x2b7cd000 0xe4458 0xc1 0x3010b000 0xe6b68 0xd7 0x34a49000 0xe9278 0xed 0x39387000 0xeb988 0x104 0x3dcc5000 0xee098 0x11a 0x42603000 0xef420 0x132 0x46f41000 0xef420 0x14a 0x4b87f000 0xef420 0x162 0x501bd000 0xf1b30 0x17a 0x54afb000 0xf55c8 0x194 0x59439000 0xf9060 0x1af 0x5dd77000 0xfcaf8 0x1ca 0x626b5000 0x100590 0x1e6 0x66ff3000 0x104028 0x203 0x6b931000 0x107ac0 0x21f 0x7026f000 0x10b558 0x23c 0x74bad000 0x10eff0 0x25c 0x794eb000 0x112a88 0x27c 0x7de29000 0x116520 0x29d 0x802c8000 0x119fb8 0x2bf 0x82767000 0x119fb8 0x2bf 0x870a5000 0x11da50 0x2e2>; | |
| qcom,speed0-pvs4-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x49 0x14997000 0xbd358 0x55 0x192d5000 0xbe6e0 0x68 0x1dc13000 0xc0df0 0x7c 0x22551000 0xc3500 0x90 0x26e8f000 0xc5c10 0xa5 0x2b7cd000 0xc8320 0xba 0x3010b000 0xcaa30 0xd0 0x34a49000 0xcd140 0xe5 0x39387000 0xcf850 0xfc 0x3dcc5000 0xd1f60 0x113 0x42603000 0xd4670 0x12a 0x46f41000 0xd6d80 0x141 0x4b87f000 0xda818 0x15a 0x501bd000 0xde2b0 0x173 0x54afb000 0xe09c0 0x18d 0x59439000 0xe30d0 0x1a7 0x5dd77000 0xe57e0 0x1c2 0x626b5000 0xe7ef0 0x1dd 0x66ff3000 0xea600 0x1fa 0x6b931000 0xee098 0x218 0x7026f000 0xf07a8 0x237 0x74bad000 0xf4240 0x256>; | |
| qcom,l2-fmax = <0x0 0x0 0x22551000 0x4 0x3dcc5000 0x5 0x66ff3000 0x7>; | |
| qcom,speed2-pvs5-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x48 0x14997000 0xb71b0 0x53 0x192d5000 0xb71b0 0x66 0x1dc13000 0xb71b0 0x79 0x22551000 0xb98c0 0x8d 0x26e8f000 0xbbfd0 0xa1 0x2b7cd000 0xbe6e0 0xb5 0x3010b000 0xc0df0 0xca 0x34a49000 0xc3500 0xdf 0x39387000 0xc5c10 0xf5 0x3dcc5000 0xc8320 0x10b 0x42603000 0xcaa30 0x121 0x46f41000 0xcd140 0x139 0x4b87f000 0xcf850 0x150 0x501bd000 0xd1f60 0x168 0x54afb000 0xd4670 0x17f 0x59439000 0xd6d80 0x199 0x5dd77000 0xd9490 0x1b3 0x626b5000 0xdbba0 0x1cd 0x66ff3000 0xde2b0 0x1e8 0x6b931000 0xe09c0 0x204 0x7026f000 0xe30d0 0x21f 0x74bad000 0xe57e0 0x23d 0x794eb000 0xe9278 0x25c 0x7de29000 0xeb988 0x27c 0x802c8000 0xee098 0x290>; | |
| qcom,speed1-pvs8-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xdbba0 0x4c 0x14997000 0xdbba0 0x57 0x192d5000 0xdbba0 0x6c 0x1dc13000 0xdcf28 0x81 0x22551000 0xdf638 0x96 0x26e8f000 0xe1d48 0xab 0x2b7cd000 0xe4458 0xc1 0x3010b000 0xe6b68 0xd7 0x34a49000 0xe7ef0 0xed 0x39387000 0xe7ef0 0x104 0x3dcc5000 0xe7ef0 0x11a 0x42603000 0xe7ef0 0x132 0x46f41000 0xe7ef0 0x14a 0x4b87f000 0xea600 0x162 0x501bd000 0xecd10 0x17a 0x54afb000 0xef420 0x194 0x59439000 0xf1b30 0x1af 0x5dd77000 0xf55c8 0x1ca 0x626b5000 0xf9060 0x1e6 0x66ff3000 0xfcaf8 0x203 0x6b931000 0x100590 0x21f 0x7026f000 0x104028 0x23c 0x74bad000 0x107ac0 0x25c 0x794eb000 0x10b558 0x27c 0x7de29000 0x10eff0 0x29d 0x802c8000 0x112a88 0x2bf 0x82767000 0x112a88 0x2bf 0x870a5000 0x116520 0x2e2>; | |
| qcom,speed3-pvs4-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7d 0x22551000 0xbd358 0x91 0x26e8f000 0xbd358 0xa5 0x2b7cd000 0xbd358 0xba 0x3010b000 0xbd358 0xd0 0x34a49000 0xbd358 0xe5 0x39387000 0xbd358 0xfb 0x3dcc5000 0xbd358 0x111 0x42603000 0xbd358 0x128 0x46f41000 0xbe6e0 0x13f 0x4b87f000 0xc0df0 0x156 0x501bd000 0xc3500 0x16d 0x54afb000 0xc5c10 0x186 0x59439000 0xc8320 0x19f 0x5dd77000 0xcaa30 0x1b7 0x626b5000 0xce4c8 0x1d1 0x66ff3000 0xd1f60 0x1ed 0x6b931000 0xd59f8 0x209 0x7026f000 0xd9490 0x225 0x74bad000 0xdcf28 0x243 0x794eb000 0xe09c0 0x260 0x7de29000 0xe4458 0x27e 0x802c8000 0xe7ef0 0x29b 0x82767000 0xe7ef0 0x29b 0x870a5000 0xeb988 0x2bc 0x8b9e3000 0xef420 0x2de 0x90321000 0xf2eb8 0x301 0x927c0000 0xf4240 0x311>; | |
| qcom,speed3-pvs3-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7d 0x22551000 0xbd358 0x91 0x26e8f000 0xbd358 0xa5 0x2b7cd000 0xbd358 0xba 0x3010b000 0xbd358 0xd0 0x34a49000 0xbd358 0xe5 0x39387000 0xbe6e0 0xfb 0x3dcc5000 0xbfa68 0x111 0x42603000 0xc2178 0x128 0x46f41000 0xc4888 0x13f 0x4b87f000 0xc6f98 0x156 0x501bd000 0xc96a8 0x16d 0x54afb000 0xcbdb8 0x186 0x59439000 0xce4c8 0x19f 0x5dd77000 0xd0bd8 0x1b7 0x626b5000 0xd4670 0x1d1 0x66ff3000 0xd8108 0x1ed 0x6b931000 0xdbba0 0x209 0x7026f000 0xdf638 0x225 0x74bad000 0xe30d0 0x243 0x794eb000 0xe6b68 0x260 0x7de29000 0xea600 0x27e 0x802c8000 0xee098 0x29b 0x82767000 0xee098 0x29b 0x870a5000 0xf1b30 0x2bc 0x8b9e3000 0xf55c8 0x2de 0x90321000 0xf9060 0x301 0x927c0000 0xfa3e8 0x311>; | |
| qcom,speed0-pvs5-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x49 0x14997000 0xb98c0 0x55 0x192d5000 0xbbfd0 0x68 0x1dc13000 0xbe6e0 0x7c 0x22551000 0xc0df0 0x90 0x26e8f000 0xc3500 0xa5 0x2b7cd000 0xc5c10 0xba 0x3010b000 0xc8320 0xd0 0x34a49000 0xcaa30 0xe5 0x39387000 0xcd140 0xfc 0x3dcc5000 0xcf850 0x113 0x42603000 0xd1f60 0x12a 0x46f41000 0xd4670 0x141 0x4b87f000 0xd6d80 0x15a 0x501bd000 0xd9490 0x173 0x54afb000 0xdbba0 0x18d 0x59439000 0xde2b0 0x1a7 0x5dd77000 0xe09c0 0x1c2 0x626b5000 0xe30d0 0x1dd 0x66ff3000 0xe57e0 0x1fa 0x6b931000 0xe9278 0x218 0x7026f000 0xeb988 0x237 0x74bad000 0xee098 0x256>; | |
| qcom,pvs-config-ver = <0x1>; | |
| qcom,speed1-pvs0-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xdbba0 0x4c 0x14997000 0xde2b0 0x57 0x192d5000 0xe09c0 0x6c 0x1dc13000 0xe30d0 0x81 0x22551000 0xe57e0 0x96 0x26e8f000 0xe7ef0 0xab 0x2b7cd000 0xea600 0xc1 0x3010b000 0xecd10 0xd7 0x34a49000 0xef420 0xed 0x39387000 0xf1b30 0x104 0x3dcc5000 0xf4240 0x11a 0x42603000 0xf6950 0x132 0x46f41000 0xf9060 0x14a 0x4b87f000 0xfb770 0x162 0x501bd000 0xfde80 0x17a 0x54afb000 0x101918 0x194 0x59439000 0x1053b0 0x1af 0x5dd77000 0x108e48 0x1ca 0x626b5000 0x10c8e0 0x1e6 0x66ff3000 0x110378 0x203 0x6b931000 0x113e10 0x21f 0x7026f000 0x1178a8 0x23c 0x74bad000 0x11b340 0x25c 0x794eb000 0x11edd8 0x27c 0x7de29000 0x122870 0x29d 0x802c8000 0x123bf8 0x2bf 0x82767000 0x123bf8 0x2bf 0x870a5000 0x124f80 0x2e2>; | |
| qcom,speed3-pvs6-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4c 0x14997000 0xb71b0 0x57 0x192d5000 0xb71b0 0x6a 0x1dc13000 0xb71b0 0x7d 0x22551000 0xb71b0 0x91 0x26e8f000 0xb71b0 0xa5 0x2b7cd000 0xb71b0 0xba 0x3010b000 0xb71b0 0xd0 0x34a49000 0xb71b0 0xe5 0x39387000 0xb71b0 0xfb 0x3dcc5000 0xb71b0 0x111 0x42603000 0xb71b0 0x128 0x46f41000 0xb71b0 0x13f 0x4b87f000 0xb8538 0x156 0x501bd000 0xbac48 0x16d 0x54afb000 0xbd358 0x186 0x59439000 0xbfa68 0x19f 0x5dd77000 0xc2178 0x1b7 0x626b5000 0xc4888 0x1d1 0x66ff3000 0xc6f98 0x1ed 0x6b931000 0xc96a8 0x209 0x7026f000 0xcd140 0x225 0x74bad000 0xd0bd8 0x243 0x794eb000 0xd4670 0x260 0x7de29000 0xd8108 0x27e 0x802c8000 0xdbba0 0x29b 0x82767000 0xdbba0 0x29b 0x870a5000 0xdf638 0x2bc 0x8b9e3000 0xe30d0 0x2de 0x90321000 0xe6b68 0x301 0x927c0000 0xe7ef0 0x311>; | |
| qcom,speed1-pvs1-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xdbba0 0x4c 0x14997000 0xdbba0 0x57 0x192d5000 0xde2b0 0x6c 0x1dc13000 0xe09c0 0x81 0x22551000 0xe30d0 0x96 0x26e8f000 0xe57e0 0xab 0x2b7cd000 0xe7ef0 0xc1 0x3010b000 0xea600 0xd7 0x34a49000 0xecd10 0xed 0x39387000 0xef420 0x104 0x3dcc5000 0xf1b30 0x11a 0x42603000 0xf4240 0x132 0x46f41000 0xf6950 0x14a 0x4b87f000 0xf9060 0x162 0x501bd000 0xfb770 0x17a 0x54afb000 0xff208 0x194 0x59439000 0x102ca0 0x1af 0x5dd77000 0x106738 0x1ca 0x626b5000 0x10a1d0 0x1e6 0x66ff3000 0x10dc68 0x203 0x6b931000 0x111700 0x21f 0x7026f000 0x115198 0x23c 0x74bad000 0x118c30 0x25c 0x794eb000 0x11c6c8 0x27c 0x7de29000 0x120160 0x29d 0x802c8000 0x123bf8 0x2bf 0x82767000 0x123bf8 0x2bf 0x870a5000 0x124f80 0x2e2>; | |
| qcom,speed0-pvs3-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x49 0x14997000 0xbe6e0 0x55 0x192d5000 0xc0df0 0x68 0x1dc13000 0xc3500 0x7c 0x22551000 0xc5c10 0x90 0x26e8f000 0xc8320 0xa5 0x2b7cd000 0xcaa30 0xba 0x3010b000 0xcd140 0xd0 0x34a49000 0xcf850 0xe5 0x39387000 0xd1f60 0xfc 0x3dcc5000 0xd59f8 0x113 0x42603000 0xd8108 0x12a 0x46f41000 0xda818 0x141 0x4b87f000 0xde2b0 0x15a 0x501bd000 0xe1d48 0x173 0x54afb000 0xe4458 0x18d 0x59439000 0xe7ef0 0x1a7 0x5dd77000 0xea600 0x1c2 0x626b5000 0xecd10 0x1dd 0x66ff3000 0xf07a8 0x1fa 0x6b931000 0xf2eb8 0x218 0x7026f000 0xf6950 0x237 0x74bad000 0xfa3e8 0x256>; | |
| qcom,speed2-pvs1-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x48 0x14997000 0xc3500 0x53 0x192d5000 0xc3500 0x66 0x1dc13000 0xc3500 0x79 0x22551000 0xc5c10 0x8d 0x26e8f000 0xc8320 0xa1 0x2b7cd000 0xcaa30 0xb5 0x3010b000 0xcd140 0xca 0x34a49000 0xcf850 0xdf 0x39387000 0xd1f60 0xf5 0x3dcc5000 0xd59f8 0x10b 0x42603000 0xd8108 0x121 0x46f41000 0xda818 0x139 0x4b87f000 0xde2b0 0x150 0x501bd000 0xe09c0 0x168 0x54afb000 0xe30d0 0x17f 0x59439000 0xe6b68 0x199 0x5dd77000 0xea600 0x1b3 0x626b5000 0xee098 0x1cd 0x66ff3000 0xf1b30 0x1e8 0x6b931000 0xf55c8 0x204 0x7026f000 0xf9060 0x21f 0x74bad000 0xfb770 0x23d 0x794eb000 0xff208 0x25c 0x7de29000 0x102ca0 0x27c 0x802c8000 0x106738 0x290>; | |
| qcom,speed3-pvs8-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbd358 0xbd 0x3010b000 0xbe6e0 0xd3 0x34a49000 0xbfa68 0xe9 0x39387000 0xc2178 0x100 0x3dcc5000 0xc4888 0x116 0x42603000 0xc6f98 0x12d 0x46f41000 0xc96a8 0x144 0x4b87f000 0xcbdb8 0x15c 0x501bd000 0xce4c8 0x174 0x54afb000 0xd0bd8 0x18c 0x59439000 0xd32e8 0x1a5 0x5dd77000 0xd59f8 0x1be 0x626b5000 0xd8108 0x1d9 0x66ff3000 0xdbba0 0x1f5 0x6b931000 0xdf638 0x211 0x7026f000 0xe30d0 0x22e 0x74bad000 0xe6b68 0x24c 0x794eb000 0xea600 0x269 0x7de29000 0xee098 0x289 0x802c8000 0xf1b30 0x2aa 0x82767000 0xf1b30 0x2aa 0x870a5000 0xf55c8 0x2cc 0x8b9e3000 0xf9060 0x2ef 0x90321000 0xfcaf8 0x312 0x927c0000 0xfde80 0x322>; | |
| qcom,speed3-pvs1-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc3500 0x7d 0x22551000 0xc3500 0x91 0x26e8f000 0xc3500 0xa5 0x2b7cd000 0xc3500 0xba 0x3010b000 0xc4888 0xd0 0x34a49000 0xc6f98 0xe5 0x39387000 0xc96a8 0xfb 0x3dcc5000 0xcbdb8 0x111 0x42603000 0xce4c8 0x128 0x46f41000 0xd0bd8 0x13f 0x4b87f000 0xd32e8 0x156 0x501bd000 0xd59f8 0x16d 0x54afb000 0xd8108 0x186 0x59439000 0xda818 0x19f 0x5dd77000 0xdcf28 0x1b7 0x626b5000 0xe09c0 0x1d1 0x66ff3000 0xe4458 0x1ed 0x6b931000 0xe7ef0 0x209 0x7026f000 0xeb988 0x225 0x74bad000 0xef420 0x243 0x794eb000 0xf2eb8 0x260 0x7de29000 0xf6950 0x27e 0x802c8000 0xfa3e8 0x29b 0x82767000 0xfa3e8 0x29b 0x870a5000 0xfde80 0x2bc 0x8b9e3000 0x101918 0x2de 0x90321000 0x1053b0 0x301 0x927c0000 0x106738 0x311>; | |
| qcom,speed0-pvs2-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbfa68 0x49 0x14997000 0xc2178 0x55 0x192d5000 0xc4888 0x68 0x1dc13000 0xc6f98 0x7c 0x22551000 0xc96a8 0x90 0x26e8f000 0xcbdb8 0xa5 0x2b7cd000 0xce4c8 0xba 0x3010b000 0xd0bd8 0xd0 0x34a49000 0xd32e8 0xe5 0x39387000 0xd59f8 0xfc 0x3dcc5000 0xd9490 0x113 0x42603000 0xdbba0 0x12a 0x46f41000 0xde2b0 0x141 0x4b87f000 0xe1d48 0x15a 0x501bd000 0xe57e0 0x173 0x54afb000 0xe9278 0x18d 0x59439000 0xecd10 0x1a7 0x5dd77000 0xef420 0x1c2 0x626b5000 0xf2eb8 0x1dd 0x66ff3000 0xf55c8 0x1fa 0x6b931000 0xf9060 0x218 0x7026f000 0xfcaf8 0x237 0x74bad000 0x100590 0x256>; | |
| qcom,speed1-pvs1-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4a 0x14997000 0xbd358 0x55 0x192d5000 0xbd358 0x68 0x1dc13000 0xbd358 0x7c 0x22551000 0xbd358 0x90 0x26e8f000 0xbfa68 0xa4 0x2b7cd000 0xc2178 0xb8 0x3010b000 0xc4888 0xce 0x34a49000 0xc6f98 0xe3 0x39387000 0xc96a8 0xf9 0x3dcc5000 0xcbdb8 0x10f 0x42603000 0xcf850 0x127 0x46f41000 0xd1f60 0x13e 0x4b87f000 0xd4670 0x156 0x501bd000 0xd8108 0x16d 0x54afb000 0xda818 0x188 0x59439000 0xdcf28 0x1a0 0x5dd77000 0xe09c0 0x1ba 0x626b5000 0xe4458 0x1d5 0x66ff3000 0xe7ef0 0x1f1 0x6b931000 0xeb988 0x20d 0x7026f000 0xef420 0x22a 0x74bad000 0xf2eb8 0x247 0x794eb000 0xf55c8 0x265 0x7de29000 0xf9060 0x282 0x802c8000 0xfcaf8 0x297 0x82767000 0xfcaf8 0x2a3 0x870a5000 0x100590 0x2c4>; | |
| qcom,speed3-pvs14-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4c 0x14997000 0xb71b0 0x57 0x192d5000 0xb71b0 0x6a 0x1dc13000 0xb71b0 0x7e 0x22551000 0xb71b0 0x93 0x26e8f000 0xb71b0 0xa8 0x2b7cd000 0xb71b0 0xbd 0x3010b000 0xb71b0 0xd3 0x34a49000 0xb8538 0xe9 0x39387000 0xbac48 0x100 0x3dcc5000 0xbd358 0x116 0x42603000 0xbfa68 0x12d 0x46f41000 0xc2178 0x144 0x4b87f000 0xc4888 0x15c 0x501bd000 0xc6f98 0x174 0x54afb000 0xc96a8 0x18c 0x59439000 0xcbdb8 0x1a5 0x5dd77000 0xce4c8 0x1be 0x626b5000 0xd0bd8 0x1d9 0x66ff3000 0xd32e8 0x1f5 0x6b931000 0xd59f8 0x211 0x7026f000 0xd8108 0x22e 0x74bad000 0xda818 0x24c 0x794eb000 0xdcf28 0x269 0x7de29000 0xdf638 0x289 0x802c8000 0xe30d0 0x2aa 0x82767000 0xe30d0 0x2aa 0x870a5000 0xe6b68 0x2cc 0x8b9e3000 0xea600 0x2ef 0x90321000 0xee098 0x312 0x927c0000 0xef420 0x322>; | |
| qcom,speed2-pvs0-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x48 0x14997000 0xc3500 0x53 0x192d5000 0xc4888 0x66 0x1dc13000 0xc6f98 0x79 0x22551000 0xc96a8 0x8d 0x26e8f000 0xcbdb8 0xa1 0x2b7cd000 0xce4c8 0xb5 0x3010b000 0xd0bd8 0xca 0x34a49000 0xd32e8 0xdf 0x39387000 0xd59f8 0xf5 0x3dcc5000 0xd9490 0x10b 0x42603000 0xdbba0 0x121 0x46f41000 0xdf638 0x139 0x4b87f000 0xe1d48 0x150 0x501bd000 0xe57e0 0x168 0x54afb000 0xe7ef0 0x17f 0x59439000 0xeb988 0x199 0x5dd77000 0xef420 0x1b3 0x626b5000 0xf2eb8 0x1cd 0x66ff3000 0xf6950 0x1e8 0x6b931000 0xfa3e8 0x204 0x7026f000 0xfde80 0x21f 0x74bad000 0x101918 0x23d 0x794eb000 0x1053b0 0x25c 0x7de29000 0x108e48 0x27c 0x802c8000 0x10c8e0 0x290>; | |
| qcom,speed1-pvs4-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4a 0x14997000 0xb71b0 0x55 0x192d5000 0xb71b0 0x68 0x1dc13000 0xb71b0 0x7c 0x22551000 0xb71b0 0x90 0x26e8f000 0xb71b0 0xa4 0x2b7cd000 0xb8538 0xb8 0x3010b000 0xbac48 0xce 0x34a49000 0xbd358 0xe3 0x39387000 0xbfa68 0xf9 0x3dcc5000 0xc2178 0x10f 0x42603000 0xc4888 0x127 0x46f41000 0xc6f98 0x13e 0x4b87f000 0xc96a8 0x156 0x501bd000 0xcbdb8 0x16d 0x54afb000 0xce4c8 0x188 0x59439000 0xd0bd8 0x1a0 0x5dd77000 0xd4670 0x1ba 0x626b5000 0xd8108 0x1d5 0x66ff3000 0xda818 0x1f1 0x6b931000 0xdcf28 0x20d 0x7026f000 0xdf638 0x22a 0x74bad000 0xe1d48 0x247 0x794eb000 0xe4458 0x265 0x7de29000 0xe7ef0 0x282 0x802c8000 0xea600 0x297 0x82767000 0xea600 0x2a3 0x870a5000 0xee098 0x2c4>; | |
| qcom,speed3-pvs5-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4c 0x14997000 0xb71b0 0x57 0x192d5000 0xb71b0 0x6a 0x1dc13000 0xb71b0 0x7d 0x22551000 0xb71b0 0x91 0x26e8f000 0xb71b0 0xa5 0x2b7cd000 0xb71b0 0xba 0x3010b000 0xb71b0 0xd0 0x34a49000 0xb71b0 0xe5 0x39387000 0xb71b0 0xfb 0x3dcc5000 0xb71b0 0x111 0x42603000 0xb71b0 0x128 0x46f41000 0xb98c0 0x13f 0x4b87f000 0xbbfd0 0x156 0x501bd000 0xbe6e0 0x16d 0x54afb000 0xc0df0 0x186 0x59439000 0xc3500 0x19f 0x5dd77000 0xc5c10 0x1b7 0x626b5000 0xc8320 0x1d1 0x66ff3000 0xcbdb8 0x1ed 0x6b931000 0xcf850 0x209 0x7026f000 0xd32e8 0x225 0x74bad000 0xd6d80 0x243 0x794eb000 0xda818 0x260 0x7de29000 0xde2b0 0x27e 0x802c8000 0xe1d48 0x29b 0x82767000 0xe1d48 0x29b 0x870a5000 0xe57e0 0x2bc 0x8b9e3000 0xe9278 0x2de 0x90321000 0xecd10 0x301 0x927c0000 0xee098 0x311>; | |
| qcom,hfpll-config-val = <0x4d0405d>; | |
| qcom,speed1-pvs12-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xdbba0 0x4c 0x14997000 0xdbba0 0x57 0x192d5000 0xdbba0 0x6c 0x1dc13000 0xdcf28 0x81 0x22551000 0xde2b0 0x96 0x26e8f000 0xde2b0 0xab 0x2b7cd000 0xde2b0 0xc1 0x3010b000 0xde2b0 0xd7 0x34a49000 0xde2b0 0xed 0x39387000 0xde2b0 0x104 0x3dcc5000 0xde2b0 0x11a 0x42603000 0xe09c0 0x132 0x46f41000 0xe30d0 0x14a 0x4b87f000 0xe57e0 0x162 0x501bd000 0xe7ef0 0x17a 0x54afb000 0xea600 0x194 0x59439000 0xecd10 0x1af 0x5dd77000 0xef420 0x1ca 0x626b5000 0xf1b30 0x1e6 0x66ff3000 0xf4240 0x203 0x6b931000 0xf6950 0x21f 0x7026f000 0xfa3e8 0x23c 0x74bad000 0xfde80 0x25c 0x794eb000 0x101918 0x27c 0x7de29000 0x1053b0 0x29d 0x802c8000 0x108e48 0x2bf 0x82767000 0x108e48 0x2bf 0x870a5000 0x10c8e0 0x2e2>; | |
| qcom,speed1-pvs4-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xdbba0 0x4c 0x14997000 0xdbba0 0x57 0x192d5000 0xdbba0 0x6c 0x1dc13000 0xdcf28 0x81 0x22551000 0xdf638 0x96 0x26e8f000 0xe1d48 0xab 0x2b7cd000 0xe4458 0xc1 0x3010b000 0xe6b68 0xd7 0x34a49000 0xe9278 0xed 0x39387000 0xeb988 0x104 0x3dcc5000 0xee098 0x11a 0x42603000 0xf1b30 0x132 0x46f41000 0xf1b30 0x14a 0x4b87f000 0xf1b30 0x162 0x501bd000 0xf4240 0x17a 0x54afb000 0xf7cd8 0x194 0x59439000 0xfb770 0x1af 0x5dd77000 0xff208 0x1ca 0x626b5000 0x102ca0 0x1e6 0x66ff3000 0x106738 0x203 0x6b931000 0x10a1d0 0x21f 0x7026f000 0x10dc68 0x23c 0x74bad000 0x111700 0x25c 0x794eb000 0x115198 0x27c 0x7de29000 0x118c30 0x29d 0x802c8000 0x11c6c8 0x2bf 0x82767000 0x11c6c8 0x2bf 0x870a5000 0x120160 0x2e2>; | |
| qcom,speed1-pvs11-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xdbba0 0x4c 0x14997000 0xdbba0 0x57 0x192d5000 0xdbba0 0x6c 0x1dc13000 0xdcf28 0x81 0x22551000 0xdf638 0x96 0x26e8f000 0xe09c0 0xab 0x2b7cd000 0xe09c0 0xc1 0x3010b000 0xe09c0 0xd7 0x34a49000 0xe09c0 0xed 0x39387000 0xe09c0 0x104 0x3dcc5000 0xe09c0 0x11a 0x42603000 0xe4458 0x132 0x46f41000 0xe57e0 0x14a 0x4b87f000 0xe7ef0 0x162 0x501bd000 0xea600 0x17a 0x54afb000 0xecd10 0x194 0x59439000 0xef420 0x1af 0x5dd77000 0xf07a8 0x1ca 0x626b5000 0xf2eb8 0x1e6 0x66ff3000 0xf55c8 0x203 0x6b931000 0xf9060 0x21f 0x7026f000 0xfcaf8 0x23c 0x74bad000 0x100590 0x25c 0x794eb000 0x104028 0x27c 0x7de29000 0x107ac0 0x29d 0x802c8000 0x10b558 0x2bf 0x82767000 0x10b558 0x2bf 0x870a5000 0x10eff0 0x2e2>; | |
| hfpll-analog-supply = <0x5e>; | |
| qcom,hfpll-user-vco-mask = <0x100000>; | |
| qcom,speed3-pvs2-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc3500 0x7e 0x22551000 0xc3500 0x93 0x26e8f000 0xc5c10 0xa8 0x2b7cd000 0xc8320 0xbd 0x3010b000 0xcaa30 0xd3 0x34a49000 0xcd140 0xe9 0x39387000 0xcf850 0x100 0x3dcc5000 0xd1f60 0x116 0x42603000 0xd4670 0x12d 0x46f41000 0xd6d80 0x144 0x4b87f000 0xd9490 0x15c 0x501bd000 0xdbba0 0x174 0x54afb000 0xde2b0 0x18c 0x59439000 0xe09c0 0x1a5 0x5dd77000 0xe30d0 0x1be 0x626b5000 0xe6b68 0x1d9 0x66ff3000 0xea600 0x1f5 0x6b931000 0xee098 0x211 0x7026f000 0xf1b30 0x22e 0x74bad000 0xf55c8 0x24c 0x794eb000 0xf9060 0x269 0x7de29000 0xfcaf8 0x289 0x802c8000 0x100590 0x2aa 0x82767000 0x100590 0x2aa 0x870a5000 0x104028 0x2cc 0x8b9e3000 0x107ac0 0x2ef 0x90321000 0x10b558 0x312 0x927c0000 0x10c8e0 0x322>; | |
| l2-dig-supply = <0x5d>; | |
| qcom,speed2-pvs3-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x48 0x14997000 0xbd358 0x53 0x192d5000 0xbd358 0x66 0x1dc13000 0xbd358 0x79 0x22551000 0xbe6e0 0x8d 0x26e8f000 0xc0df0 0xa1 0x2b7cd000 0xc3500 0xb5 0x3010b000 0xc5c10 0xca 0x34a49000 0xc8320 0xdf 0x39387000 0xcaa30 0xf5 0x3dcc5000 0xcd140 0x10b 0x42603000 0xcf850 0x121 0x46f41000 0xd1f60 0x139 0x4b87f000 0xd59f8 0x150 0x501bd000 0xd8108 0x168 0x54afb000 0xda818 0x17f 0x59439000 0xde2b0 0x199 0x5dd77000 0xe1d48 0x1b3 0x626b5000 0xe4458 0x1cd 0x66ff3000 0xe7ef0 0x1e8 0x6b931000 0xea600 0x204 0x7026f000 0xecd10 0x21f 0x74bad000 0xf07a8 0x23d 0x794eb000 0xf2eb8 0x25c 0x7de29000 0xf6950 0x27c 0x802c8000 0xfa3e8 0x290>; | |
| qcom,speed0-pvs6-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x49 0x14997000 0xb71b0 0x55 0x192d5000 0xb98c0 0x68 0x1dc13000 0xbbfd0 0x7c 0x22551000 0xbe6e0 0x90 0x26e8f000 0xc0df0 0xa5 0x2b7cd000 0xc3500 0xba 0x3010b000 0xc5c10 0xd0 0x34a49000 0xc8320 0xe5 0x39387000 0xcaa30 0xfc 0x3dcc5000 0xcd140 0x113 0x42603000 0xcf850 0x12a 0x46f41000 0xd1f60 0x141 0x4b87f000 0xd4670 0x15a 0x501bd000 0xd59f8 0x173 0x54afb000 0xd8108 0x18d 0x59439000 0xda818 0x1a7 0x5dd77000 0xdcf28 0x1c2 0x626b5000 0xdf638 0x1dd 0x66ff3000 0xe09c0 0x1fa 0x6b931000 0xe30d0 0x218 0x7026f000 0xe57e0 0x237 0x74bad000 0xe7ef0 0x256>; | |
| hfpll-dig-supply = <0x5d>; | |
| }; | |
| qcom,spm@f90a9000 { | |
| #size-cells = <0x1>; | |
| qcom,saw2-avs-hysteresis = <0x0>; | |
| qcom,saw2-spm-cmd-spc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| #address-cells = <0x1>; | |
| qcom,saw2-spm-cmd-pc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| qcom,saw2-avs-dly = <0x0>; | |
| qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5b 03 d8 5b 0b 00 42 1b 0f]; | |
| reg = <0xf90a9000 0x1000>; | |
| qcom,saw2-ver-reg = <0xfd0>; | |
| qcom,saw2-spm-cmd-wfi = [03 0b 0f]; | |
| compatible = "qcom,spm-v2"; | |
| qcom,saw2-spm-ctl = <0x1>; | |
| qcom,saw2-spm-dly = <0x3c102800>; | |
| qcom,saw2-avs-limit = <0x0>; | |
| qcom,core-id = <0x2>; | |
| qcom,saw2-avs-ctl = <0x0>; | |
| qcom,saw2-cfg = <0x1>; | |
| }; | |
| qcom,gdsc@fc401ac4 { | |
| reg = <0xfc401ac4 0x4>; | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_pcie_0"; | |
| status = "disabled"; | |
| }; | |
| qcom,msm-pcm-voice { | |
| compatible = "qcom,msm-pcm-voice"; | |
| }; | |
| qcom,gdsc@fd8c36a4 { | |
| linux,phandle = <0x3>; | |
| reg = <0xfd8c36a4 0x4>; | |
| compatible = "qcom,gdsc"; | |
| qcom,clock-names = "core0_clk", "core1_clk", "csi0_clk", "csi1_clk", "cpp_clk"; | |
| phandle = <0x3>; | |
| regulator-name = "gdsc_vfe"; | |
| status = "ok"; | |
| }; | |
| qcom,msm-voip-dsp { | |
| compatible = "qcom,msm-voip-dsp"; | |
| }; | |
| qcom,msm-pcm-low-latency { | |
| qcom,msm-pcm-low-latency; | |
| qcom,latency-level = "regular"; | |
| qcom,msm-pcm-dsp-id = <0x1>; | |
| compatible = "qcom,msm-pcm-dsp"; | |
| }; | |
| msm-ocmem-noc@fc470000 { | |
| coresight-child-list = <0x18>; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x0>; | |
| qcom,qos-freq = <0x12c0>; | |
| qcom,ntieredslaves = <0x0>; | |
| qcom,hw-sel = "NoC"; | |
| reg = <0xfc470000 0x4000>; | |
| compatible = "msm-bus-fabric"; | |
| qcom,fabclk-active = "bus_a_clk"; | |
| qcom,rpm-en; | |
| coresight-child-ports = <0x4>; | |
| cell-id = <0xc00>; | |
| label = "msm_ocmem_noc"; | |
| coresight-id = <0x33>; | |
| qcom,fabclk-dual = "bus_clk"; | |
| coresight-name = "coresight-onoc"; | |
| fab-ocmem-vnoc { | |
| qcom,mas-hw-id = <0x36>; | |
| qcom,slv-hw-id = <0x4e>; | |
| qcom,gateway; | |
| cell-id = <0x1800>; | |
| label = "fab-ocmem-vnoc"; | |
| qcom,buswidth = <0x10>; | |
| }; | |
| mas-mdp-ocmem { | |
| qcom,mode = "Fixed"; | |
| qcom,perm-mode = "Fixed"; | |
| qcom,mas-hw-id = <0xe>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x2>; | |
| cell-id = <0x43>; | |
| label = "mas-mdp-ocmem"; | |
| }; | |
| mas-cnoc-onoc-cfg { | |
| qcom,mas-hw-id = <0xc>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x0>; | |
| cell-id = <0x47>; | |
| label = "mas-cnoc-onoc-cfg"; | |
| qcom,buswidth = <0x10>; | |
| }; | |
| mas-vfe-ocmem { | |
| qcom,mode = "Fixed"; | |
| qcom,perm-mode = "Fixed"; | |
| qcom,prio-rd = <0x1>; | |
| qcom,mas-hw-id = <0x11>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,qport = <0x4>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x5>; | |
| cell-id = <0x46>; | |
| label = "mas-vfe-ocmem"; | |
| qcom,prio-wr = <0x1>; | |
| }; | |
| mas-video-ocmem { | |
| qcom,mode = "Fixed"; | |
| qcom,perm-mode = "Fixed"; | |
| qcom,mas-hw-id = <0xf>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,qport = <0x2 0x3>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x3 0x4>; | |
| cell-id = <0x44>; | |
| label = "mas-video-ocmem"; | |
| }; | |
| mas-jpeg-ocmem { | |
| qcom,mode = "Fixed"; | |
| qcom,perm-mode = "Fixed"; | |
| qcom,mas-hw-id = <0xd>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,qport = <0x0>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x1>; | |
| cell-id = <0x42>; | |
| label = "mas-jpeg-ocmem"; | |
| }; | |
| slv-service-onoc { | |
| qcom,slv-hw-id = <0x13>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x25d>; | |
| label = "slv-service-onoc"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0x2>; | |
| }; | |
| }; | |
| qcom,msm-pcm-hostless { | |
| compatible = "qcom,msm-pcm-hostless"; | |
| }; | |
| qcom,lpm-levels { | |
| #size-cells = <0x1>; | |
| linux,phandle = <0x75>; | |
| qcom,default-l2-state = "l2_cache_retention"; | |
| qcom,allow-synced-levels; | |
| #address-cells = <0x1>; | |
| compatible = "qcom,lpm-levels"; | |
| phandle = <0x75>; | |
| qcom,system-modes { | |
| compatible = "qcom,system-modes"; | |
| qcom,system-mode@0 { | |
| qcom,time-overhead = <0x3e8>; | |
| qcom,latency-us = <0x1f4>; | |
| qcom,min-cpu-mode = "standalone_pc"; | |
| qcom,l2 = "l2_cache_gdhs"; | |
| qcom,sync-cpus; | |
| qcom,ss-power = <0xa3>; | |
| qcom,energy-overhead = <0x8d0c8>; | |
| }; | |
| qcom,system-mode@1 { | |
| qcom,time-overhead = <0x19cd>; | |
| qcom,latency-us = <0x7530>; | |
| qcom,min-cpu-mode = "pc"; | |
| qcom,l2 = "l2_cache_pc"; | |
| qcom,send-rpm-sleep-set; | |
| qcom,sync-cpus; | |
| qcom,ss-power = <0x53>; | |
| qcom,energy-overhead = <0x22b474>; | |
| }; | |
| }; | |
| qcom,cpu-modes { | |
| compatible = "qcom,cpu-modes"; | |
| qcom,cpu-mode@3 { | |
| qcom,mode = "pc"; | |
| qcom,time-overhead = <0x1f4>; | |
| qcom,latency-us = <0x1f4>; | |
| qcom,use-broadcast-timer; | |
| qcom,ss-power = <0x190>; | |
| qcom,energy-overhead = <0x445c0>; | |
| }; | |
| qcom,cpu-mode@0 { | |
| qcom,mode = "wfi"; | |
| qcom,time-overhead = <0x2>; | |
| qcom,latency-us = <0x1>; | |
| qcom,ss-power = <0x2cb>; | |
| qcom,energy-overhead = <0x4524>; | |
| }; | |
| qcom,cpu-mode@2 { | |
| qcom,mode = "standalone_pc"; | |
| qcom,time-overhead = <0x15e>; | |
| qcom,latency-us = <0x12c>; | |
| qcom,ss-power = <0x1dc>; | |
| qcom,energy-overhead = <0x37014>; | |
| }; | |
| qcom,cpu-mode@1 { | |
| qcom,mode = "retention"; | |
| qcom,time-overhead = <0x28>; | |
| qcom,latency-us = <0x23>; | |
| qcom,ss-power = <0x21e>; | |
| qcom,energy-overhead = <0x8868>; | |
| }; | |
| }; | |
| }; | |
| i2c@f9967000 { | |
| #size-cells = <0x0>; | |
| cell-index = <0x0>; | |
| reg-names = "qup_phys_addr"; | |
| interrupt-names = "qup_err_intr"; | |
| #address-cells = <0x1>; | |
| reg = <0xf9967000 0x1000>; | |
| compatible = "qcom,i2c-qup"; | |
| qcom,i2c-bus-freq = <0x186a0>; | |
| interrupts = <0x0 0x69 0x0>; | |
| qcom,i2c-src-freq = <0x124f800>; | |
| qcom,master-id = <0x54>; | |
| isa1200@48 { | |
| imagis,hap-en-gpio = <0x5 0x56 0x0>; | |
| imagis,ext-clk-en; | |
| imagis,max-timeout = <0x3a98>; | |
| vcc_i2c-supply = <0x2d>; | |
| imagis,mode-ctrl = <0x2>; | |
| imagis,need-pwm-clk; | |
| reg = <0x48>; | |
| compatible = "imagis,isa1200"; | |
| imagis,pwm-div = <0x100>; | |
| label = "vibrator"; | |
| imagis,chip-en; | |
| status = "okay"; | |
| imagis,regulator { | |
| regulator-max-microamp = <0x2490>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| regulator-name = "vcc_i2c"; | |
| }; | |
| }; | |
| }; | |
| i2c@f9924000 { | |
| #size-cells = <0x0>; | |
| cell-index = <0x2>; | |
| reg-names = "qup_phys_addr"; | |
| interrupt-names = "qup_err_intr"; | |
| #address-cells = <0x1>; | |
| qcom,scl-gpio = <0x5 0x7 0x0>; | |
| reg = <0xf9924000 0x1000>; | |
| compatible = "qcom,i2c-qup"; | |
| qcom,i2c-bus-freq = <0x5dc00>; | |
| interrupts = <0x0 0x60 0x0>; | |
| qcom,i2c-src-freq = <0x124f800>; | |
| qcom,master-id = <0x56>; | |
| qcom,sda-gpio = <0x5 0x6 0x0>; | |
| dhall@0C { | |
| vcc_i2c_1v8-supply = <0x58>; | |
| vdd_2v8-supply = <0x7>; | |
| dhall,irq-gpio = <0x5 0x40 0x2008>; | |
| reg = <0xc>; | |
| compatible = "magna,dhall"; | |
| interrupt-parent = <0x5>; | |
| interrupts = <0x40 0x4>; | |
| }; | |
| sn3193_issi_rgb@68 { | |
| sn3193,sdb-gpio = <0x5 0x2d 0x0>; | |
| reg = <0x68>; | |
| compatible = "sn3193,issi-rgb"; | |
| }; | |
| synaptics-rmi-ts@20 { | |
| synaptics,id3-gpio = <0x5 0x2e 0x0>; | |
| synaptics,wakeup-gpio = <0x5 0x39 0x0>; | |
| synaptics,reset-gpio = <0x5 0x3c 0x0>; | |
| reg = <0x20>; | |
| compatible = "synaptics,rmi-ts"; | |
| synaptics,id-gpio = <0x5 0x3e 0x0>; | |
| interrupt-parent = <0x5>; | |
| synaptics,irq-gpio = <0x5 0x3d 0x0>; | |
| interrupts = <0x3d 0x8>; | |
| }; | |
| atmel_mxt_ts@4a { | |
| atmel,panel-coords = <0x0 0x0 0x2f8 0x590>; | |
| atmel,reset-gpio = <0x5 0x3c 0x0>; | |
| atmel,irq-gpio = <0x5 0x3d 0x0>; | |
| vcc_i2c-supply = <0x57>; | |
| reg = <0x4a>; | |
| vdd_ana-supply = <0x4b>; | |
| atmel,no-force-update; | |
| compatible = "atmel,mxt-ts"; | |
| atmel,display-coords = <0x0 0x0 0x2d0 0x500>; | |
| atmel,i2c-pull-up; | |
| interrupt-parent = <0x5>; | |
| interrupts = <0x3d 0x2>; | |
| atmel,cfg_1 { | |
| atmel,version = <0x10>; | |
| atmel,config = [00 00 00 00 00 00 15 01 00 03 0a 0c 00 00 20 08 32 03 0f 00 0a 0a 00 00 0a 0a 00 00 83 00 00 18 0e 00 70 46 02 01 00 0a 03 31 04 05 0a 0a 90 05 f8 02 05 f1 f1 0f 00 00 08 2d 12 06 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 33 1e 19 10 80 00 00 00 ff 00 00 00 10 10 00 00 03 00 00 01 08 0a 28 0a 02 0a 00 8c 00 20 00 00 00 00 00 00 00 00 00 00 00 00 18 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05 05 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01 2a 00 16 00 00 00 00 0b 01 02 03 04 08 00 00 08 10 18 05 00 0a 05 05 50 14 19 34 1a 7f 00 00 00 00 00 00 00 00 00 30 05 02 00 01 00 05 00 00 00 00 00 00 00 00]; | |
| atmel,build = <0xaa>; | |
| atmel,variant-id = <0x19>; | |
| atmel,fw-name = "atmel_8974_fluid_v1_0_AA.hex"; | |
| atmel,family-id = <0x82>; | |
| }; | |
| }; | |
| cameramotor_drv8834@67 { | |
| qcom,platform-sleep-gpio = <0x28 0xa 0x0>; | |
| cameramotor,gpio = <0x5 0x43 0x0>; | |
| qcom,platform-step-gpio = <0x28 0x21 0x0>; | |
| qcom,platform-dir-gpio = <0x28 0xb 0x0>; | |
| reg = <0x67>; | |
| compatible = "cameramotor,drv8834"; | |
| qcom,platform-vref-gpio = <0x28 0x9 0x0>; | |
| qcom,platform-m1-gpio = <0x28 0xd 0x0>; | |
| qcom,platform-m0-gpio = <0x28 0xc 0x0>; | |
| }; | |
| ti_lm3630_bl@36 { | |
| ti,pwm-active = <0x0>; | |
| ti,pwm-ctrl = <0x0>; | |
| ti,max-brt-led2 = <0xff>; | |
| ti,init-brt-ed1 = <0xc8>; | |
| ti,bank-a-ctrl = <0x5>; | |
| reg = <0x36>; | |
| compatible = "ti,lm3630"; | |
| ti,max-brt-led1 = <0xff>; | |
| ti,pwm-period = <0xff>; | |
| ti,init-brt-led2 = <0xc8>; | |
| }; | |
| }; | |
| qcom,gdsc@fc400404 { | |
| reg = <0xfc400404 0x4>; | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_usb_hsic"; | |
| status = "ok"; | |
| }; | |
| qcom,usbbam@f9304000 { | |
| reg-names = "ssusb", "hsusb", "qscratch_ram1_reg"; | |
| interrupt-names = "ssusb", "hsusb"; | |
| qcom,disable-clk-gating; | |
| reg = <0xf9304000 0x5000 0xf9a44000 0x11000 0xf92f880c 0x4>; | |
| compatible = "qcom,usb-bam-msm"; | |
| qcom,ignore-core-reset-ack; | |
| qcom,usb-bam-num-pipes = <0x10>; | |
| interrupts = <0x0 0x84 0x0 0x0 0x87 0x0>; | |
| qcom,usb-bam-fifo-baseaddr = <0xf9200000>; | |
| qcom,pipe0 { | |
| qcom,data-fifo-offset = <0xf0000>; | |
| qcom,src-bam-pipe-index = <0x0>; | |
| qcom,data-fifo-size = <0x1800>; | |
| qcom,bam-type = <0x0>; | |
| qcom,peer-bam = <0x1>; | |
| qcom,reset-bam-on-connect; | |
| qcom,descriptor-fifo-size = <0x1400>; | |
| qcom,dir = <0x1>; | |
| qcom,dst-bam-pipe-index = <0x2>; | |
| qcom,usb-bam-mem-type = <0x1>; | |
| label = "ssusb-qdss-in-0"; | |
| qcom,src-bam-physical-address = <0xfc37c000>; | |
| qcom,descriptor-fifo-offset = <0xf4000>; | |
| qcom,pipe-num = <0x0>; | |
| qcom,dst-bam-physical-address = <0xf9304000>; | |
| }; | |
| qcom,pipe1 { | |
| qcom,data-fifo-offset = <0xf4000>; | |
| qcom,src-bam-pipe-index = <0x0>; | |
| qcom,data-fifo-size = <0x1000>; | |
| qcom,bam-type = <0x1>; | |
| qcom,peer-bam = <0x1>; | |
| qcom,descriptor-fifo-size = <0x400>; | |
| qcom,dir = <0x1>; | |
| qcom,dst-bam-pipe-index = <0x2>; | |
| qcom,usb-bam-mem-type = <0x1>; | |
| label = "hsusb-qdss-in-0"; | |
| qcom,src-bam-physical-address = <0xfc37c000>; | |
| qcom,descriptor-fifo-offset = <0xf5000>; | |
| qcom,pipe-num = <0x0>; | |
| qcom,dst-bam-physical-address = <0xf9a44000>; | |
| }; | |
| }; | |
| qcom,rpm-stats@fc19dba0 { | |
| reg-names = "phys_addr_base"; | |
| reg = <0xfc19dba0 0x1000>; | |
| compatible = "qcom,rpm-stats"; | |
| qcom,sleep-stats-version = <0x2>; | |
| }; | |
| qcom,msm-lsm-client { | |
| compatible = "qcom,msm-lsm-client"; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_7_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_7_in"; | |
| gpios = <0x30 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-1-out { | |
| linux,phandle = <0x69>; | |
| qcom,remote-pid = <0x1>; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "master-kernel"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x69>; | |
| }; | |
| tpiu@fc318000 { | |
| linux,phandle = <0x12>; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| reg-names = "tpiu-base"; | |
| qcom,vdd-current-level = <0x2328 0xc3500>; | |
| coresight-nr-inports = <0x1>; | |
| vdd-supply = <0xf>; | |
| vdd-io-supply = <0x10>; | |
| qcom,vdd-io-current-level = <0x6 0x55f0>; | |
| reg = <0xfc318000 0x1000>; | |
| qcom,vdd-io-voltage-level = <0x2d0370 0x2d0370>; | |
| compatible = "arm,coresight-tpiu"; | |
| phandle = <0x12>; | |
| coresight-id = <0x1>; | |
| coresight-name = "coresight-tpiu"; | |
| }; | |
| qcom,vidc { | |
| qcom,max-hw-load = <0x3b538>; | |
| compatible = "qcom,msm-vidc"; | |
| qcom,hfi = "q6"; | |
| }; | |
| csr@fc302000 { | |
| reg-names = "csr-base"; | |
| coresight-nr-inports = <0x0>; | |
| qcom,blk-size = <0x3>; | |
| reg = <0xfc302000 0x1000>; | |
| compatible = "qcom,coresight-csr"; | |
| coresight-id = <0x12>; | |
| coresight-name = "coresight-csr"; | |
| }; | |
| qcom,spm@f90b9000 { | |
| #size-cells = <0x1>; | |
| qcom,saw2-avs-hysteresis = <0x0>; | |
| qcom,saw2-spm-cmd-spc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| #address-cells = <0x1>; | |
| qcom,saw2-spm-cmd-pc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| qcom,saw2-avs-dly = <0x0>; | |
| qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5b 03 d8 5b 0b 00 42 1b 0f]; | |
| reg = <0xf90b9000 0x1000>; | |
| qcom,saw2-ver-reg = <0xfd0>; | |
| qcom,saw2-spm-cmd-wfi = [03 0b 0f]; | |
| compatible = "qcom,spm-v2"; | |
| qcom,saw2-spm-ctl = <0x1>; | |
| qcom,saw2-spm-dly = <0x3c102800>; | |
| qcom,saw2-avs-limit = <0x0>; | |
| qcom,core-id = <0x3>; | |
| qcom,saw2-avs-ctl = <0x0>; | |
| qcom,saw2-cfg = <0x1>; | |
| }; | |
| qcom,smp2pgpio-rdbg-2-out { | |
| linux,phandle = <0x39>; | |
| qcom,remote-pid = <0x2>; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "rdbg"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x39>; | |
| }; | |
| qcom,smdtty { | |
| compatible = "qcom,smdtty"; | |
| smdtty-apps-riva-bt-acl { | |
| qcom,smdtty-port-name = "APPS_RIVA_BT_ACL"; | |
| qcom,smdtty-remote = "wcnss"; | |
| }; | |
| qcom,smdtty-mbalbridge { | |
| qcom,smdtty-port-name = "MBALBRIDGE"; | |
| qcom,smdtty-remote = "modem"; | |
| }; | |
| qcom,smdtty-apps-fm { | |
| qcom,smdtty-port-name = "APPS_FM"; | |
| qcom,smdtty-remote = "wcnss"; | |
| }; | |
| qcom,smdtty-apps-riva-bt-cmd { | |
| qcom,smdtty-port-name = "APPS_RIVA_BT_CMD"; | |
| qcom,smdtty-remote = "wcnss"; | |
| }; | |
| smdtty-apps-riva-ant-cmd { | |
| qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD"; | |
| qcom,smdtty-remote = "wcnss"; | |
| }; | |
| smdtty-gpsnmea { | |
| qcom,smdtty-port-name = "GPSNMEA"; | |
| qcom,smdtty-remote = "modem"; | |
| }; | |
| smdtty-apps-riva-ant-data { | |
| qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA"; | |
| qcom,smdtty-remote = "wcnss"; | |
| }; | |
| qcom,smdtty-data21 { | |
| qcom,smdtty-port-name = "DATA21"; | |
| qcom,smdtty-remote = "modem"; | |
| }; | |
| qcom,smdtty-data11 { | |
| qcom,smdtty-port-name = "DATA11"; | |
| qcom,smdtty-remote = "modem"; | |
| }; | |
| qcom,smdtty-data1 { | |
| qcom,smdtty-port-name = "DATA1"; | |
| qcom,smdtty-remote = "modem"; | |
| }; | |
| smdtty-loopback { | |
| qcom,smdtty-port-name = "LOOPBACK"; | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-dev-name = "LOOPBACK_TTY"; | |
| }; | |
| }; | |
| fuse@fc4be024 { | |
| reg-names = "fuse-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc4be024 0x8>; | |
| compatible = "arm,coresight-fuse"; | |
| coresight-id = <0x27>; | |
| coresight-name = "coresight-fuse"; | |
| }; | |
| qcom,gdsc@fd8c2304 { | |
| linux,phandle = <0x21>; | |
| reg = <0xfd8c2304 0x4>; | |
| compatible = "qcom,gdsc"; | |
| qcom,clock-names = "core_clk", "lut_clk"; | |
| phandle = <0x21>; | |
| regulator-name = "gdsc_mdss"; | |
| status = "ok"; | |
| }; | |
| qcom,msm-pri-auxpcm { | |
| qcom,msm-cpudai-auxpcm-quant = <0x2 0x2>; | |
| qcom,msm-cpudai-auxpcm-sync = <0x1 0x1>; | |
| qcom,msm-cpudai-auxpcm-data = <0x0 0x0>; | |
| qcom,msm-cpudai-auxpcm-mode = <0x0 0x0>; | |
| compatible = "qcom,msm-auxpcm-dev"; | |
| qcom,msm-cpudai-auxpcm-frame = <0x5 0x4>; | |
| qcom,msm-auxpcm-interface = "primary"; | |
| qcom,msm-cpudai-auxpcm-slot = <0x1 0x1>; | |
| qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>; | |
| }; | |
| qcom,smp2pgpio-smp2p-2-in { | |
| linux,phandle = <0x34>; | |
| qcom,remote-pid = <0x2>; | |
| qcom,is-inbound; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x34>; | |
| }; | |
| qcom,bcl { | |
| compatible = "qcom,bcl"; | |
| }; | |
| vph_pwr_vreg { | |
| compatible = "regulator-fixed"; | |
| regulator-always-on; | |
| regulator-name = "vph_pwr"; | |
| status = "disabled"; | |
| }; | |
| tsens@fc4a8000 { | |
| qcom,slope = <0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80>; | |
| reg-names = "tsens_physical", "tsens_eeprom_physical"; | |
| qcom,calib-mode = "fuse_map1"; | |
| reg = <0xfc4a8000 0x2000 0xfc4bc000 0x1000>; | |
| compatible = "qcom,msm-tsens"; | |
| qcom,sensors = <0xb>; | |
| interrupts = <0x0 0xb8 0x0>; | |
| }; | |
| qcom,msm-compress-dsp { | |
| compatible = "qcom,msm-compress-dsp"; | |
| }; | |
| msm-mmss-noc@fc478000 { | |
| coresight-child-list = <0x18>; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x0>; | |
| qcom,qos-freq = <0x12c0>; | |
| qcom,ntieredslaves = <0x0>; | |
| qcom,hw-sel = "NoC"; | |
| reg = <0xfc478000 0x4000>; | |
| compatible = "msm-bus-fabric"; | |
| qcom,fabclk-active = "bus_a_clk"; | |
| qcom,rpm-en; | |
| coresight-child-ports = <0x5>; | |
| cell-id = <0x800>; | |
| label = "msm_mmss_noc"; | |
| coresight-id = <0x34>; | |
| qcom,fabclk-dual = "bus_clk"; | |
| coresight-name = "coresight-mnoc"; | |
| fab-cnoc { | |
| qcom,mas-hw-id = <0x4>; | |
| qcom,hw-sel = "RPM"; | |
| qcom,masterp = <0x0 0x1>; | |
| qcom,gateway; | |
| cell-id = <0x1400>; | |
| label = "fab-cnoc"; | |
| qcom,buswidth = <0x10>; | |
| }; | |
| slv-onoc-mpu-cfg { | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0xf>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x25a>; | |
| label = "slv-onoc-mpu-cfg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0xe>; | |
| }; | |
| slv-camera-cfg { | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x3>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x24d>; | |
| label = "slv-camera-cfg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0x0>; | |
| }; | |
| slv-misc-xpu-cfg { | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x9>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x253>; | |
| label = "slv-misc-xpu-cfg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0x7>; | |
| }; | |
| slv-mmss-clk-cfg { | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0xc>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x257>; | |
| label = "slv-mmss-clk-cfg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0xb>; | |
| }; | |
| mas-video-p0 { | |
| qcom,mode = "Bypass"; | |
| qcom,perm-mode = "Bypass"; | |
| qcom,mas-hw-id = <0x9>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,qport = <0x4 0x5>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x6 0x7>; | |
| qcom,ws = <0x2710>; | |
| cell-id = <0x3f>; | |
| label = "mas-video-p0"; | |
| }; | |
| mas-gfx3d { | |
| qcom,mode = "Bypass"; | |
| qcom,perm-mode = "Bypass"; | |
| qcom,mas-hw-id = <0x6>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,qport = <0x2 0x3>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x2 0x3>; | |
| qcom,ws = <0x2710>; | |
| cell-id = <0x1a>; | |
| label = "mas-gfx3d"; | |
| }; | |
| slv-mnoc-mpu-cfg { | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0xe>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x259>; | |
| label = "slv-mnoc-mpu-cfg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0xd>; | |
| }; | |
| slv-display-cfg { | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x4>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x24e>; | |
| label = "slv-display-cfg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0x1>; | |
| }; | |
| mas-vfe { | |
| qcom,mode = "Bypass"; | |
| qcom,perm-mode = "Bypass"; | |
| qcom,mas-hw-id = <0xb>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,qport = <0x6>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x10>; | |
| qcom,ws = <0x2710>; | |
| cell-id = <0x1d>; | |
| label = "mas-vfe"; | |
| }; | |
| slv-mmss-clk-xpu-cfg { | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0xd>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x258>; | |
| label = "slv-mmss-clk-xpu-cfg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0xc>; | |
| }; | |
| slv-misc-cfg { | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x8>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x252>; | |
| label = "slv-misc-cfg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0x6>; | |
| }; | |
| slv-cpr-xpu-cfg { | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x7>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x251>; | |
| label = "slv-cpr-xpu-cfg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0x4>; | |
| }; | |
| slv-venus-cfg { | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0xa>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x254>; | |
| label = "slv-venus-cfg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0x8>; | |
| }; | |
| slv-cpr-cfg { | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x6>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x250>; | |
| label = "slv-cpr-cfg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0x3>; | |
| }; | |
| mas-jpeg { | |
| qcom,mode = "Bypass"; | |
| qcom,perm-mode = "Bypass"; | |
| qcom,mas-hw-id = <0x7>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,qport = <0x0>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x4>; | |
| qcom,ws = <0x2710>; | |
| cell-id = <0x3e>; | |
| label = "mas-jpeg"; | |
| }; | |
| mas-mdp-port0 { | |
| qcom,mode = "Bypass"; | |
| qcom,perm-mode = "Bypass"; | |
| qcom,mas-hw-id = <0x8>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,qport = <0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x5>; | |
| qcom,ws = <0x2710>; | |
| cell-id = <0x16>; | |
| label = "mas-mdp-port0"; | |
| }; | |
| slv-service-mnoc { | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x11>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x25b>; | |
| label = "slv-service-mnoc"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0x12>; | |
| }; | |
| slv-ocmem-cfg { | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x5>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x24f>; | |
| label = "slv-ocmem-cfg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0x2>; | |
| }; | |
| fab-bimc { | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x10>; | |
| qcom,gateway; | |
| cell-id = <0x0>; | |
| label = "fab-bimc"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0x10 0x11>; | |
| }; | |
| slv-gfx3d-cfg { | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0xb>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x256>; | |
| label = "slv-gfx3d-cfg"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0x9>; | |
| }; | |
| }; | |
| qcom,iommu@fdfb6000 { | |
| #size-cells = <0x1>; | |
| ranges; | |
| reg-names = "iommu_base"; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| #address-cells = <0x1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x2314 0x2394 0x2414 0x2494 0x20ac 0x215c 0x220c 0x22bc 0x2008 0x200c>; | |
| qcom,msm-bus,vectors-KBps = <0x30 0x200 0x0 0x0 0x30 0x200 0x0 0x3e8>; | |
| qcom,needs-alt-core-clk; | |
| reg = <0xfdfb6000 0x10000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-smmu-v1"; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| label = "vcap_iommu"; | |
| qcom,msm-bus,name = "vcap_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,iommu-bfb-data = <0xff 0x4 0x8 0x0 0x0 0x8 0x28 0x0 0x1000 0x1000 0x3008 0x0 0x0 0x0>; | |
| interrupts = <0x0 0x13b 0x0>; | |
| status = "disabled"; | |
| qcom,iommu-ctx@fdfbf000 { | |
| qcom,iommu-ctx-sids = <0x1>; | |
| reg = <0xfdfbf000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "vcap_cb1"; | |
| interrupts = <0x0 0x139 0x0>; | |
| }; | |
| qcom,iommu-ctx@fdfbe000 { | |
| qcom,iommu-ctx-sids = <0x0>; | |
| reg = <0xfdfbe000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "vcap_cb0"; | |
| interrupts = <0x0 0x139 0x0>; | |
| }; | |
| qcom,iommu-ctx@fdfc0000 { | |
| qcom,iommu-ctx-sids; | |
| reg = <0xfdfc0000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "vcap_cb2"; | |
| interrupts = <0x0 0x139 0x0>; | |
| }; | |
| }; | |
| slim@fe12f000 { | |
| cell-index = <0x1>; | |
| reg-names = "slimbus_physical", "slimbus_bam_physical"; | |
| interrupt-names = "slimbus_irq", "slimbus_bam_irq"; | |
| reg = <0xfe12f000 0x35000 0xfe104000 0x20000>; | |
| compatible = "qcom,slim-ngd"; | |
| qcom,apps-ch-pipes = <0x60000000>; | |
| qcom,ea-pc = <0x30>; | |
| interrupts = <0x0 0xa3 0x0 0x0 0xa4 0x0>; | |
| taiko_codec { | |
| qcom,cdc-micbias4-ext-cap; | |
| qcom,cdc-vddcx-1-current = <0x2710>; | |
| qcom,cdc-vdd-a-1p2v-voltage = <0x12b128 0x12b128>; | |
| cdc-hpmic_switch-1-supply = <0x43>; | |
| qcom,cdc-vdd-a-1p2v-current = <0x2710>; | |
| qcom,cdc-micbias1-cfilt-sel = <0x0>; | |
| qcom,cdc-vddpx-1-current = <0x2710>; | |
| qcom,cdc-vddcx-2-current = <0x2710>; | |
| qcom,cdc-micbias-cfilt2-mv = <0x7d0>; | |
| cdc-vddcx-2-supply = <0x4e>; | |
| qcom,cdc-micbias-cfilt1-mv = <0x708>; | |
| qcom,cdc-micbias2-cfilt-sel = <0x1>; | |
| cdc-vdd-a-1p2v-supply = <0x4e>; | |
| cdc-vdd-tx-h-supply = <0x2d>; | |
| qcom,cdc-vddcx-2-voltage = <0x12b128 0x12b128>; | |
| qcom,cdc-slim-ifd = "taiko-slim-ifd"; | |
| qcom,cdc-vdd-buck-current = <0x9eb10>; | |
| cdc-vdd-buck-supply = <0x4d>; | |
| qcom,cdc-mclk-clk-rate = <0x927c00>; | |
| qcom,cdc-slim-ifd-elemental-addr = [00 00 a0 00 17 02]; | |
| cdc-vddpx-1-supply = <0x2d>; | |
| cdc-vddcx-1-supply = <0x4e>; | |
| compatible = "qcom,taiko-slim-pgd"; | |
| qcom,cdc-vdd-tx-h-current = <0x61a8>; | |
| qcom,cdc-vdd-buck-voltage = <0x20ce70 0x20ce70>; | |
| qcom,cdc-micbias-ldoh-v = <0x3>; | |
| qcom,cdc-dmic-sample-rate = <0x493e00>; | |
| qcom,cdc-vdd-tx-h-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-reset-gpio = <0x5 0x3f 0x0>; | |
| cdc-vdd-rx-h-supply = <0x2d>; | |
| interrupt-parent = <0x4c>; | |
| elemental-addr = [00 01 a0 00 17 02]; | |
| qcom,cdc-micbias1-ext-cap; | |
| qcom,cdc-vddpx-1-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vddcx-1-voltage = <0x12b128 0x12b128>; | |
| qcom,cdc-vdd-rx-h-current = <0x61a8>; | |
| qcom,cdc-micbias3-cfilt-sel = <0x2>; | |
| qcom,cdc-micbias4-cfilt-sel = <0x2>; | |
| qcom,cdc-micbias3-ext-cap; | |
| interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e>; | |
| qcom,cdc-micbias-cfilt3-mv = <0xa8c>; | |
| qcom,cdc-vdd-rx-h-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-static-supplies = "cdc-vdd-buck", "cdc-vdd-tx-h", "cdc-vdd-rx-h", "cdc-vddpx-1", "cdc-vdd-a-1p2v", "cdc-vddcx-1", "cdc-vddcx-2"; | |
| qcom,cdc-micbias2-ext-cap; | |
| }; | |
| }; | |
| qcom,msm-dai-mi2s { | |
| compatible = "qcom,msm-dai-mi2s"; | |
| qcom,msm-dai-q6-mi2s-quat { | |
| qcom,msm-mi2s-rx-lines = <0x1>; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x1>; | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-mi2s-tx-lines = <0x2>; | |
| }; | |
| }; | |
| qcom,ipc-spinlock@fa00000 { | |
| reg = <0xfa00000 0x200000>; | |
| compatible = "qcom,ipc-spinlock-ldrex"; | |
| status = "disable"; | |
| }; | |
| serial@f991e000 { | |
| qcom,msm-bus,vectors-KBps = <0x56 0x200 0x0 0x0 0x56 0x200 0x1f4 0x320>; | |
| reg = <0xf991e000 0x1000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-lsuart-v14"; | |
| qcom,msm-bus,name = "serial_uart2"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| interrupts = <0x0 0x6c 0x0>; | |
| status = "ok"; | |
| }; | |
| qcom,wdt@f9017000 { | |
| qcom,pet-time = <0x4e20>; | |
| reg = <0xf9017000 0x1000>; | |
| compatible = "qcom,msm-watchdog"; | |
| qcom,bark-time = <0x61a8>; | |
| qcom,ipi-ping; | |
| interrupts = <0x0 0x3 0x0 0x0 0x4 0x0>; | |
| }; | |
| qcom,vidc@fdc00000 { | |
| qcom,dec-ddr-ab-ib = <0x0 0x0 0x32c80 0x49f98 0x82dc0 0x186a00 0xf7120 0x186a00 0x1ee240 0x186a00 0x317040 0x186a00 0x3dc480 0x186a00 0x411040 0x186a00>; | |
| qcom,vidc-ns-map = <0x40000000 0x40000000>; | |
| qcom,reg-presets = <0x80004 0x1 0x80070 0x11fff 0x80074 0xa4 0x800a8 0x1fff 0x80124 0x3 0xe0020 0x5555556 0xe0024 0x0>; | |
| vdd-supply = <0x3c>; | |
| qcom,max-hw-load = <0x129120>; | |
| qcom,load-freq-tbl = <0xfd200 0x1bb75640 0xbf400 0x1bb75640 0x77880 0xfe50fb0 0x3bc40 0x7f27450>; | |
| qcom,has-ocmem; | |
| qcom,buffer-type-tz-usage-table = <0x241 0x1 0x106 0x2 0x480 0x3>; | |
| reg = <0xfdc00000 0xff000>; | |
| qcom,dec-ocmem-ab-ib = <0x0 0x0 0x2af80 0x7eb58 0x6f540 0x7eb58 0xd2f00 0x99908 0x1a5e00 0xfd6b0 0x2a34b0 0x195848 0x34bc00 0x1fad60 0x37e0b0 0x2189f0>; | |
| compatible = "qcom,msm-vidc"; | |
| qcom,hfi = "venus"; | |
| qcom,enc-ddr-ab-ib = <0x0 0x0 0x1d4c0 0x49bb0 0x58de0 0x49bb0 0xc44a0 0x49bb0 0x188940 0x93760 0x274e80 0xec158 0x476940 0x156c60 0x4c1c60 0x16d3c0>; | |
| qcom,bus-ports = <0x1>; | |
| interrupts = <0x0 0x2c 0x0>; | |
| qcom,enc-ocmem-ab-ib = <0x0 0x0 0x21b10 0xfc710 0x65130 0xfc710 0xe57e0 0xfc710 0x1cafc0 0x1f8e20 0x2de600 0x327dc8 0x395f80 0x3f1c40 0x442d20 0x257da8>; | |
| qcom,vidc-iommu-domains { | |
| qcom,domain-ns { | |
| qcom,vidc-partition-buffer-types = <0x7ff 0x800>; | |
| qcom,vidc-domain-phandle = <0x3d>; | |
| }; | |
| qcom,domain-sec-bs { | |
| qcom,vidc-partition-buffer-types = <0x241>; | |
| qcom,vidc-domain-phandle = <0x3e>; | |
| }; | |
| qcom,domain-sec-px { | |
| qcom,vidc-partition-buffer-types = <0x106>; | |
| qcom,vidc-domain-phandle = <0x3f>; | |
| }; | |
| qcom,domain-sec-np { | |
| qcom,vidc-partition-buffer-types = <0x480>; | |
| qcom,vidc-domain-phandle = <0x40>; | |
| }; | |
| }; | |
| }; | |
| qcom,iommu@fda44000 { | |
| #size-cells = <0x1>; | |
| ranges; | |
| qcom,iommu-enable-halt; | |
| reg-names = "iommu_base"; | |
| vdd-supply = <0x3>; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| #address-cells = <0x1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2050 0x2514 0x2540 0x256c 0x2314 0x2394 0x2414 0x20ac 0x215c 0x220c 0x2008 0x200c 0x2010 0x2014 0x2018 0x201c 0x2020>; | |
| qcom,msm-bus,vectors-KBps = <0x1d 0x200 0x0 0x0 0x1d 0x200 0x0 0x3e8>; | |
| qcom,needs-alt-core-clk; | |
| reg = <0xfda44000 0x10000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-smmu-v1"; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| label = "vfe_iommu"; | |
| qcom,msm-bus,name = "vfe_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,iommu-bfb-data = <0xffffffff 0x0 0x4 0x8 0x0 0x0 0x20 0x78 0x0 0x3c08 0xb41e 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| interrupts = <0x0 0x3e 0x0>; | |
| status = "ok"; | |
| qcom,iommu-ctx@fda4e000 { | |
| qcom,iommu-ctx-sids = <0x2>; | |
| reg = <0xfda4e000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "cpp"; | |
| interrupts = <0x0 0x41 0x0>; | |
| }; | |
| qcom,iommu-ctx@fda4d000 { | |
| qcom,iommu-ctx-sids = <0x1>; | |
| reg = <0xfda4d000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "vfe1"; | |
| interrupts = <0x0 0x41 0x0>; | |
| }; | |
| qcom,iommu-ctx@fda4c000 { | |
| qcom,iommu-ctx-sids = <0x0>; | |
| reg = <0xfda4c000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "vfe0"; | |
| interrupts = <0x0 0x41 0x0>; | |
| }; | |
| }; | |
| qcom,jpeg@fda24000 { | |
| cell-index = <0x2>; | |
| reg-names = "jpeg"; | |
| vdd-supply = <0x4>; | |
| interrupt-names = "jpeg"; | |
| reg = <0xfda24000 0x400>; | |
| compatible = "qcom,jpeg"; | |
| interrupts = <0x0 0x3d 0x0>; | |
| }; | |
| qcom,camera-led-flash { | |
| linux,phandle = <0xb>; | |
| cell-index = <0x0>; | |
| qcom,flash-type = <0x1>; | |
| qcom,flash-source = <0x78 0x79>; | |
| compatible = "qcom,camera-led-flash"; | |
| qcom,torch-source = <0x77>; | |
| phandle = <0xb>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_7_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_7_out"; | |
| gpios = <0x31 0x0 0x0>; | |
| }; | |
| spi@f9923000 { | |
| ethernet-switch@2 { | |
| vdd-phy-supply = <0x7a>; | |
| vdd-io-supply = <0x7a>; | |
| rst-gpio = <0x76 0x6 0x0>; | |
| spi-max-frequency = <0x493e00>; | |
| reg = <0x2>; | |
| compatible = "micrel,ks8851"; | |
| interrupt-parent = <0x5>; | |
| interrupts = <0x5e 0x0>; | |
| }; | |
| }; | |
| qcom,msm-audio-ion { | |
| compatible = "qcom,msm-audio-ion"; | |
| }; | |
| qcom,smp2pgpio-rdbg-1-in { | |
| linux,phandle = <0x3a>; | |
| qcom,remote-pid = <0x1>; | |
| qcom,is-inbound; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "rdbg"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x3a>; | |
| }; | |
| qcom,gdsc@fd8c1024 { | |
| linux,phandle = <0x3c>; | |
| qcom,skip-logic-collapse; | |
| reg = <0xfd8c1024 0x4>; | |
| compatible = "qcom,gdsc"; | |
| qcom,clock-names = "core_clk"; | |
| phandle = <0x3c>; | |
| regulator-name = "gdsc_venus"; | |
| status = "ok"; | |
| }; | |
| qcom,msm-thermal { | |
| qcom,freq-mitigation-control-mask = <0x1>; | |
| qcom,freq-control-mask = <0xf>; | |
| qcom,cpu-sensors = "tsens_tz_sensor5", "tsens_tz_sensor6", "tsens_tz_sensor7", "tsens_tz_sensor8"; | |
| qcom,core-temp-hysteresis = <0xa>; | |
| qcom,freq-mitigation-value = <0xea600>; | |
| qcom,freq-mitigation-temp-hysteresis = <0x14>; | |
| qcom,vdd-restriction-temp = <0x5>; | |
| qcom,core-control-mask = <0xe>; | |
| qcom,freq-step = <0x2>; | |
| qcom,poll-ms = <0xfa>; | |
| qcom,freq-mitigation-temp = <0x6e>; | |
| qcom,temp-hysteresis = <0xa>; | |
| qcom,limit-temp = <0x3c>; | |
| compatible = "qcom,msm-thermal"; | |
| vdd-dig-supply = <0x6e>; | |
| qcom,vdd-restriction-temp-hysteresis = <0xa>; | |
| qcom,core-limit-temp = <0x50>; | |
| vdd-gfx-supply = <0x6f>; | |
| qcom,hotplug-temp-hysteresis = <0x14>; | |
| qcom,hotplug-temp = <0x6e>; | |
| qcom,sensor-id = <0x5>; | |
| qcom,vdd-gfx-rstr { | |
| qcom,levels = <0x5 0x7 0x7>; | |
| qcom,min-level = <0x1>; | |
| qcom,vdd-rstr-reg = "vdd-gfx"; | |
| }; | |
| qcom,vdd-apps-rstr { | |
| qcom,freq-req; | |
| qcom,levels = <0x1cb600 0x1de200 0x229200>; | |
| qcom,vdd-rstr-reg = "vdd-apps"; | |
| }; | |
| qcom,vdd-dig-rstr { | |
| qcom,levels = <0x5 0x7 0x7>; | |
| qcom,min-level = <0x1>; | |
| qcom,vdd-rstr-reg = "vdd-dig"; | |
| }; | |
| }; | |
| qcom,smp2p-modem { | |
| qcom,remote-pid = <0x1>; | |
| reg = <0xf9011008 0x4>; | |
| compatible = "qcom,smp2p"; | |
| interrupts = <0x0 0x1b 0x1>; | |
| qcom,irq-bitmask = <0x4000>; | |
| }; | |
| qcom,mss@fc880000 { | |
| qcom,vdd_pll = <0x1b7740>; | |
| qcom,gpio-stop-ack = <0x68 0x3 0x0>; | |
| qcom,gpio-force-stop = <0x69 0x0 0x0>; | |
| reg-names = "qdsp6_base", "halt_base", "rmb_base", "restart_reg"; | |
| vdd_mx-supply = <0x67>; | |
| vdd_mss-supply = <0x66>; | |
| vdd_pll-supply = <0x2>; | |
| qcom,gpio-err-ready = <0x68 0x1 0x0>; | |
| reg = <0xfc880000 0x100 0xfd485000 0x400 0xfc820000 0x20 0xfc401680 0x4>; | |
| compatible = "qcom,pil-q6v5-mss"; | |
| vdd_cx-supply = <0x41>; | |
| qcom,gpio-proxy-unvote = <0x68 0x2 0x0>; | |
| qcom,pil-self-auth; | |
| interrupts = <0x0 0x18 0x1>; | |
| qcom,gpio-err-fatal = <0x68 0x0 0x0>; | |
| qcom,firmware-name = "mba"; | |
| }; | |
| qcom,smp2pgpio-smp2p-7-out { | |
| linux,phandle = <0x31>; | |
| qcom,remote-pid = <0x7>; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x31>; | |
| }; | |
| qcom,spm@f9099000 { | |
| #size-cells = <0x1>; | |
| qcom,saw2-avs-hysteresis = <0x0>; | |
| qcom,saw2-spm-cmd-spc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| #address-cells = <0x1>; | |
| qcom,saw2-spm-cmd-pc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| qcom,saw2-avs-dly = <0x0>; | |
| qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5b 03 d8 5b 0b 00 42 1b 0f]; | |
| reg = <0xf9099000 0x1000>; | |
| qcom,saw2-ver-reg = <0xfd0>; | |
| qcom,saw2-spm-cmd-wfi = [03 0b 0f]; | |
| compatible = "qcom,spm-v2"; | |
| qcom,saw2-spm-ctl = <0x1>; | |
| qcom,saw2-spm-dly = <0x3c102800>; | |
| qcom,saw2-avs-limit = <0x0>; | |
| qcom,core-id = <0x1>; | |
| qcom,saw2-avs-ctl = <0x0>; | |
| qcom,saw2-cfg = <0x1>; | |
| }; | |
| qcom,iommu@f9bc4000 { | |
| #size-cells = <0x1>; | |
| qcom,iommu-lpae-bfb-data = <0x3 0x0 0x4 0x4 0x0 0x5 0x0 0x1 0x0 0x0 0x40 0x44 0x0>; | |
| ranges; | |
| reg-names = "iommu_base"; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| #address-cells = <0x1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008>; | |
| qcom,msm-bus,vectors-KBps = <0x58 0x200 0x0 0x0 0x58 0x200 0x0 0x3e8>; | |
| reg = <0xf9bc4000 0x10000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-smmu-v1"; | |
| qcom,iommu-lpae-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008>; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| label = "copss_iommu"; | |
| qcom,msm-bus,name = "copss_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,iommu-bfb-data = <0x3 0x4 0x4 0x0 0x0 0x0 0x1 0x0 0x0 0x40 0x44 0x0 0x0>; | |
| interrupts = <0x0 0x99 0x0>; | |
| status = "disabled"; | |
| qcom,iommu-ctx@f9bd1000 { | |
| qcom,iommu-ctx-sids = <0x5>; | |
| reg = <0xf9bd1000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "copss_cb_5"; | |
| interrupts = <0x0 0x8e 0x0>; | |
| }; | |
| qcom,iommu-ctx@f9bd0000 { | |
| qcom,iommu-ctx-sids = <0x4>; | |
| reg = <0xf9bd0000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "copss_cb_4"; | |
| interrupts = <0x0 0x8e 0x0>; | |
| }; | |
| qcom,iommu-ctx@f9bcd000 { | |
| qcom,iommu-ctx-sids = <0x1>; | |
| reg = <0xf9bcd000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "copss_cb_1"; | |
| interrupts = <0x0 0x8e 0x0>; | |
| }; | |
| qcom,iommu-ctx@f9bce000 { | |
| qcom,iommu-ctx-sids = <0x2>; | |
| reg = <0xf9bce000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "copss_cb_2"; | |
| interrupts = <0x0 0x8e 0x0>; | |
| }; | |
| qcom,iommu-ctx@f9bcf000 { | |
| qcom,iommu-ctx-sids = <0x3>; | |
| reg = <0xf9bcf000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "copss_cb_3"; | |
| interrupts = <0x0 0x8e 0x0>; | |
| }; | |
| qcom,iommu-ctx@f9bcc000 { | |
| qcom,iommu-ctx-sids = <0x0>; | |
| reg = <0xf9bcc000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "copss_cb_0"; | |
| interrupts = <0x0 0x8e 0x0>; | |
| }; | |
| qcom,iommu-ctx@f9bd3000 { | |
| qcom,iommu-ctx-sids = <0x7>; | |
| reg = <0xf9bd3000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "copss_cb_7"; | |
| interrupts = <0x0 0x8e 0x0>; | |
| }; | |
| qcom,iommu-ctx@f9bd2000 { | |
| qcom,iommu-ctx-sids = <0x6>; | |
| reg = <0xf9bd2000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "copss_cb_6"; | |
| interrupts = <0x0 0x8e 0x0>; | |
| }; | |
| }; | |
| gen-vkeys { | |
| qcom,disp-maxx = <0x2d0>; | |
| compatible = "qcom,gen-vkeys"; | |
| label = "atmel_mxt_ts"; | |
| qcom,key-codes = <0x9e 0x8b 0x66 0xd9>; | |
| qcom,disp-maxy = <0x500>; | |
| qcom,panel-maxx = <0x2f8>; | |
| qcom,panel-maxy = <0x590>; | |
| }; | |
| qcom,ispif@fda0A000 { | |
| cell-index = <0x0>; | |
| reg-names = "ispif", "csi_clk_mux"; | |
| interrupt-names = "ispif"; | |
| reg = <0xfda0a000 0x500 0xfda00020 0x10>; | |
| compatible = "qcom,ispif-v3.0", "qcom,ispif"; | |
| interrupts = <0x0 0x37 0x0>; | |
| qcom,num-isps = <0x2>; | |
| }; | |
| qcom,msm-rng@f9bff000 { | |
| qcom,msm-bus,vectors-KBps = <0x36 0x26a 0x0 0x0 0x36 0x26a 0x0 0x320>; | |
| reg = <0xf9bff000 0x200>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-rng"; | |
| qcom,msm-bus,name = "msm-rng-noc"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| }; | |
| qcom,gdsc@fc401ec0 { | |
| reg = <0xfc401ec0 0x4>; | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_usb30_sec"; | |
| status = "disabled"; | |
| }; | |
| qcom,msm-cpufreq@0 { | |
| qcom,cpufreq-table = <0x493e0 0x493e0 0x23c 0x67200 0x67200 0x478 0x9f600 0x79e00 0x5f5 0xb2200 0x8ca00 0x926 0xd7a00 0x8ca00 0x926 0xea600 0xea600 0xdb5 0xfd200 0xfd200 0xdb5 0x122a00 0xfd200 0xdb5 0x135600 0x135600 0x124c 0x16da00 0x16da00 0x124c 0x180600 0x180600 0x17d7 0x1a5e00 0x193200 0x17d7 0x1de200 0x1a5e00 0x1bbe 0x229200 0x1a5e00 0x1bbe 0x258000 0x1a5e00 0x1bbe>; | |
| reg = <0x0 0x4>; | |
| compatible = "qcom,msm-cpufreq"; | |
| }; | |
| qcom,mdss_edp@fd923400 { | |
| gpio-panel-hpd = <0x5 0x66 0x0>; | |
| gpio-panel-en = <0x5 0x3a 0x0>; | |
| reg-names = "edp_base", "mmss_cc_base"; | |
| reg = <0xfd923400 0x700 0xfd8c2000 0x1000>; | |
| compatible = "qcom,mdss-edp"; | |
| vdda-supply = <0x2>; | |
| qcom,mdss-fb-map = <0x26>; | |
| }; | |
| cti@fc30b000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc30b000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x16>; | |
| coresight-name = "coresight-cti3"; | |
| }; | |
| etm@fc33f000 { | |
| coresight-child-list = <0x17>; | |
| reg-names = "etm-base"; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc33f000 0x1000>; | |
| compatible = "arm,coresight-etm"; | |
| coresight-child-ports = <0x3>; | |
| coresight-id = <0xd>; | |
| qcom,pc-save; | |
| coresight-name = "coresight-etm3"; | |
| qcom,round-robin; | |
| }; | |
| hwevent@fdf30018 { | |
| reg-names = "mmss-mux", "apcs-mux", "ppss-mux", "gcc-mux"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfdf30018 0x80 0xf9011080 0x80 0xfd4ab160 0x80 0xfc401600 0x80>; | |
| qcom,hwevent-clks = "core_mmss_clk"; | |
| compatible = "qcom,coresight-hwevent"; | |
| coresight-id = <0x26>; | |
| coresight-name = "coresight-hwevent"; | |
| }; | |
| qcom,msm-imem@fe805000 { | |
| reg = <0xfe805000 0x1000>; | |
| compatible = "qcom,msm-imem"; | |
| }; | |
| spi@f9927000 { | |
| #size-cells = <0x0>; | |
| cell-index = <0x5>; | |
| qcom,gpio-miso = <0x5 0x18 0x0>; | |
| qcom,gpio-clk = <0x5 0x1a 0x0>; | |
| reg-names = "spi_physical"; | |
| interrupt-names = "spi5_irq"; | |
| #address-cells = <0x1>; | |
| qcom,gpio-cs0 = <0x5 0x19 0x0>; | |
| spi-max-frequency = <0x927c00>; | |
| reg = <0xf9927000 0x1000>; | |
| compatible = "qcom,spi-qup-v2"; | |
| qcom,gpio-mosi = <0x5 0x17 0x0>; | |
| interrupts = <0x0 0x63 0x0>; | |
| qcom,master-id = <0x56>; | |
| fpc_fpc1020@0 { | |
| fpc,gpio_reset = <0x5 0x54 0x0>; | |
| #fpc,txout_boost_enable; | |
| fpc,gpio_irq = <0x5 0x66 0x0>; | |
| #spi-cs-high; | |
| #spi-cpha; | |
| fpc,vddtx_mv; | |
| #vdd_ana-supply = <0x4b>; | |
| fpc,gpio_envdd = <0x5 0x10 0x0>; | |
| spi-max-frequency = <0x124f800>; | |
| reg = <0x0>; | |
| compatible = "fpc,fpc1020"; | |
| interrupt-parent = <0x5>; | |
| interrupts = <0x66 0x0>; | |
| vdd_io-supply = <0x2d>; | |
| #spi-cpol; | |
| }; | |
| }; | |
| qcom,smp2pgpio_client_rdbg_2_out { | |
| compatible = "qcom,smp2pgpio_client_rdbg_2_out"; | |
| gpios = <0x39 0x0 0x0>; | |
| }; | |
| funnel@fc364000 { | |
| linux,phandle = <0x20>; | |
| coresight-child-list = <0x16>; | |
| reg-names = "funnel-base"; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x8>; | |
| reg = <0xfc364000 0x1000>; | |
| compatible = "arm,coresight-funnel"; | |
| coresight-child-ports = <0x1>; | |
| phandle = <0x20>; | |
| coresight-id = <0x8>; | |
| coresight-name = "coresight-funnel-mmss"; | |
| }; | |
| qcom,kraitbw-l2pm { | |
| qcom,bytes-per-beat = <0x8>; | |
| compatible = "qcom,kraitbw-l2pm"; | |
| interrupts = <0x0 0x1 0x1>; | |
| }; | |
| qcom,qcrypto@fd444000 { | |
| reg-names = "crypto-base", "crypto-bam-base"; | |
| qcom,use-sw-ahash-algo; | |
| qcom,clk-mgmt-sus-res; | |
| qcom,msm-bus,vectors-KBps = <0x38 0x200 0x0 0x0 0x38 0x200 0x3c0f00 0x60180>; | |
| reg = <0xfd440000 0x20000 0xfd444000 0x8000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,qcrypto"; | |
| qcom,bam-pipe-pair = <0x2>; | |
| qcom,use-sw-aes-xts-algo; | |
| qcom,ce-hw-instance = <0x1>; | |
| qcom,msm-bus,name = "qcrypto-noc"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| interrupts = <0x0 0xec 0x0>; | |
| qcom,use-sw-aes-cbc-ecb-ctr-algo; | |
| }; | |
| qcom,gdsc@fd8c1404 { | |
| reg = <0xfd8c1404 0x4>; | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_vpu"; | |
| status = "disabled"; | |
| }; | |
| qcom,msm-pcm-lpa { | |
| compatible = "qcom,msm-pcm-lpa"; | |
| }; | |
| cti@fc30c000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc30c000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x17>; | |
| coresight-name = "coresight-cti4"; | |
| }; | |
| sdhci@f9824900 { | |
| qcom,pad-pull-off = <0x0 0x3 0x3 0x1>; | |
| qcom,pad-drv-on = <0x4 0x4 0x4>; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| reg-names = "hc_mem", "core_mem"; | |
| qcom,vdd-current-level = <0x320 0x7a120>; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xb71b000 0x16e36000>; | |
| qcom,cpu-dma-latency-us = <0xc8>; | |
| vdd-supply = <0x44>; | |
| vdd-io-supply = <0x2d>; | |
| interrupt-names = "hc_irq", "pwr_irq"; | |
| qcom,vdd-io-current-level = <0xfa 0x25990>; | |
| qcom,dat1-mpm-int = <0x2a>; | |
| qcom,msm-bus,vectors-KBps = <0x4e 0x200 0x0 0x0 0x4e 0x200 0x640 0xc80 0x4e 0x200 0x13880 0x27100 0x4e 0x200 0x186a0 0x30d40 0x4e 0x200 0x30d40 0x61a80 0x4e 0x200 0x61a80 0xc3500 0x4e 0x200 0xc3500 0x186a00 0x4e 0x200 0x1f4000 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| reg = <0xf9824900 0x1a0 0xf9824000 0x800>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,vdd-io-voltage-level = <0x1b7740 0x1b7740>; | |
| compatible = "qcom,sdhci-msm"; | |
| qcom,vdd-lpm-sup; | |
| qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v"; | |
| qcom,bus-width = <0x8>; | |
| qcom,nonremovable; | |
| qcom,vdd-io-always-on; | |
| qcom,pad-pull-on = <0x0 0x3 0x3 0x1>; | |
| qcom,msm-bus,name = "sdhc1"; | |
| qcom,msm-bus,num-cases = <0x8>; | |
| interrupts = <0x0 0x7b 0x0 0x0 0x8a 0x0>; | |
| status = "ok"; | |
| qcom,vdd-always-on; | |
| qcom,pad-drv-off = <0x0 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-smp2p-7-in { | |
| linux,phandle = <0x30>; | |
| qcom,remote-pid = <0x7>; | |
| qcom,is-inbound; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x30>; | |
| }; | |
| funnel@fc31a000 { | |
| linux,phandle = <0x16>; | |
| coresight-child-list = <0x15>; | |
| reg-names = "funnel-base"; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x8>; | |
| reg = <0xfc31a000 0x1000>; | |
| compatible = "arm,coresight-funnel"; | |
| coresight-child-ports = <0x1>; | |
| phandle = <0x16>; | |
| coresight-id = <0x6>; | |
| coresight-name = "coresight-funnel-in1"; | |
| }; | |
| qcom,spm@f9089000 { | |
| #size-cells = <0x1>; | |
| qcom,saw2-avs-hysteresis = <0x0>; | |
| qcom,saw2-spm-cmd-spc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| #address-cells = <0x1>; | |
| qcom,saw2-spm-cmd-pc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| qcom,saw2-avs-dly = <0x0>; | |
| qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5b 03 d8 5b 0b 00 42 1b 0f]; | |
| reg = <0xf9089000 0x1000>; | |
| qcom,saw2-ver-reg = <0xfd0>; | |
| qcom,saw2-spm-cmd-wfi = [03 0b 0f]; | |
| compatible = "qcom,spm-v2"; | |
| qcom,saw2-spm-ctl = <0x1>; | |
| qcom,saw2-spm-dly = <0x3c102800>; | |
| qcom,saw2-avs-limit = <0x0>; | |
| qcom,core-id = <0x0>; | |
| qcom,saw2-avs-ctl = <0x0>; | |
| qcom,saw2-cfg = <0x1>; | |
| }; | |
| qcom,iommu@fe064000 { | |
| #size-cells = <0x1>; | |
| qcom,iommu-lpae-bfb-data = <0x3 0x0 0x4 0x4 0x0 0xc 0x0 0x4 0x0 0x0 0x40 0x50 0x0>; | |
| ranges; | |
| reg-names = "iommu_base"; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| #address-cells = <0x1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008>; | |
| qcom,msm-bus,vectors-KBps = <0x34 0x200 0x0 0x0 0x34 0x200 0x0 0x3e8>; | |
| reg = <0xfe064000 0x10000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-smmu-v1"; | |
| qcom,iommu-lpae-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008>; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| label = "lpass_core_iommu"; | |
| qcom,msm-bus,name = "lpass_core_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,iommu-bfb-data = <0x3 0x4 0x4 0x0 0x0 0x0 0x4 0x0 0x0 0x40 0x50 0x0 0x0>; | |
| interrupts = <0x0 0xa6 0x0>; | |
| status = "disabled"; | |
| qcom,iommu-ctx@fe06c000 { | |
| qcom,iommu-ctx-sids = <0x0>; | |
| reg = <0xfe06c000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "lpass_core_cb_0"; | |
| interrupts = <0x0 0x10b 0x0>; | |
| }; | |
| qcom,iommu-ctx@fe06e000 { | |
| qcom,iommu-ctx-sids = <0x2>; | |
| reg = <0xfe06e000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "lpass_core_cb_2"; | |
| interrupts = <0x0 0x10b 0x0>; | |
| }; | |
| qcom,iommu-ctx@fe06d000 { | |
| qcom,iommu-ctx-sids = <0x1>; | |
| reg = <0xfe06d000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "lpass_core_cb_1"; | |
| interrupts = <0x0 0x10b 0x0>; | |
| }; | |
| }; | |
| qcom,hdmi_tx@fd922100 { | |
| cell-index = <0x0>; | |
| hpd-gdsc-supply = <0x21>; | |
| qcom,hdmi-tx-ddc-clk = <0x5 0x20 0x0>; | |
| reg-names = "core_physical", "phy_physical", "qfprom_physical"; | |
| core-vdda-supply = <0x2>; | |
| qcom,hdmi-tx-ddc-data = <0x5 0x21 0x0>; | |
| qcom,hdmi-tx-hpd = <0x5 0x22 0x0>; | |
| qcom,hdmi-tx-supply-names = "hpd-gdsc", "hpd-5v", "core-vdda", "core-vcc"; | |
| qcom,hdmi-tx-max-voltage-level = <0x0 0x0 0x1b7740 0x1b7740>; | |
| reg = <0xfd922100 0x370 0xfd922500 0x7c 0xfc4b8000 0x60f0>; | |
| compatible = "qcom,hdmi-tx"; | |
| hpd-5v-supply = <0x2c>; | |
| core-vcc-supply = <0x2d>; | |
| qcom,hdmi-tx-cec = <0x5 0x1f 0x0>; | |
| qcom,hdmi-tx-peak-current = <0x0 0x0 0x493e0 0x0>; | |
| status = "disabled"; | |
| qcom,hdmi-tx-min-voltage-level = <0x0 0x0 0x1b7740 0x1b7740>; | |
| qcom,mdss-fb-map = <0x2e>; | |
| qcom,msm-hdmi-audio-rx { | |
| compatible = "qcom,msm-hdmi-audio-codec-rx"; | |
| }; | |
| }; | |
| qcom,iommu@fd928000 { | |
| #size-cells = <0x1>; | |
| ranges; | |
| qcom,iommu-enable-halt; | |
| reg-names = "iommu_base"; | |
| vdd-supply = <0x21>; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| #address-cells = <0x1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2050 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x2314 0x2394 0x2414 0x2008 0x200c 0x2010 0x2014 0x2018 0x201c 0x2020>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x0 0x0 0x16 0x200 0x0 0x3e8>; | |
| reg = <0xfd928000 0x10000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-smmu-v1"; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| label = "mdp_iommu"; | |
| qcom,iommu-secure-id = <0x1>; | |
| qcom,msm-bus,name = "mdp_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,iommu-bfb-data = <0xffffffff 0x0 0x4 0x10 0x0 0x6800 0x6221 0x16231 0x0 0x34 0x74 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| interrupts = <0x0 0x49 0x0>; | |
| status = "ok"; | |
| qcom,iommu-ctx@fd932000 { | |
| qcom,secure-context; | |
| qcom,iommu-ctx-sids; | |
| reg = <0xfd932000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "mdp_2"; | |
| interrupts = <0x0 0x2f 0x0 0x0 0x2e 0x0>; | |
| }; | |
| qcom,iommu-ctx@fd931000 { | |
| qcom,secure-context; | |
| qcom,iommu-ctx-sids = <0x1>; | |
| reg = <0xfd931000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "mdp_1"; | |
| interrupts = <0x0 0x2f 0x0 0x0 0x2e 0x0>; | |
| }; | |
| qcom,iommu-ctx@fd930000 { | |
| qcom,iommu-ctx-sids = <0x0>; | |
| reg = <0xfd930000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "mdp_0"; | |
| interrupts = <0x0 0x2f 0x0>; | |
| }; | |
| }; | |
| qcom,vfe@fda10000 { | |
| cell-index = <0x0>; | |
| reg-names = "vfe", "vfe_vbif", "tcsr"; | |
| vdd-supply = <0x3>; | |
| interrupt-names = "vfe"; | |
| reg = <0xfda10000 0x1000 0xfda40000 0x200 0xfd4a8000 0x4>; | |
| compatible = "qcom,vfe40"; | |
| interrupts = <0x0 0x39 0x0>; | |
| }; | |
| qcom,cache_dump { | |
| qcom,l2-dump-size = <0x500000>; | |
| compatible = "qcom,cache_dump"; | |
| qcom,l1-dump-size = <0x100000>; | |
| }; | |
| qcom,ipc-spinlock@fd484000 { | |
| qcom,num-locks = <0x8>; | |
| reg = <0xfd484000 0x400>; | |
| compatible = "qcom,ipc-spinlock-sfpb"; | |
| }; | |
| cti@fc310000 { | |
| linux,phandle = <0xe>; | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc310000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| phandle = <0xe>; | |
| coresight-id = <0x1b>; | |
| coresight-name = "coresight-cti8"; | |
| }; | |
| qcom,pm-boot { | |
| qcom,mode = "tz"; | |
| compatible = "qcom,pm-boot"; | |
| }; | |
| qcom,csiphy@fda0ac00 { | |
| cell-index = <0x0>; | |
| reg-names = "csiphy", "csiphy_clk_mux"; | |
| interrupt-names = "csiphy"; | |
| reg = <0xfda0ac00 0x200 0xfda00030 0x4>; | |
| compatible = "qcom,csiphy"; | |
| interrupts = <0x0 0x4e 0x0>; | |
| }; | |
| qcom,csid@fda08400 { | |
| cell-index = <0x1>; | |
| reg-names = "csid"; | |
| qcom,mipi-csi-vdd-supply = <0x2>; | |
| interrupt-names = "csid"; | |
| reg = <0xfda08400 0x100>; | |
| compatible = "qcom,csid"; | |
| qcom,csi-vdd-voltage = <0x1b7740>; | |
| interrupts = <0x0 0x34 0x0>; | |
| }; | |
| gpio_keys { | |
| input-name = "gpio-keys"; | |
| compatible = "gpio-keys"; | |
| status = "ok"; | |
| hallsensor_key { | |
| gpio-key,wakeup; | |
| linux,code = <0x0>; | |
| linux,input-type = <0x5>; | |
| gpios = <0x5 0x44 0x1>; | |
| interrupt-parent = <0x5>; | |
| label = "hallsensor_key"; | |
| interrupts = <0x44 0x0>; | |
| debounce-interval = <0x96>; | |
| }; | |
| fingerprint_key { | |
| gpio-key,wakeup; | |
| linux,code = <0x78>; | |
| linux,input-type = <0x1>; | |
| gpios = <0x28 0x1 0x1>; | |
| label = "fingerprint_key"; | |
| debounce-interval = <0xf>; | |
| }; | |
| camera_focus { | |
| gpio-key,wakeup; | |
| linux,code = <0x210>; | |
| linux,input-type = <0x1>; | |
| gpios = <0x28 0x4 0x1>; | |
| label = "camera_focus"; | |
| debounce-interval = <0xf>; | |
| }; | |
| vol_down { | |
| linux,code = <0x72>; | |
| linux,input-type = <0x1>; | |
| gpios = <0x28 0x2 0x1>; | |
| label = "volume_down"; | |
| debounce-interval = <0xf>; | |
| }; | |
| camera_snapshot { | |
| #gpios = <0x28 0x3 0x1>; | |
| gpio-key,wakeup; | |
| linux,code = <0x2fe>; | |
| linux,input-type = <0x1>; | |
| label = "camera_snapshot"; | |
| debounce-interval = <0xf>; | |
| }; | |
| vol_up { | |
| linux,code = <0x73>; | |
| linux,input-type = <0x1>; | |
| gpios = <0x28 0x5 0x1>; | |
| label = "volume_up"; | |
| debounce-interval = <0xf>; | |
| }; | |
| }; | |
| qcom,mdss_dsi@fd922800 { | |
| linux,phandle = <0x24>; | |
| qcom,platform-te-gpio = <0x5 0xc 0x0>; | |
| cell-index = <0x0>; | |
| qcom,platform-enable-gpio76 = <0x5 0x4c 0x0>; | |
| qcom,dsi-pref-prim-pan = <0x29>; | |
| qcom,platform-lane-config = [00 00 00 00 00 00 00 01 97 00 00 00 00 05 00 00 01 97 00 00 00 00 0a 00 00 01 97 00 00 00 00 0f 00 00 01 97 00 c0 00 00 00 00 00 01 bb]; | |
| qcom,platform-regulator-settings = [07 09 03 00 20 00 01]; | |
| qcom,platform-strength-ctrl = [ff 06]; | |
| qcom,platform-reset-gpio = <0x28 0x13 0x0>; | |
| qcom,platform-enable-gpio = <0x5 0x3a 0x0>; | |
| reg = <0xfd922800 0x600>; | |
| compatible = "qcom,mdss-dsi-ctrl"; | |
| vddio-supply = <0x2>; | |
| qcom,mdss-mdp = <0x27>; | |
| phandle = <0x24>; | |
| label = "MDSS DSI CTRL->0"; | |
| qcom,platform-bist-ctrl = [00 00 b1 ff 00 00]; | |
| vdda-supply = <0x25>; | |
| qcom,mdss-fb-map = <0x26>; | |
| qcom,platform-supply-entry3 { | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-name = "vdda"; | |
| qcom,supply-post-on-sleep = <0x0>; | |
| qcom,supply-pre-off-sleep = <0x0>; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-min-voltage = <0x124f80>; | |
| qcom,supply-pre-on-sleep = <0x0>; | |
| qcom,supply-max-voltage = <0x124f80>; | |
| }; | |
| qcom,platform-supply-entry2 { | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-name = "vddio"; | |
| qcom,supply-post-on-sleep = <0x14>; | |
| qcom,supply-pre-off-sleep = <0x0>; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-min-voltage = <0x1b7740>; | |
| qcom,supply-pre-on-sleep = <0x0>; | |
| qcom,supply-max-voltage = <0x1b7740>; | |
| }; | |
| }; | |
| cti@fc342000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc342000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x1e>; | |
| coresight-name = "coresight-cti-cpu1"; | |
| }; | |
| cti@fc344000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc344000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x20>; | |
| coresight-name = "coresight-cti-cpu3"; | |
| }; | |
| qcom,ion { | |
| #size-cells = <0x0>; | |
| #address-cells = <0x1>; | |
| compatible = "qcom,msm-ion"; | |
| qcom,ion-heap@27 { | |
| qcom,ion-heap-type = "DMA"; | |
| reg = <0x1b>; | |
| compatible = "qcom,msm-ion-reserve"; | |
| linux,contiguous-region = <0x1c>; | |
| }; | |
| qcom,ion-heap@26 { | |
| qcom,heap-align = <0x1000>; | |
| qcom,ion-heap-type = "CARVEOUT"; | |
| reg = <0x1a>; | |
| compatible = "qcom,msm-ion-reserve"; | |
| qcom,memory-fixed = <0x8000000 0x5000000>; | |
| }; | |
| qcom,ion-heap@25 { | |
| qcom,ion-heap-type = "SYSTEM"; | |
| reg = <0x19>; | |
| }; | |
| qcom,ion-heap@21 { | |
| qcom,ion-heap-type = "SYSTEM_CONTIG"; | |
| reg = <0x15>; | |
| }; | |
| qcom,ion-heap@8 { | |
| qcom,default-prefetch-size = <0x6c00000>; | |
| qcom,heap-align = <0x1000>; | |
| qcom,ion-heap-type = "SECURE_DMA"; | |
| reg = <0x8>; | |
| compatible = "qcom,msm-ion-reserve"; | |
| linux,contiguous-region = <0x1a>; | |
| }; | |
| qcom,ion-heap@23 { | |
| qcom,heap-align = <0x1000>; | |
| qcom,ion-heap-type = "CARVEOUT"; | |
| reg = <0x17>; | |
| compatible = "qcom,msm-ion-reserve"; | |
| qcom,memory-fixed = <0x5a00000 0x2100000>; | |
| }; | |
| qcom,ion-heap@28 { | |
| qcom,heap-align = <0x1000>; | |
| qcom,ion-heap-type = "CARVEOUT"; | |
| qcom,memory-reservation-type = "EBI1"; | |
| reg = <0x1c>; | |
| compatible = "qcom,msm-ion-reserve"; | |
| qcom,memory-reservation-size = <0x614000>; | |
| }; | |
| qcom,ion-heap@22 { | |
| qcom,heap-align = <0x1000>; | |
| qcom,ion-heap-type = "DMA"; | |
| reg = <0x16>; | |
| compatible = "qcom,msm-ion-reserve"; | |
| linux,contiguous-region = <0x1b>; | |
| }; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_1_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_1_out"; | |
| gpios = <0x33 0x0 0x0>; | |
| }; | |
| qcom,msm-pcm-loopback { | |
| compatible = "qcom,msm-pcm-loopback"; | |
| }; | |
| cti@fc34d000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc34d000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x22>; | |
| coresight-name = "coresight-cti-wcn-cpu0"; | |
| }; | |
| gpio@fd510000 { | |
| linux,phandle = <0x5>; | |
| qcom,direct-connect-irqs = <0x8>; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| ngpio = <0x92>; | |
| interrupt-controller; | |
| reg = <0xfd510000 0x4000>; | |
| compatible = "qcom,msm-gpio"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x5>; | |
| interrupts = <0x0 0xd0 0x0>; | |
| }; | |
| qcom,qcedev@fd440000 { | |
| reg-names = "crypto-base", "crypto-bam-base"; | |
| qcom,msm-bus,vectors-KBps = <0x38 0x200 0x0 0x0 0x38 0x200 0x3c0f00 0x60180>; | |
| reg = <0xfd440000 0x20000 0xfd444000 0x8000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,qcedev"; | |
| qcom,bam-pipe-pair = <0x1>; | |
| qcom,ce-hw-instance = <0x1>; | |
| qcom,msm-bus,name = "qcedev-noc"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| interrupts = <0x0 0xec 0x0>; | |
| }; | |
| qcom,msm-sec-auxpcm { | |
| qcom,msm-cpudai-auxpcm-quant = <0x2 0x2>; | |
| qcom,msm-cpudai-auxpcm-sync = <0x1 0x1>; | |
| qcom,msm-cpudai-auxpcm-data = <0x0 0x0>; | |
| qcom,msm-cpudai-auxpcm-mode = <0x0 0x0>; | |
| compatible = "qcom,msm-auxpcm-dev"; | |
| qcom,msm-cpudai-auxpcm-frame = <0x5 0x4>; | |
| qcom,msm-auxpcm-interface = "secondary"; | |
| qcom,msm-cpudai-auxpcm-slot = <0x1 0x1>; | |
| qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>; | |
| }; | |
| qcom,iommu@fdee4000 { | |
| #size-cells = <0x1>; | |
| qcom,iommu-lpae-bfb-data = <0xffff 0x0 0x4 0x10 0x0 0x0 0xf 0x4b 0x1e00 0x5a2d 0x1e00 0x5a0f 0x0 0x0 0x0 0x0>; | |
| ranges; | |
| reg-names = "iommu_base"; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| #address-cells = <0x1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x2314 0x2394 0x2414 0x2494 0x20ac 0x215c 0x220c 0x22bc 0x2008 0x200c 0x2010 0x2014>; | |
| qcom,msm-bus,vectors-KBps = <0x5d 0x200 0x0 0x0 0x5d 0x200 0x0 0x3e8>; | |
| reg = <0xfdee4000 0x10000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-smmu-v1"; | |
| qcom,iommu-lpae-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x2314 0x2394 0x2414 0x2494 0x20ac 0x215c 0x220c 0x22bc 0x2008 0x200c 0x2010 0x2014>; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| label = "vpu_iommu"; | |
| qcom,msm-bus,name = "vpu_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,iommu-bfb-data = <0xffff 0x4 0x10 0x0 0x0 0xf 0x4b 0x0 0x1e00 0x1e00 0x5a0f 0x0 0x0 0x0 0x0 0x0>; | |
| interrupts = <0x0 0x93 0x0>; | |
| status = "disabled"; | |
| qcom,iommu-ctx@fdeec000 { | |
| qcom,iommu-ctx-sids = <0x0 0x1 0x3>; | |
| reg = <0xfdeec000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "vpu_cb_0"; | |
| interrupts = <0x0 0x91 0x0>; | |
| }; | |
| qcom,iommu-ctx@fdeed000 { | |
| qcom,iommu-ctx-sids = <0x8 0x9>; | |
| reg = <0xfdeed000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "vpu_cb_1"; | |
| interrupts = <0x0 0x91 0x0>; | |
| }; | |
| qcom,iommu-ctx@fdeee000 { | |
| qcom,iommu-ctx-sids = <0x5 0x7 0xf>; | |
| reg = <0xfdeee000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "vpu_cb_2"; | |
| interrupts = <0x0 0x91 0x0>; | |
| }; | |
| }; | |
| krait-pdn@f9011000 { | |
| #size-cells = <0x1>; | |
| qcom,use-phase-scaling-factor; | |
| ranges; | |
| reg-names = "apcs_gcc", "phase-scaling-efuse"; | |
| qcom,use-phase-switching; | |
| #address-cells = <0x1>; | |
| reg = <0xf9011000 0x1000 0xfc4b80b0 0x8>; | |
| compatible = "qcom,krait-pdn"; | |
| qcom,pfm-threshold = <0x4c>; | |
| regulator@f9098000 { | |
| linux,phandle = <0x5a>; | |
| reg-names = "acs", "mdd"; | |
| qcom,cpu-num = <0x1>; | |
| qcom,ldo-threshold-voltage = <0xcf850>; | |
| regulator-min-microvolt = <0x7a120>; | |
| reg = <0xf9098000 0x1000 0xf909a800 0x1000>; | |
| compatible = "qcom,krait-regulator"; | |
| qcom,headroom-voltage = <0x249f0>; | |
| regulator-max-microvolt = <0x13d620>; | |
| qcom,ldo-delta-voltage = <0xc350>; | |
| phandle = <0x5a>; | |
| qcom,retention-voltage = <0xa4cb8>; | |
| qcom,ldo-default-voltage = <0xb71b0>; | |
| regulator-name = "krait1"; | |
| }; | |
| regulator@f90a8000 { | |
| linux,phandle = <0x5b>; | |
| reg-names = "acs", "mdd"; | |
| qcom,cpu-num = <0x2>; | |
| qcom,ldo-threshold-voltage = <0xcf850>; | |
| regulator-min-microvolt = <0x7a120>; | |
| reg = <0xf90a8000 0x1000 0xf90aa800 0x1000>; | |
| compatible = "qcom,krait-regulator"; | |
| qcom,headroom-voltage = <0x249f0>; | |
| regulator-max-microvolt = <0x13d620>; | |
| qcom,ldo-delta-voltage = <0xc350>; | |
| phandle = <0x5b>; | |
| qcom,retention-voltage = <0xa4cb8>; | |
| qcom,ldo-default-voltage = <0xb71b0>; | |
| regulator-name = "krait2"; | |
| }; | |
| regulator@f9088000 { | |
| linux,phandle = <0x59>; | |
| reg-names = "acs", "mdd"; | |
| qcom,cpu-num = <0x0>; | |
| qcom,ldo-threshold-voltage = <0xcf850>; | |
| regulator-min-microvolt = <0x7a120>; | |
| reg = <0xf9088000 0x1000 0xf908a800 0x1000>; | |
| compatible = "qcom,krait-regulator"; | |
| qcom,headroom-voltage = <0x249f0>; | |
| regulator-max-microvolt = <0x13d620>; | |
| qcom,ldo-delta-voltage = <0xc350>; | |
| phandle = <0x59>; | |
| qcom,retention-voltage = <0xa4cb8>; | |
| qcom,ldo-default-voltage = <0xb71b0>; | |
| regulator-name = "krait0"; | |
| }; | |
| regulator@f90b8000 { | |
| linux,phandle = <0x5c>; | |
| reg-names = "acs", "mdd"; | |
| qcom,cpu-num = <0x3>; | |
| qcom,ldo-threshold-voltage = <0xcf850>; | |
| regulator-min-microvolt = <0x7a120>; | |
| reg = <0xf90b8000 0x1000 0xf90ba800 0x1000>; | |
| compatible = "qcom,krait-regulator"; | |
| qcom,headroom-voltage = <0x249f0>; | |
| regulator-max-microvolt = <0x13d620>; | |
| qcom,ldo-delta-voltage = <0xc350>; | |
| phandle = <0x5c>; | |
| qcom,retention-voltage = <0xa4cb8>; | |
| qcom,ldo-default-voltage = <0xb71b0>; | |
| regulator-name = "krait3"; | |
| }; | |
| }; | |
| wcn_etm0 { | |
| coresight-child-list = <0x16>; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x0>; | |
| compatible = "qcom,coresight-wcn-etm"; | |
| coresight-child-ports = <0x2>; | |
| coresight-id = <0x10>; | |
| coresight-name = "coresight-wcn-etm0"; | |
| }; | |
| qcom,mpm2-sleep-counter@fc4a3000 { | |
| reg = <0xfc4a3000 0x1000>; | |
| compatible = "qcom,mpm2-sleep-counter"; | |
| clock-frequency = <0x8000>; | |
| }; | |
| cti@fc350000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc350000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x23>; | |
| coresight-name = "coresight-cti-modem-cpu0"; | |
| }; | |
| qcom,cci@fda0C000 { | |
| #size-cells = <0x0>; | |
| cell-index = <0x0>; | |
| qcom,gpio-tbl-num = <0x0 0x1 0x2 0x3>; | |
| reg-names = "cci"; | |
| interrupt-names = "cci"; | |
| #address-cells = <0x1>; | |
| reg = <0xfda0c000 0x1000>; | |
| compatible = "qcom,cci"; | |
| gpios = <0x5 0x13 0x0 0x5 0x14 0x0 0x5 0x15 0x0 0x5 0x16 0x0>; | |
| qcom,gpio-tbl-label = "CCI_I2C_DATA0", "CCI_I2C_CLK0", "CCI_I2C_DATA1", "CCI_I2C_CLK1"; | |
| interrupts = <0x0 0x32 0x0>; | |
| qcom,gpio-tbl-flags = <0x1 0x1 0x1 0x1>; | |
| qcom,cci-master1 { | |
| qcom,hw-trdhld = <0x6>; | |
| qcom,hw-thd-dat = <0xd>; | |
| qcom,hw-tsu-sto = <0x32>; | |
| qcom,hw-tsp = <0x3>; | |
| qcom,hw-thigh = <0x14>; | |
| qcom,hw-tbuf = <0x19>; | |
| qcom,hw-thd-sta = <0x1e>; | |
| qcom,hw-tlow = <0x1c>; | |
| qcom,hw-tsu-sta = <0x32>; | |
| qcom,hw-scl-stretch-en = <0x0>; | |
| status = "ok"; | |
| }; | |
| qcom,camera@0 { | |
| qcom,gpio-vdig = <0x4>; | |
| cell-index = <0x0>; | |
| qcom,cam-vreg-type = <0x0 0x1 0x0 0x0>; | |
| qcom,sensor-mode = <0x0>; | |
| qcom,cam-vreg-op-mode = <0x19a28 0x0 0x13880 0x186a0>; | |
| qcom,led-flash-src = <0xb>; | |
| cam_vana-supply = <0x7>; | |
| qcom,sensor-position = <0x0>; | |
| qcom,gpio-standby = <0x2>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET1", "CAM_STANDBY", "CAM_VANA", "CAM_VDIG"; | |
| qcom,mount-angle = <0x5a>; | |
| qcom,eeprom-src = <0xa>; | |
| qcom,actuator-src = <0x9>; | |
| reg = <0x0>; | |
| qcom,csiphy-sd-index = <0x0>; | |
| compatible = "qcom,camera"; | |
| qcom,cam-vreg-max-voltage = <0x162010 0x0 0x2ab980 0x2ab980>; | |
| qcom,cci-master = <0x0>; | |
| qcom,gpio-req-tbl-flags = <0x1 0x0 0x0 0x0 0x0>; | |
| qcom,cam-vreg-min-voltage = <0x162010 0x0 0x2ab980 0x2ab980>; | |
| cam_vio-supply = <0x8>; | |
| gpios = <0x5 0xf 0x0 0x5 0x5a 0x0 0x5 0x59 0x0 0x5 0x49 0x0 0x5 0x45 0x0>; | |
| qcom,csid-sd-index = <0x0>; | |
| qcom,gpio-req-tbl-num = <0x0 0x1 0x2 0x3 0x4>; | |
| qcom,gpio-reset = <0x1>; | |
| qcom,gpio-vana = <0x3>; | |
| cam_vdig-supply = <0x6>; | |
| cam_vaf-supply = <0xc>; | |
| qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana", "cam_vaf"; | |
| status = "ok"; | |
| }; | |
| qcom,actuator@18 { | |
| linux,phandle = <0x9>; | |
| cell-index = <0x0>; | |
| reg = <0x18>; | |
| compatible = "qcom,actuator"; | |
| qcom,cci-master = <0x0>; | |
| phandle = <0x9>; | |
| }; | |
| qcom,actuator@36 { | |
| cell-index = <0x1>; | |
| reg = <0x36>; | |
| compatible = "qcom,actuator"; | |
| qcom,cci-master = <0x0>; | |
| }; | |
| qcom,cci-master0 { | |
| qcom,hw-trdhld = <0x6>; | |
| qcom,hw-thd-dat = <0xd>; | |
| qcom,hw-tsu-sto = <0x32>; | |
| qcom,hw-tsp = <0x3>; | |
| qcom,hw-thigh = <0x14>; | |
| qcom,hw-tbuf = <0x19>; | |
| qcom,hw-thd-sta = <0x1e>; | |
| qcom,hw-tlow = <0x1c>; | |
| qcom,hw-tsu-sta = <0x32>; | |
| qcom,hw-scl-stretch-en = <0x0>; | |
| status = "ok"; | |
| }; | |
| qcom,eeprom@0 { | |
| qcom,cam-power-seq-type = "sensor_gpio", "sensor_gpio", "sensor_vreg", "sensor_vreg", "sensor_vreg", "sensor_gpio", "sensor_gpio", "sensor_gpio", "sensor_clk"; | |
| linux,phandle = <0xa>; | |
| qcom,gpio-vdig = <0x4>; | |
| qcom,csi-lane-mask = <0x1f>; | |
| cell-index = <0x0>; | |
| qcom,mem0 = <0x1a 0x0 0x1 0x0 0x1 0x0>; | |
| qcom,mem2 = <0xff 0x0 0x1 0x0 0x1 0x0>; | |
| qcom,pageen3 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| qcom,page1 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| qcom,cam-vreg-type = <0x0 0x1 0x0>; | |
| qcom,saddr0 = <0xa0>; | |
| qcom,eeprom-name = "sunny_16825"; | |
| qcom,poll2 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| qcom,page4 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| qcom,cam-vreg-op-mode = <0x19a28 0x0 0x13880>; | |
| qcom,poll1 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| qcom,saddr1 = <0xa4>; | |
| cam_vana-supply = <0x7>; | |
| qcom,slave-addr = <0x0>; | |
| qcom,page2 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| qcom,gpio-standby = <0x2>; | |
| qcom,num-blocks = <0x6>; | |
| qcom,saddr2 = <0xa6>; | |
| qcom,pageen1 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET1", "CAM_STANDBY", "CAM_VANA", "CAM_VDIG"; | |
| qcom,pageen2 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| qcom,cam-power-seq-cfg-val = <0x1 0x1 0x1 0x1 0x1 0x1 0x1 0x0 0x16e3600>; | |
| qcom,cam-power-seq-delay = <0xa 0xa 0x1 0x1 0x1 0xa 0x1e 0x1e 0x5>; | |
| qcom,poll0 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| qcom,page0 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| qcom,gpio-set-tbl-delay = <0x3e8 0x7530>; | |
| reg = <0x0 0x0>; | |
| qcom,saddr3 = <0xa8>; | |
| qcom,mem1 = <0xff 0x0 0x1 0x0 0x1 0x0>; | |
| compatible = "qcom,eeprom"; | |
| qcom,mem5 = <0x55 0x0 0x1 0x0 0x1 0x0>; | |
| qcom,cam-vreg-max-voltage = <0x13d620 0x0 0x2b7cd0>; | |
| qcom,saddr5 = <0xac>; | |
| qcom,csi-lane-assign = <0x4320>; | |
| qcom,cci-master = <0x0>; | |
| qcom,gpio-req-tbl-flags = <0x1 0x0 0x0 0x0 0x0>; | |
| qcom,cam-vreg-min-voltage = <0x13d620 0x0 0x2b7cd0>; | |
| qcom,saddr4 = <0xaa>; | |
| qcom,gpio-set-tbl-num = <0x1 0x1>; | |
| qcom,pageen4 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| cam_vio-supply = <0x8>; | |
| qcom,page3 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| gpios = <0x5 0xf 0x0 0x5 0x5a 0x0 0x5 0x59 0x0 0x5 0x49 0x0 0x5 0x45 0x0>; | |
| qcom,poll4 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| qcom,cam-power-seq-val = "sensor_gpio_standby", "sensor_gpio_vana", "cam_vana", "cam_vio", "cam_vdig", "sensor_gpio_vdig", "sensor_gpio_reset", "sensor_gpio_standby", "sensor_cam_mclk"; | |
| qcom,gpio-req-tbl-num = <0x0 0x1 0x2 0x3 0x4>; | |
| qcom,gpio-reset = <0x1>; | |
| qcom,poll3 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| phandle = <0xa>; | |
| qcom,gpio-no-mux = <0x0>; | |
| qcom,page5 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| qcom,gpio-vana = <0x3>; | |
| qcom,gpio-set-tbl-flags = <0x0 0x2>; | |
| qcom,pageen0 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| cam_vdig-supply = <0x6>; | |
| qcom,mem4 = <0xff 0x0 0x1 0x0 0x1 0x0>; | |
| qcom,pageen5 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana"; | |
| qcom,poll5 = <0x0 0x0 0x2 0x0 0x1 0x5>; | |
| qcom,mem3 = <0xff 0x0 0x1 0x0 0x1 0x0>; | |
| }; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_1_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_1_in"; | |
| gpios = <0x32 0x0 0x0>; | |
| }; | |
| qcom,irqrouter@fda00000 { | |
| cell-index = <0x0>; | |
| reg-names = "irqrouter"; | |
| reg = <0xfda00000 0x100>; | |
| compatible = "qcom,irqrouter"; | |
| }; | |
| serial@f991f000 { | |
| reg = <0xf991f000 0x1000>; | |
| compatible = "qcom,msm-lsuart-v14"; | |
| interrupts = <0x0 0x6d 0x0>; | |
| status = "disabled"; | |
| }; | |
| cti@fc30a000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc30a000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x15>; | |
| coresight-name = "coresight-cti2"; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_2_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_2_in"; | |
| gpios = <0x34 0x0 0x0>; | |
| }; | |
| cti@fc30d000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc30d000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x18>; | |
| coresight-name = "coresight-cti5"; | |
| }; | |
| qcom,gdsc@fc401b44 { | |
| reg = <0xfc401b44 0x4>; | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_pcie_1"; | |
| status = "disabled"; | |
| }; | |
| qcom,ssusb@f9200000 { | |
| #size-cells = <0x1>; | |
| linux,phandle = <0x5f>; | |
| ranges; | |
| qcom,vdd-voltage-level = <0x1 0x5 0x7>; | |
| interrupt-map = <0x0 0x0 0x1 0x0 0x85 0x0 0x0 0x1 0x60 0x0 0x0 0x9 0x0>; | |
| qcom,dwc-usb3-msm-qdss-tx-fifo-size = <0x2000>; | |
| qcom,usbin-vadc = <0x50>; | |
| hsusb_vdd_dig-supply = <0x41>; | |
| qcom,dwc-usb3-msm-dbm-eps = <0x4>; | |
| interrupt-names = "hs_phy_irq", "pmic_id_irq"; | |
| #address-cells = <0x1>; | |
| qcom,dwc-usb3-msm-tx-fifo-size = <0x7400>; | |
| interrupt-map-mask = <0x0 0xffffffff>; | |
| vbus_dwc3-supply = <0x61>; | |
| qcom,msm-bus,vectors-KBps = <0x3d 0x200 0x0 0x0 0x3d 0x200 0x3a980 0xea600>; | |
| dwc_usb3-adc_tm = <0x52>; | |
| SSUSB_1p8-supply = <0x42>; | |
| qcom,dwc-hsphy-init = <0xd191a4>; | |
| reg = <0xf9200000 0xfc000 0xfd4ab000 0x4>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,misc-ref = <0x62>; | |
| compatible = "qcom,dwc-usb3-msm"; | |
| qcom,otg-capability; | |
| #interrupt-cells = <0x1>; | |
| interrupt-parent = <0x5f>; | |
| phandle = <0x5f>; | |
| HSUSB_3p3-supply = <0x43>; | |
| qcom,msm-bus,name = "usb3"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| HSUSB_1p8-supply = <0x42>; | |
| ssusb_vdd_dig-supply = <0x41>; | |
| interrupts = <0x0 0x1>; | |
| dwc3@f9200000 { | |
| interrupt-names = "irq", "otg_irq"; | |
| reg = <0xf9200000 0xfc000>; | |
| compatible = "synopsys,dwc3"; | |
| interrupt-parent = <0x1>; | |
| interrupts = <0x0 0x83 0x0 0x0 0xb3 0x0>; | |
| tx-fifo-resize; | |
| }; | |
| }; | |
| uart@f995d000 { | |
| linux,phandle = <0x70>; | |
| reg-names = "core_mem", "bam_mem"; | |
| interrupt-map = <0x0 0x1 0x0 0x71 0x0 0x1 0x1 0x0 0xef 0x0 0x2 0x5 0x2a 0x0>; | |
| interrupt-names = "core_irq", "bam_irq", "wakeup_irq"; | |
| #address-cells = <0x0>; | |
| interrupt-map-mask = <0xffffffff>; | |
| qcom,msm-bus,vectors-KBps = <0x54 0x200 0x0 0x0 0x54 0x200 0x1f4 0x320>; | |
| qcom,bam-rx-ep-pipe-index = <0x1>; | |
| reg = <0xf995d000 0x1000 0xf9944000 0x19000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-hsuart-v14"; | |
| qcom,bam-tx-ep-pipe-index = <0x0>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-parent = <0x70>; | |
| phandle = <0x70>; | |
| qcom,msm-bus,name = "uart7"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| interrupts = <0x0 0x1 0x2>; | |
| status = "ok"; | |
| }; | |
| serial@f995e000 { | |
| reg = <0xf995e000 0x1000>; | |
| compatible = "qcom,msm-lsuart-v14"; | |
| interrupts = <0x0 0x72 0x0>; | |
| status = "disabled"; | |
| }; | |
| qcom,spmi@fc4c0000 { | |
| #size-cells = <0x0>; | |
| linux,phandle = <0x60>; | |
| cell-index = <0x0>; | |
| reg-names = "core", "intr", "cnfg"; | |
| #address-cells = <0x1>; | |
| qcom,pmic-arb-ee = <0x0>; | |
| qcom,pmic-arb-channel = <0x0>; | |
| interrupt-controller; | |
| reg = <0xfc4cf000 0x1000 0xfc4cb000 0x1000 0xfc4ca000 0x1000>; | |
| compatible = "qcom,spmi-pmic-arb"; | |
| #interrupt-cells = <0x3>; | |
| phandle = <0x60>; | |
| interrupts = <0x0 0xbe 0x0 0x0 0xbb 0x0>; | |
| qcom,pm8841@4 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| reg = <0x4>; | |
| spmi-slave-container; | |
| qcom,qpnp-revid@100 { | |
| reg = <0x100 0x100>; | |
| compatible = "qcom,qpnp-revid"; | |
| }; | |
| mpps { | |
| #size-cells = <0x1>; | |
| #gpio-cells = <0x2>; | |
| #address-cells = <0x1>; | |
| gpio-controller; | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-pin"; | |
| label = "pm8841-mpp"; | |
| mpp@a300 { | |
| reg = <0xa300 0x100>; | |
| qcom,pin-num = <0x4>; | |
| }; | |
| mpp@a100 { | |
| reg = <0xa100 0x100>; | |
| qcom,pin-num = <0x2>; | |
| }; | |
| mpp@a200 { | |
| reg = <0xa200 0x100>; | |
| qcom,pin-num = <0x3>; | |
| }; | |
| mpp@a000 { | |
| reg = <0xa000 0x100>; | |
| qcom,pin-num = <0x1>; | |
| }; | |
| }; | |
| qcom,temp-alarm@2400 { | |
| qcom,default-temp = <0x9088>; | |
| reg = <0x2400 0x100>; | |
| compatible = "qcom,qpnp-temp-alarm"; | |
| label = "pm8841_tz"; | |
| qcom,threshold-set = <0x0>; | |
| interrupts = <0x4 0x24 0x0>; | |
| }; | |
| }; | |
| qcom,pm8941@0 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| reg = <0x0>; | |
| spmi-slave-container; | |
| mpps { | |
| #size-cells = <0x1>; | |
| linux,phandle = <0x76>; | |
| #gpio-cells = <0x2>; | |
| #address-cells = <0x1>; | |
| gpio-controller; | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-pin"; | |
| phandle = <0x76>; | |
| label = "pm8941-mpp"; | |
| mpp@a300 { | |
| reg = <0xa300 0x100>; | |
| qcom,pin-num = <0x4>; | |
| }; | |
| mpp@a100 { | |
| qcom,mode = <0x1>; | |
| qcom,master-en = <0x1>; | |
| reg = <0xa100 0x100>; | |
| qcom,pin-num = <0x2>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| mpp@a200 { | |
| reg = <0xa200 0x100>; | |
| qcom,pin-num = <0x3>; | |
| }; | |
| mpp@a000 { | |
| reg = <0xa000 0x100>; | |
| qcom,pin-num = <0x1>; | |
| status = "disabled"; | |
| }; | |
| mpp@a400 { | |
| reg = <0xa400 0x100>; | |
| qcom,pin-num = <0x5>; | |
| }; | |
| mpp@a600 { | |
| qcom,mode = <0x1>; | |
| qcom,master-en = <0x1>; | |
| reg = <0xa600 0x100>; | |
| qcom,pin-num = <0x7>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| mpp@a700 { | |
| qcom,mode = <0x1>; | |
| qcom,master-en = <0x1>; | |
| reg = <0xa700 0x100>; | |
| qcom,pin-num = <0x8>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| mpp@a500 { | |
| qcom,mode = <0x1>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| reg = <0xa500 0x100>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,output-type = <0x0>; | |
| qcom,pin-num = <0x6>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| }; | |
| qcom,power-on@800 { | |
| interrupt-names = "kpdpwr", "resin", "resin-bark", "kpdpwr-resin-bark"; | |
| qcom,pon-dbc-delay = <0x3d09>; | |
| reg = <0x800 0x100>; | |
| compatible = "qcom,qpnp-power-on"; | |
| qcom,system-reset; | |
| interrupts = <0x0 0x8 0x0 0x0 0x8 0x1 0x0 0x8 0x4 0x0 0x8 0x5>; | |
| qcom,s3-debounce = <0x20>; | |
| qcom,pon_1 { | |
| qcom,pon-type = <0x0>; | |
| linux,code = <0x74>; | |
| qcom,pull-up = <0x1>; | |
| }; | |
| qcom,pon_2 { | |
| qcom,s1-timer = <0x0>; | |
| qcom,support-reset = <0x1>; | |
| qcom,s2-type = <0x1>; | |
| qcom,pon-type = <0x1>; | |
| qcom,use-bark; | |
| linux,code = <0x0>; | |
| qcom,s2-timer = <0x7d0>; | |
| qcom,pull-up = <0x1>; | |
| }; | |
| qcom,pon_3 { | |
| qcom,s1-timer = <0x1a40>; | |
| qcom,support-reset = <0x1>; | |
| qcom,s2-type = <0x7>; | |
| qcom,pon-type = <0x3>; | |
| qcom,use-bark; | |
| qcom,s2-timer = <0x7d0>; | |
| qcom,pull-up = <0x1>; | |
| }; | |
| }; | |
| qcom,bsi@1b00 { | |
| reg-names = "bsi-base", "batt-id-status"; | |
| qcom,channel-num = <0x31>; | |
| qcom,vref-microvolts = <0x1b7740>; | |
| qcom,pullup-ohms = <0x186a0>; | |
| interrupt-names = "err", "rx", "tx", "batt-present"; | |
| qcom,bsi-vadc = <0x50>; | |
| qcom,min-clock-period = <0x3e8>; | |
| reg = <0x1b00 0x100 0x1208 0x1>; | |
| compatible = "qcom,qpnp-bsi"; | |
| qcom,max-clock-period = <0x27100>; | |
| qcom,sample-rate = <0x4>; | |
| label = "pm8941-bsi"; | |
| interrupts = <0x0 0x1b 0x0 0x0 0x1b 0x1 0x0 0x1b 0x2 0x0 0x12 0x0>; | |
| }; | |
| qcom,pm8941_rtc { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| qcom,qpnp-rtc-write = <0x0>; | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-rtc"; | |
| qcom,qpnp-rtc-alarm-pwrup = <0x1>; | |
| qcom,pm8941_rtc_rw@6000 { | |
| reg = <0x6000 0x100>; | |
| }; | |
| qcom,pm8941_rtc_alarm@6100 { | |
| reg = <0x6100 0x100>; | |
| interrupts = <0x0 0x61 0x1>; | |
| }; | |
| }; | |
| clkdiv@5d00 { | |
| qcom,cxo-freq = <0x124f800>; | |
| reg = <0x5d00 0x1000>; | |
| compatible = "qcom,qpnp-clkdiv"; | |
| }; | |
| clkdiv@5b00 { | |
| qcom,cxo-freq = <0x124f800>; | |
| reg = <0x5b00 0x100>; | |
| compatible = "qcom,qpnp-clkdiv"; | |
| qcom,cxo-div = <0x2>; | |
| }; | |
| iadc@3600 { | |
| #size-cells = <0x0>; | |
| linux,phandle = <0x51>; | |
| qcom,iadc-vadc = <0x50>; | |
| reg-names = "iadc-base", "batt-id-trim-cnst-rds"; | |
| interrupt-names = "eoc-int-en-set"; | |
| #address-cells = <0x1>; | |
| qcom,adc-vdd-reference = <0x708>; | |
| qcom,adc-bit-resolution = <0x10>; | |
| qcom,pmic-revid = <0x54>; | |
| reg = <0x3600 0x100 0x12f1 0x1>; | |
| compatible = "qcom,qpnp-iadc"; | |
| qcom,use-default-rds-trim = <0x0>; | |
| phandle = <0x51>; | |
| qcom,iadc-poll-eoc; | |
| interrupts = <0x0 0x36 0x0>; | |
| chan@0 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x0>; | |
| reg = <0x0>; | |
| label = "internal_rsense"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x1>; | |
| qcom,calibration-type = "absolute"; | |
| }; | |
| }; | |
| qcom,charger { | |
| #size-cells = <0x1>; | |
| qcom,vbatdet-delta-mv = <0x64>; | |
| qcom,cool-bat-mv = <0x1068>; | |
| qcom,ibat-calibration-enabled; | |
| qcom,thermal-mitigation = <0x7d0 0x384 0x384 0xc8>; | |
| #address-cells = <0x1>; | |
| qcom,resume-soc = <0x63>; | |
| spmi-dev-container; | |
| qcom,vinmin-mv = <0x1130>; | |
| qcom,ibatsafe-ma = <0x7d0>; | |
| otg-parent-supply = <0x4f>; | |
| compatible = "qcom,qpnp-charger"; | |
| qcom,chg-iadc = <0x51>; | |
| qcom,chg-vadc = <0x50>; | |
| qcom,chg-adc_tm = <0x52>; | |
| qcom,battery-data = <0x53>; | |
| qcom,ibatterm-ma = <0x96>; | |
| qcom,ibatmax-cool-ma = <0x384>; | |
| qcom,warm-bat-mv = <0x1004>; | |
| qcom,vddmax-mv = <0x1100>; | |
| qcom,vddsafe-mv = <0x10fe>; | |
| qcom,ibatmax-ma = <0x7d0>; | |
| status = "ok"; | |
| qcom,ibatmax-warm-ma = <0x384>; | |
| qcom,tchg-mins = <0x96>; | |
| qcom,dc-chgpth@1400 { | |
| interrupt-names = "coarse-det-dc", "dcin-valid"; | |
| reg = <0x1400 0x100>; | |
| interrupts = <0x0 0x14 0x0 0x0 0x14 0x1>; | |
| status = "ok"; | |
| }; | |
| qcom,bat-if@1200 { | |
| linux,phandle = <0x22>; | |
| interrupt-names = "batt-pres", "bat-temp-ok", "bat-fet-on", "vcp-on", "psi"; | |
| reg = <0x1200 0x100>; | |
| phandle = <0x22>; | |
| regulator-name = "batfet"; | |
| interrupts = <0x0 0x12 0x0 0x0 0x12 0x1 0x0 0x12 0x2 0x0 0x12 0x3 0x0 0x12 0x4>; | |
| status = "ok"; | |
| }; | |
| qcom,chg-misc@1600 { | |
| reg = <0x1600 0x100>; | |
| status = "ok"; | |
| }; | |
| qcom,usb-chgpth@1300 { | |
| linux,phandle = <0x55>; | |
| interrupt-names = "coarse-det-usb", "usbin-valid", "chg-gone"; | |
| reg = <0x1300 0x100>; | |
| phandle = <0x55>; | |
| regulator-name = "8941_smbb_otg"; | |
| interrupts = <0x0 0x13 0x0 0x0 0x13 0x1 0x0 0x13 0x2>; | |
| status = "ok"; | |
| }; | |
| qcom,chgr@1000 { | |
| interrupt-names = "vbat-det-lo", "vbat-det-hi", "chgwdog", "state-change", "trkl-chg-on", "fast-chg-on", "chg-failed", "chg-done"; | |
| reg = <0x1000 0x100>; | |
| interrupts = <0x0 0x10 0x0 0x0 0x10 0x1 0x0 0x10 0x2 0x0 0x10 0x3 0x0 0x10 0x4 0x0 0x10 0x5 0x0 0x10 0x6 0x0 0x10 0x7>; | |
| status = "ok"; | |
| }; | |
| qcom,boost@1500 { | |
| linux,phandle = <0x56>; | |
| interrupt-names = "boost-pwr-ok", "limit-error"; | |
| regulator-min-microvolt = <0x4c4b40>; | |
| reg = <0x1500 0x100>; | |
| regulator-max-microvolt = <0x4c4b40>; | |
| phandle = <0x56>; | |
| regulator-name = "8941_smbb_boost"; | |
| interrupts = <0x0 0x15 0x0 0x0 0x15 0x1>; | |
| status = "ok"; | |
| }; | |
| qcom,buck@1100 { | |
| interrupt-names = "vbat-ov", "vreg-ov", "overtemp", "vchg-loop", "ichg-loop", "ibat-loop", "vdd-loop"; | |
| reg = <0x1100 0x100>; | |
| interrupts = <0x0 0x11 0x0 0x0 0x11 0x1 0x0 0x11 0x2 0x0 0x11 0x3 0x0 0x11 0x4 0x0 0x11 0x5 0x0 0x11 0x6>; | |
| status = "ok"; | |
| }; | |
| }; | |
| qcom,coincell@2800 { | |
| reg = <0x2800 0x100>; | |
| compatible = "qcom,qpnp-coincell"; | |
| }; | |
| qcom,revid@100 { | |
| linux,phandle = <0x54>; | |
| reg = <0x100 0x100>; | |
| compatible = "qcom,qpnp-revid"; | |
| phandle = <0x54>; | |
| }; | |
| qcom,temp-alarm@2400 { | |
| qcom,channel-num = <0x8>; | |
| reg = <0x2400 0x100>; | |
| compatible = "qcom,qpnp-temp-alarm"; | |
| qcom,temp_alarm-vadc = <0x50>; | |
| label = "pm8941_tz"; | |
| qcom,threshold-set = <0x0>; | |
| interrupts = <0x0 0x24 0x0>; | |
| }; | |
| qcom,vadc@3400 { | |
| #size-cells = <0x0>; | |
| linux,phandle = <0x52>; | |
| interrupt-names = "eoc-int-en-set", "high-thr-en-set", "low-thr-en-set"; | |
| #address-cells = <0x1>; | |
| qcom,adc-vdd-reference = <0x708>; | |
| qcom,adc_tm-vadc = <0x50>; | |
| qcom,adc-bit-resolution = <0xf>; | |
| reg = <0x3400 0x100>; | |
| compatible = "qcom,qpnp-adc-tm"; | |
| phandle = <0x52>; | |
| interrupts = <0x0 0x34 0x0 0x0 0x34 0x3 0x0 0x34 0x4>; | |
| chan@8 { | |
| qcom,btm-channel-number = <0x70>; | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x3>; | |
| reg = <0x8>; | |
| label = "die_temp"; | |
| qcom,fast-avg-setup = <0x3>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "absolute"; | |
| }; | |
| chan@b4 { | |
| qcom,btm-channel-number = <0x90>; | |
| qcom,decimation = <0x0>; | |
| qcom,thermal-node; | |
| qcom,scale-function = <0x2>; | |
| reg = <0xb4>; | |
| label = "emmc_therm"; | |
| qcom,fast-avg-setup = <0x3>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| }; | |
| chan@b7 { | |
| qcom,btm-channel-number = <0x88>; | |
| qcom,decimation = <0x0>; | |
| qcom,thermal-node; | |
| qcom,scale-function = <0x2>; | |
| reg = <0xb7>; | |
| label = "pa_therm1"; | |
| qcom,fast-avg-setup = <0x3>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| }; | |
| chan@b3 { | |
| qcom,btm-channel-number = <0x98>; | |
| qcom,decimation = <0x0>; | |
| qcom,thermal-node; | |
| qcom,scale-function = <0x2>; | |
| reg = <0xb3>; | |
| label = "msm_therm"; | |
| qcom,fast-avg-setup = <0x3>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| }; | |
| chan@6 { | |
| qcom,btm-channel-number = <0x78>; | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x0>; | |
| reg = <0x6>; | |
| label = "vbat_sns"; | |
| qcom,fast-avg-setup = <0x3>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x1>; | |
| qcom,calibration-type = "absolute"; | |
| }; | |
| chan@b9 { | |
| qcom,btm-channel-number = <0x48>; | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x2>; | |
| reg = <0xb9>; | |
| label = "usb_id"; | |
| qcom,fast-avg-setup = <0x3>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| }; | |
| chan@b5 { | |
| qcom,btm-channel-number = <0x80>; | |
| qcom,decimation = <0x0>; | |
| qcom,thermal-node; | |
| qcom,scale-function = <0x2>; | |
| reg = <0xb5>; | |
| label = "pa_therm0"; | |
| qcom,fast-avg-setup = <0x3>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| }; | |
| chan@30 { | |
| qcom,btm-channel-number = <0x68>; | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x1>; | |
| reg = <0x30>; | |
| label = "batt_therm"; | |
| qcom,fast-avg-setup = <0x3>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,meas-interval-timer-idx = <0x2>; | |
| }; | |
| }; | |
| gpios { | |
| #size-cells = <0x1>; | |
| linux,phandle = <0x28>; | |
| #gpio-cells = <0x2>; | |
| #address-cells = <0x1>; | |
| gpio-controller; | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-pin"; | |
| phandle = <0x28>; | |
| label = "pm8941-gpio"; | |
| gpio@c800 { | |
| qcom,mode = <0x1>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x0>; | |
| qcom,pull = <0x5>; | |
| reg = <0xc800 0x100>; | |
| qcom,vin-sel = <0x0>; | |
| qcom,output-type = <0x0>; | |
| qcom,pin-num = <0x9>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| gpio@db00 { | |
| reg = <0xdb00 0x100>; | |
| qcom,pin-num = <0x1c>; | |
| }; | |
| gpio@d300 { | |
| qcom,mode = <0x1>; | |
| qcom,src-sel = <0x2>; | |
| qcom,master-en = <0x1>; | |
| reg = <0xd300 0x100>; | |
| qcom,pin-num = <0x14>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| gpio@c000 { | |
| qcom,mode = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x0>; | |
| reg = <0xc000 0x100>; | |
| qcom,pin-num = <0x1>; | |
| }; | |
| gpio@e300 { | |
| reg = <0xe300 0x100>; | |
| qcom,pin-num = <0x24>; | |
| }; | |
| gpio@dd00 { | |
| qcom,mode = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x4>; | |
| reg = <0xdd00 0x100>; | |
| qcom,pin-num = <0x1e>; | |
| }; | |
| gpio@d200 { | |
| qcom,mode = <0x1>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x5>; | |
| reg = <0xd200 0x100>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,output-type = <0x0>; | |
| qcom,pin-num = <0x13>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| gpio@e000 { | |
| qcom,mode = <0x1>; | |
| qcom,period = <0x1f40>; | |
| qcom,src-sel = <0x3>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x5>; | |
| reg = <0xe000 0x100>; | |
| qcom,invert = <0x0>; | |
| qcom,vin-sel = <0x0>; | |
| qcom,output-type = <0x0>; | |
| qcom,pin-num = <0x21>; | |
| qcom,mode-select = <0x0>; | |
| qcom,duty = <0x1770>; | |
| qcom,out-strength = <0x2>; | |
| status = "okay"; | |
| qcom,pwm { | |
| qcom,duty = <0xfa0>; | |
| label = "pwm"; | |
| }; | |
| }; | |
| gpio@cf00 { | |
| qcom,mode = <0x1>; | |
| qcom,src-sel = <0x3>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x5>; | |
| reg = <0xcf00 0x100>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,output-type = <0x0>; | |
| qcom,pin-num = <0x10>; | |
| qcom,out-strength = <0x3>; | |
| }; | |
| gpio@c200 { | |
| qcom,mode = <0x1>; | |
| #qcom,pull = <0x0>; | |
| #qcom,vin-sel = <0x2>; | |
| qcom,src-sel = <0x2>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x5>; | |
| reg = <0xc200 0x100>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,output-type = <0x0>; | |
| qcom,pin-num = <0x3>; | |
| #qcom,master-en = <0x1>; | |
| #qcom,mode = <0x0>; | |
| #qcom,src-sel = <0x0>; | |
| qcom,out-strength = <0x3>; | |
| }; | |
| gpio@c100 { | |
| qcom,mode = <0x0>; | |
| qcom,src-sel = <0x0>; | |
| qcom,pull = <0x5>; | |
| reg = <0xc100 0x100>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,pin-num = <0x2>; | |
| }; | |
| gpio@d100 { | |
| reg = <0xd100 0x100>; | |
| qcom,pin-num = <0x12>; | |
| }; | |
| gpio@d400 { | |
| reg = <0xd400 0x100>; | |
| qcom,pin-num = <0x15>; | |
| }; | |
| gpio@cc00 { | |
| qcom,mode = <0x1>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x5>; | |
| reg = <0xcc00 0x100>; | |
| qcom,invert = <0x0>; | |
| qcom,vin-sel = <0x0>; | |
| qcom,output-type = <0x0>; | |
| qcom,pin-num = <0xd>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| gpio@ce00 { | |
| qcom,mode = <0x1>; | |
| qcom,src-sel = <0x2>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x5>; | |
| reg = <0xce00 0x100>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,output-type = <0x0>; | |
| qcom,pin-num = <0xf>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| gpio@c900 { | |
| qcom,mode = <0x1>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x5>; | |
| reg = <0xc900 0x100>; | |
| qcom,vin-sel = <0x0>; | |
| qcom,output-type = <0x0>; | |
| qcom,pin-num = <0xa>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| gpio@cd00 { | |
| qcom,mode = <0x1>; | |
| qcom,src-sel = <0x2>; | |
| qcom,master-en = <0x1>; | |
| reg = <0xcd00 0x100>; | |
| qcom,pin-num = <0xe>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| gpio@e200 { | |
| qcom,mode = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x4>; | |
| reg = <0xe200 0x100>; | |
| qcom,pin-num = <0x23>; | |
| }; | |
| gpio@c600 { | |
| qcom,mode = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x0>; | |
| reg = <0xc600 0x100>; | |
| qcom,pin-num = <0x7>; | |
| }; | |
| gpio@e100 { | |
| qcom,mode = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x4>; | |
| reg = <0xe100 0x100>; | |
| qcom,pin-num = <0x22>; | |
| }; | |
| gpio@c700 { | |
| qcom,mode = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x0>; | |
| reg = <0xc700 0x100>; | |
| qcom,pin-num = <0x8>; | |
| }; | |
| gpio@c400 { | |
| qcom,mode = <0x0>; | |
| qcom,src-sel = <0x0>; | |
| qcom,pull = <0x5>; | |
| reg = <0xc400 0x100>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,pin-num = <0x5>; | |
| }; | |
| gpio@d600 { | |
| qcom,mode = <0x1>; | |
| qcom,src-sel = <0x2>; | |
| qcom,master-en = <0x1>; | |
| reg = <0xd600 0x100>; | |
| qcom,pin-num = <0x17>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| gpio@d500 { | |
| qcom,mode = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x4>; | |
| reg = <0xd500 0x100>; | |
| qcom,pin-num = <0x16>; | |
| }; | |
| gpio@cb00 { | |
| qcom,mode = <0x1>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x5>; | |
| reg = <0xcb00 0x100>; | |
| qcom,invert = <0x0>; | |
| qcom,vin-sel = <0x0>; | |
| qcom,output-type = <0x0>; | |
| qcom,pin-num = <0xc>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| gpio@d900 { | |
| qcom,mode = <0x1>; | |
| qcom,src-sel = <0x2>; | |
| qcom,master-en = <0x1>; | |
| reg = <0xd900 0x100>; | |
| qcom,pin-num = <0x1a>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| gpio@df00 { | |
| qcom,mode = <0x0>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x4>; | |
| reg = <0xdf00 0x100>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,pin-num = <0x20>; | |
| }; | |
| gpio@ca00 { | |
| qcom,mode = <0x1>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x5>; | |
| reg = <0xca00 0x100>; | |
| qcom,vin-sel = <0x0>; | |
| qcom,output-type = <0x0>; | |
| qcom,pin-num = <0xb>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| gpio@da00 { | |
| qcom,mode = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x4>; | |
| reg = <0xda00 0x100>; | |
| qcom,pin-num = <0x1b>; | |
| }; | |
| gpio@dc00 { | |
| qcom,mode = <0x1>; | |
| qcom,src-sel = <0x2>; | |
| qcom,master-en = <0x1>; | |
| reg = <0xdc00 0x100>; | |
| qcom,pin-num = <0x1d>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| gpio@c500 { | |
| qcom,mode = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x0>; | |
| reg = <0xc500 0x100>; | |
| qcom,pin-num = <0x6>; | |
| }; | |
| gpio@c300 { | |
| qcom,mode = <0x0>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| qcom,pull = <0x0>; | |
| reg = <0xc300 0x100>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,pin-num = <0x4>; | |
| }; | |
| gpio@de00 { | |
| reg = <0xde00 0x100>; | |
| qcom,pin-num = <0x1f>; | |
| }; | |
| gpio@d700 { | |
| qcom,mode = <0x1>; | |
| qcom,src-sel = <0x2>; | |
| qcom,master-en = <0x1>; | |
| reg = <0xd700 0x100>; | |
| qcom,pin-num = <0x18>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| gpio@d800 { | |
| qcom,mode = <0x0>; | |
| qcom,src-sel = <0x2>; | |
| qcom,master-en = <0x1>; | |
| reg = <0xd800 0x100>; | |
| qcom,pin-num = <0x19>; | |
| qcom,out-strength = <0x1>; | |
| }; | |
| gpio@d000 { | |
| reg = <0xd000 0x100>; | |
| qcom,pin-num = <0x11>; | |
| }; | |
| }; | |
| qcom,misc@900 { | |
| linux,phandle = <0x62>; | |
| reg = <0x900 0x100>; | |
| compatible = "qcom,qpnp-misc"; | |
| phandle = <0x62>; | |
| }; | |
| clkdiv@5c00 { | |
| qcom,cxo-freq = <0x124f800>; | |
| reg = <0x5c00 0x100>; | |
| compatible = "qcom,qpnp-clkdiv"; | |
| }; | |
| vadc@3100 { | |
| #size-cells = <0x0>; | |
| linux,phandle = <0x50>; | |
| interrupt-names = "eoc-int-en-set"; | |
| #address-cells = <0x1>; | |
| qcom,adc-vdd-reference = <0x708>; | |
| qcom,adc-bit-resolution = <0xf>; | |
| qcom,pmic-revid = <0x54>; | |
| reg = <0x3100 0x100>; | |
| compatible = "qcom,qpnp-vadc"; | |
| phandle = <0x50>; | |
| qcom,vadc-poll-eoc; | |
| interrupts = <0x0 0x31 0x0>; | |
| chan@5 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x0>; | |
| reg = <0x5>; | |
| label = "vcoin"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x1>; | |
| qcom,calibration-type = "absolute"; | |
| }; | |
| chan@8 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x3>; | |
| reg = <0x8>; | |
| label = "die_temp"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "absolute"; | |
| }; | |
| chan@b4 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x2>; | |
| reg = <0xb4>; | |
| label = "emmc_therm"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| }; | |
| chan@4 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x0>; | |
| reg = <0x4>; | |
| label = "usb_id_mv"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x1>; | |
| qcom,calibration-type = "absolute"; | |
| }; | |
| chan@b8 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x2>; | |
| reg = <0xb8>; | |
| label = "quiet_therm"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| }; | |
| chan@3 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x0>; | |
| reg = <0x3>; | |
| label = "spare1_div3"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x1>; | |
| qcom,calibration-type = "absolute"; | |
| }; | |
| chan@b7 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x2>; | |
| reg = <0xb7>; | |
| label = "pa_therm1"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| }; | |
| chan@b3 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x2>; | |
| reg = <0xb3>; | |
| label = "msm_therm"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| }; | |
| chan@2 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x0>; | |
| reg = <0x2>; | |
| label = "vchg_sns"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x3>; | |
| qcom,calibration-type = "absolute"; | |
| }; | |
| chan@6 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x0>; | |
| reg = <0x6>; | |
| label = "vbat_sns"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x1>; | |
| qcom,calibration-type = "absolute"; | |
| }; | |
| chan@31 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x0>; | |
| reg = <0x31>; | |
| label = "batt_id"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| }; | |
| chan@39 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x0>; | |
| reg = <0x39>; | |
| label = "usb_id_nopull"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| }; | |
| chan@a { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x0>; | |
| reg = <0xa>; | |
| label = "ref_1250v"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "absolute"; | |
| }; | |
| chan@b2 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x4>; | |
| reg = <0xb2>; | |
| label = "xo_therm_pu2"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| }; | |
| chan@1 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x0>; | |
| reg = <0x1>; | |
| label = "dc_in"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x4>; | |
| qcom,calibration-type = "absolute"; | |
| }; | |
| chan@b9 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x0>; | |
| reg = <0xb9>; | |
| label = "usb_id"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| }; | |
| chan@b5 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x2>; | |
| reg = <0xb5>; | |
| label = "pa_therm0"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| }; | |
| chan@9 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x0>; | |
| reg = <0x9>; | |
| label = "ref_625mv"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "absolute"; | |
| }; | |
| chan@7 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x0>; | |
| reg = <0x7>; | |
| label = "vph_pwr"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x1>; | |
| qcom,calibration-type = "absolute"; | |
| }; | |
| chan@30 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x1>; | |
| reg = <0x30>; | |
| label = "batt_therm"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| }; | |
| chan@0 { | |
| qcom,decimation = <0x0>; | |
| qcom,scale-function = <0x0>; | |
| reg = <0x0>; | |
| label = "usb_in"; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x4>; | |
| qcom,calibration-type = "absolute"; | |
| }; | |
| }; | |
| qcom,bms { | |
| #size-cells = <0x1>; | |
| qcom,r-conn-mohm = <0x0>; | |
| qcom,v-cutoff-uv = <0x33e140>; | |
| qcom,calculate-soc-ms = <0x4e20>; | |
| qcom,bms-vadc = <0x50>; | |
| qcom,low-voltage-calculate-soc-ms = <0x3e8>; | |
| qcom,min-fcc-learning-samples = <0x5>; | |
| qcom,low-ocv-correction-limit-uv = <0x64>; | |
| qcom,ocv-voltage-high-threshold-uv = <0x393870>; | |
| #address-cells = <0x1>; | |
| qcom,low-voltage-threshold = <0x35b600>; | |
| qcom,low-soc-calculate-soc-ms = <0x1388>; | |
| qcom,bms-iadc = <0x51>; | |
| qcom,bms-adc_tm = <0x52>; | |
| spmi-dev-container; | |
| qcom,min-fcc-ocv-pc = <0x1e>; | |
| qcom,max-voltage-uv = <0x401640>; | |
| qcom,chg-term-ua = <0x186a0>; | |
| qcom,batt-type = <0x0>; | |
| qcom,fcc-resolution = <0xa>; | |
| qcom,low-soc-calculate-soc-threshold = <0xf>; | |
| qcom,hold-soc-est = <0x3>; | |
| compatible = "qcom,qpnp-bms"; | |
| qcom,shutdown-soc-valid-limit = <0x64>; | |
| qcom,r-sense-uohm = <0x2710>; | |
| qcom,battery-data = <0x53>; | |
| qcom,high-ocv-correction-limit-uv = <0xfa>; | |
| qcom,min-fcc-learning-soc = <0x14>; | |
| qcom,adjust-soc-low-threshold = <0xf>; | |
| status = "ok"; | |
| qcom,tm-temp-margin = <0x1388>; | |
| qcom,enable-fcc-learning; | |
| qcom,ocv-voltage-low-threshold-uv = <0x37b1d0>; | |
| qcom,bms-bms@4000 { | |
| interrupt-names = "cc_thr", "ocv_for_r", "good_ocv", "charge_begin", "ocv_thr", "sw_cc_thr", "vsense_avg", "vsense_for_r"; | |
| reg = <0x4000 0x100>; | |
| interrupts = <0x0 0x40 0x0 0x0 0x40 0x1 0x0 0x40 0x2 0x0 0x40 0x3 0x0 0x40 0x4 0x0 0x40 0x5 0x0 0x40 0x6 0x0 0x40 0x7>; | |
| }; | |
| qcom,bms-iadc@3800 { | |
| reg = <0x3800 0x100>; | |
| }; | |
| qcom,batt-pres-status@1208 { | |
| reg = <0x1208 0x1>; | |
| }; | |
| }; | |
| }; | |
| qcom,pm8941@1 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| reg = <0x1>; | |
| spmi-slave-container; | |
| regulator@4f00 { | |
| reg = <0x4f00 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l16"; | |
| status = "disabled"; | |
| }; | |
| qcom,leds@d600 { | |
| reg = <0xd600 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "flash"; | |
| status = "disabled"; | |
| }; | |
| regulator@5300 { | |
| reg = <0x5300 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l20"; | |
| status = "disabled"; | |
| }; | |
| qcom,leds@d500 { | |
| reg = <0xd500 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "flash"; | |
| status = "disabled"; | |
| }; | |
| pwm@b600 { | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0x5>; | |
| reg = <0xb600 0x100 0xb042 0x7e>; | |
| compatible = "qcom,qpnp-pwm"; | |
| }; | |
| qcom,leds@e000 { | |
| reg = <0xe000 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "wled"; | |
| status = "disabled"; | |
| }; | |
| qcom,leds@d200 { | |
| reg = <0xd200 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "rgb"; | |
| status = "disabled"; | |
| }; | |
| pwm@b300 { | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0x2>; | |
| reg = <0xb300 0x100 0xb042 0x7e>; | |
| compatible = "qcom,qpnp-pwm"; | |
| }; | |
| regulator@5500 { | |
| reg = <0x5500 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l22"; | |
| status = "disabled"; | |
| }; | |
| regulator@5200 { | |
| reg = <0x5200 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l19"; | |
| status = "disabled"; | |
| }; | |
| regulator@4700 { | |
| reg = <0x4700 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l8"; | |
| status = "disabled"; | |
| }; | |
| regulator@4600 { | |
| reg = <0x4600 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| qcom,force-type = <0x4 0x10>; | |
| regulator-name = "8941_l7"; | |
| status = "disabled"; | |
| }; | |
| qcom,leds@dc00 { | |
| reg = <0xdc00 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "wled"; | |
| status = "disabled"; | |
| }; | |
| regulator@4000 { | |
| reg = <0x4000 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l1"; | |
| status = "disabled"; | |
| }; | |
| pwm@e500 { | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0x9>; | |
| reg = <0xe500 0x100 0xe342 0x1e>; | |
| compatible = "qcom,qpnp-pwm"; | |
| }; | |
| regulator@4b00 { | |
| reg = <0x4b00 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l12"; | |
| status = "disabled"; | |
| }; | |
| pwm@b200 { | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0x1>; | |
| reg = <0xb200 0x100 0xb042 0x7e>; | |
| compatible = "qcom,qpnp-pwm"; | |
| }; | |
| qcom,leds@d900 { | |
| reg = <0xd900 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "wled"; | |
| status = "disabled"; | |
| }; | |
| qcom,leds@e100 { | |
| reg = <0xe100 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "wled"; | |
| status = "disabled"; | |
| }; | |
| qcom,leds@d300 { | |
| flash-boost-supply = <0x56>; | |
| torch-boost-supply = <0x4f>; | |
| reg = <0xd300 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "flash"; | |
| status = "okay"; | |
| qcom,flash_0 { | |
| linux,phandle = <0x78>; | |
| qcom,clamp-curr = <0xc8>; | |
| qcom,duration = <0x500>; | |
| linux,name = "led:flash_0"; | |
| qcom,startup-dly = <0x3>; | |
| linux,default-trigger = "flash0_trigger"; | |
| qcom,max-current = <0x3e8>; | |
| qcom,default-state = "off"; | |
| phandle = <0x78>; | |
| label = "flash"; | |
| qcom,headroom = <0x3>; | |
| qcom,safety-timer; | |
| qcom,current = <0x1f4>; | |
| qcom,id = <0x1>; | |
| }; | |
| qcom,flash_torch { | |
| linux,phandle = <0x77>; | |
| linux,name = "led:flash_torch"; | |
| qcom,startup-dly = <0x1>; | |
| linux,default-trigger = "torch_trigger"; | |
| qcom,torch-enable; | |
| qcom,max-current = <0xc8>; | |
| qcom,default-state = "off"; | |
| phandle = <0x77>; | |
| label = "flash"; | |
| qcom,headroom = <0x0>; | |
| qcom,current = <0x1e>; | |
| qcom,id = <0x2>; | |
| }; | |
| qcom,flash_1 { | |
| linux,phandle = <0x79>; | |
| qcom,clamp-curr = <0xc8>; | |
| qcom,duration = <0x500>; | |
| linux,name = "led:flash_1"; | |
| qcom,startup-dly = <0x3>; | |
| linux,default-trigger = "flash1_trigger"; | |
| qcom,max-current = <0x3e8>; | |
| qcom,default-state = "off"; | |
| phandle = <0x79>; | |
| label = "flash"; | |
| qcom,headroom = <0x3>; | |
| qcom,safety-timer; | |
| qcom,current = <0x1f4>; | |
| qcom,id = <0x2>; | |
| }; | |
| }; | |
| qcom,leds@dd00 { | |
| reg = <0xdd00 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "wled"; | |
| status = "disabled"; | |
| }; | |
| qcom,leds@da00 { | |
| reg = <0xda00 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "wled"; | |
| status = "disabled"; | |
| }; | |
| regulator@5000 { | |
| reg = <0x5000 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l17"; | |
| status = "disabled"; | |
| }; | |
| pwm@b800 { | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0x7>; | |
| reg = <0xb800 0x100 0xb042 0x7e>; | |
| compatible = "qcom,qpnp-pwm"; | |
| }; | |
| regulator@5100 { | |
| reg = <0x5100 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l18"; | |
| status = "disabled"; | |
| }; | |
| qcom,leds@d800 { | |
| reg = <0xd800 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "wled"; | |
| status = "disabled"; | |
| qcom,wled_0 { | |
| qcom,num-strings = <0x3>; | |
| linux,name = "wled:backlight"; | |
| qcom,cp-sel = <0x0>; | |
| qcom,cs-out-en; | |
| linux,default-trigger = "bkl-trigger"; | |
| qcom,ctrl-delay-us = <0x0>; | |
| qcom,switch-freq = <0xb>; | |
| qcom,boost-curr-lim = <0x5>; | |
| qcom,max-current = <0x19>; | |
| qcom,op-fdbck = <0x1>; | |
| qcom,default-state = "off"; | |
| label = "wled"; | |
| qcom,ovp-val = <0x2>; | |
| qcom,id = <0x0>; | |
| }; | |
| }; | |
| qcom,leds@d000 { | |
| reg = <0xd000 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "rgb"; | |
| status = "okay"; | |
| qcom,rgb_0 { | |
| qcom,mode = "pwm"; | |
| linux,name = "rgb_red"; | |
| qcom,idx-len = <0xa>; | |
| qcom,pwm-us = <0x3e8>; | |
| qcom,use-blink; | |
| qcom,max-current = <0x6>; | |
| qcom,start-idx = <0x1>; | |
| qcom,duty-pcts = [00 00 00 00 00 00 00 00 00 00 00 01 03 05 08 0b 10 14 19 1e 24 2a 30 38 40 49 52 5b 64 64 64 64 64 5b 52 49 40 38 30 2a 24 1e 19 14 10 0b 08 05 03 01 00 00 00 00 00 00 00 00 00 00 00]; | |
| qcom,ramp-step-ms = <0x32>; | |
| qcom,pwm-channel = <0x6>; | |
| qcom,default-state = "off"; | |
| label = "rgb"; | |
| qcom,pause-hi = <0x0>; | |
| qcom,pause-lo = <0x0>; | |
| qcom,duty-ms = <0xc8>; | |
| qcom,id = <0x3>; | |
| }; | |
| qcom,rgb_1 { | |
| qcom,mode = "pwm"; | |
| linux,name = "rgb_green"; | |
| qcom,idx-len = <0xa>; | |
| qcom,pwm-us = <0x3e8>; | |
| qcom,use-blink; | |
| qcom,max-current = <0x6>; | |
| qcom,start-idx = <0x1>; | |
| qcom,duty-pcts = [00 00 00 00 00 00 00 00 00 00 00 01 03 05 08 0b 10 14 19 1e 24 2a 30 38 40 49 52 5b 64 64 64 64 64 5b 52 49 40 38 30 2a 24 1e 19 14 10 0b 08 05 03 01 00 00 00 00 00 00 00 00 00 00 00]; | |
| qcom,ramp-step-ms = <0x32>; | |
| qcom,pwm-channel = <0x5>; | |
| qcom,default-state = "off"; | |
| label = "rgb"; | |
| qcom,pause-hi = <0x0>; | |
| qcom,pause-lo = <0x0>; | |
| qcom,duty-ms = <0xc8>; | |
| qcom,id = <0x4>; | |
| }; | |
| }; | |
| regulator@4300 { | |
| reg = <0x4300 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l4"; | |
| status = "disabled"; | |
| }; | |
| regulator@4800 { | |
| reg = <0x4800 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l9"; | |
| status = "disabled"; | |
| }; | |
| regulator@8200 { | |
| reg = <0x8200 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_lvs3"; | |
| status = "disabled"; | |
| }; | |
| pwm@b700 { | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0x6>; | |
| reg = <0xb700 0x100 0xb042 0x7e>; | |
| compatible = "qcom,qpnp-pwm"; | |
| }; | |
| regulator@1a00 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| spmi-dev-container; | |
| reg = <0x1a00 0x300>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_s3"; | |
| status = "disabled"; | |
| qcom,ps@1b00 { | |
| reg = <0x1b00 0x100>; | |
| }; | |
| qcom,freq@1c00 { | |
| reg = <0x1c00 0x100>; | |
| }; | |
| qcom,ctl@1a00 { | |
| reg = <0x1a00 0x100>; | |
| }; | |
| }; | |
| qcom,leds@d100 { | |
| reg = <0xd100 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "rgb"; | |
| status = "disabled"; | |
| }; | |
| qcom,leds@e200 { | |
| reg = <0xe200 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "kpdbl"; | |
| status = "okay"; | |
| qcom,kpdbl1 { | |
| qcom,mode = "pwm"; | |
| qcom,row-src-en; | |
| linux,name = "button-backlight"; | |
| qcom,always-on; | |
| qcom,pwm-us = <0x3e8>; | |
| qcom,max-current = <0xf>; | |
| qcom,row-id = <0x0>; | |
| qcom,pwm-channel = <0x8>; | |
| label = "kpdbl"; | |
| qcom,id = <0x7>; | |
| }; | |
| qcom,kpdbl4 { | |
| qcom,mode = "pwm"; | |
| qcom,row-src-en; | |
| linux,name = "kpdbl-pwm-4"; | |
| qcom,pwm-us = <0x3e8>; | |
| qcom,max-current = <0x14>; | |
| qcom,row-id = <0x3>; | |
| qcom,pwm-channel = <0xb>; | |
| label = "kpdbl"; | |
| qcom,id = <0x7>; | |
| }; | |
| qcom,kpdbl2 { | |
| qcom,mode = "lpg"; | |
| qcom,row-src-en; | |
| linux,name = "kpdbl-lut-2"; | |
| qcom,pwm-us = <0x3e8>; | |
| qcom,max-current = <0x14>; | |
| qcom,start-idx = <0x1>; | |
| qcom,duty-pcts = [00 00 00 00 64 64 00 00 00 00]; | |
| qcom,row-id = <0x1>; | |
| qcom,pwm-channel = <0x9>; | |
| label = "kpdbl"; | |
| qcom,id = <0x7>; | |
| }; | |
| qcom,kpdbl3 { | |
| qcom,mode = "pwm"; | |
| qcom,row-src-en; | |
| linux,name = "kpdbl-pwm-3"; | |
| qcom,pwm-us = <0x3e8>; | |
| qcom,max-current = <0x14>; | |
| qcom,row-id = <0x2>; | |
| qcom,pwm-channel = <0xa>; | |
| label = "kpdbl"; | |
| qcom,id = <0x7>; | |
| }; | |
| }; | |
| qcom,leds@df00 { | |
| reg = <0xdf00 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "wled"; | |
| status = "disabled"; | |
| }; | |
| qcom,leds@d700 { | |
| reg = <0xd700 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "flash"; | |
| status = "disabled"; | |
| }; | |
| regulator@4900 { | |
| reg = <0x4900 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l10"; | |
| status = "disabled"; | |
| }; | |
| regulator@4a00 { | |
| reg = <0x4a00 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l11"; | |
| status = "disabled"; | |
| }; | |
| regulator@4200 { | |
| reg = <0x4200 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l3"; | |
| status = "disabled"; | |
| }; | |
| regulator@a000 { | |
| linux,phandle = <0x4f>; | |
| qcom,enable-time = <0x1f4>; | |
| regulator-min-microvolt = <0x44aa20>; | |
| reg = <0xa000 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-max-microvolt = <0x44aa20>; | |
| phandle = <0x4f>; | |
| regulator-name = "8941_boost"; | |
| status = "okay"; | |
| }; | |
| regulator@8100 { | |
| reg = <0x8100 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_lvs2"; | |
| status = "disabled"; | |
| }; | |
| regulator@4400 { | |
| reg = <0x4400 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| qcom,force-type = <0x4 0x10>; | |
| regulator-name = "8941_l5"; | |
| status = "disabled"; | |
| }; | |
| regulator@5600 { | |
| reg = <0x5600 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l23"; | |
| status = "disabled"; | |
| }; | |
| pwm@b400 { | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0x3>; | |
| reg = <0xb400 0x100 0xb042 0x7e>; | |
| compatible = "qcom,qpnp-pwm"; | |
| }; | |
| qcom,vibrator@c000 { | |
| qcom,vib-timeout-ms = <0x3a98>; | |
| qcom,vib-vtg-level-mV = <0xc1c>; | |
| reg = <0xc000 0x100>; | |
| compatible = "qcom,qpnp-vibrator"; | |
| label = "vibrator"; | |
| status = "okay"; | |
| }; | |
| regulator@5700 { | |
| reg = <0x5700 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l24"; | |
| status = "disabled"; | |
| }; | |
| regulator@4100 { | |
| reg = <0x4100 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l2"; | |
| status = "disabled"; | |
| }; | |
| regulator@4e00 { | |
| reg = <0x4e00 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l15"; | |
| status = "disabled"; | |
| }; | |
| qcom,leds@d400 { | |
| reg = <0xd400 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "flash"; | |
| status = "disabled"; | |
| }; | |
| pwm@e700 { | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0xb>; | |
| reg = <0xe700 0x100 0xe342 0x1e>; | |
| compatible = "qcom,qpnp-pwm"; | |
| }; | |
| regulator@1400 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| spmi-dev-container; | |
| reg = <0x1400 0x300>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_s1"; | |
| status = "disabled"; | |
| qcom,ctl@1400 { | |
| reg = <0x1400 0x100>; | |
| }; | |
| qcom,freq@1600 { | |
| reg = <0x1600 0x100>; | |
| }; | |
| qcom,ps@1500 { | |
| reg = <0x1500 0x100>; | |
| }; | |
| }; | |
| regulator@8300 { | |
| linux,phandle = <0x61>; | |
| qcom,enable-time = <0x3e8>; | |
| qcom,ocp-max-retries = <0xa>; | |
| qcom,vs-soft-start-strength = <0x0>; | |
| parent-supply = <0x55>; | |
| interrupt-names = "ocp"; | |
| qcom,soft-start-enable = <0x1>; | |
| qcom,pull-down-enable = <0x1>; | |
| qcom,auto-mode-enable = <0x0>; | |
| qcom,ocp-retry-delay = <0x1e>; | |
| reg = <0x8300 0x100>; | |
| qcom,hpm-enable = <0x1>; | |
| compatible = "qcom,qpnp-regulator"; | |
| phandle = <0x61>; | |
| qcom,ocp-enable = <0x1>; | |
| regulator-name = "8941_mvs1"; | |
| interrupts = <0x1 0x83 0x2>; | |
| status = "okay"; | |
| }; | |
| regulator@5400 { | |
| reg = <0x5400 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l21"; | |
| status = "disabled"; | |
| }; | |
| regulator@1700 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| spmi-dev-container; | |
| reg = <0x1700 0x300>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_s2"; | |
| status = "disabled"; | |
| qcom,ps@1800 { | |
| reg = <0x1800 0x100>; | |
| }; | |
| qcom,ctl@1700 { | |
| reg = <0x1700 0x100>; | |
| }; | |
| qcom,freq@1900 { | |
| reg = <0x1900 0x100>; | |
| }; | |
| }; | |
| pwm@b100 { | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0x0>; | |
| reg = <0xb100 0x100 0xb042 0x7e>; | |
| compatible = "qcom,qpnp-pwm"; | |
| }; | |
| pwm@e400 { | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0x8>; | |
| reg = <0xe400 0x100 0xe342 0x1e>; | |
| compatible = "qcom,qpnp-pwm"; | |
| }; | |
| regulator@4500 { | |
| reg = <0x4500 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l6"; | |
| status = "disabled"; | |
| }; | |
| pwm@e600 { | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0xa>; | |
| reg = <0xe600 0x100 0xe342 0x1e>; | |
| compatible = "qcom,qpnp-pwm"; | |
| }; | |
| regulator@8000 { | |
| reg = <0x8000 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_lvs1"; | |
| status = "disabled"; | |
| }; | |
| qcom,leds@de00 { | |
| reg = <0xde00 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "wled"; | |
| status = "disabled"; | |
| }; | |
| pwm@b500 { | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,period = <0x1f40>; | |
| qcom,channel-id = <0x4>; | |
| reg = <0xb500 0x100 0xb042 0x7e>; | |
| compatible = "qcom,qpnp-pwm"; | |
| qcom,mode-select = <0x0>; | |
| qcom,duty = <0x1770>; | |
| status = "okay"; | |
| qcom,pwm { | |
| qcom,duty = <0xfa0>; | |
| label = "pwm"; | |
| }; | |
| }; | |
| qcom,leds@db00 { | |
| reg = <0xdb00 0x100>; | |
| compatible = "qcom,leds-qpnp"; | |
| label = "wled"; | |
| status = "disabled"; | |
| }; | |
| regulator@4d00 { | |
| reg = <0x4d00 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l14"; | |
| status = "disabled"; | |
| }; | |
| regulator@4c00 { | |
| reg = <0x4c00 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8941_l13"; | |
| status = "disabled"; | |
| }; | |
| regulator@8400 { | |
| linux,phandle = <0x2c>; | |
| qcom,enable-time = <0x3e8>; | |
| qcom,ocp-max-retries = <0xa>; | |
| qcom,vs-soft-start-strength = <0x0>; | |
| parent-supply = <0x4f>; | |
| interrupt-names = "ocp"; | |
| qcom,soft-start-enable = <0x1>; | |
| qcom,pull-down-enable = <0x1>; | |
| qcom,auto-mode-enable = <0x0>; | |
| qcom,ocp-retry-delay = <0x1e>; | |
| reg = <0x8400 0x100>; | |
| qcom,hpm-enable = <0x1>; | |
| compatible = "qcom,qpnp-regulator"; | |
| phandle = <0x2c>; | |
| qcom,ocp-enable = <0x1>; | |
| regulator-name = "8941_mvs2"; | |
| interrupts = <0x1 0x84 0x2>; | |
| status = "okay"; | |
| }; | |
| }; | |
| qcom,pm8841@5 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| reg = <0x5>; | |
| spmi-slave-container; | |
| regulator@2600 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| spmi-dev-container; | |
| reg = <0x2600 0x300>; | |
| compatible = "qcom,qpnp-regulator"; | |
| qcom,force-type = <0x1c 0x8>; | |
| regulator-name = "8841_s7"; | |
| status = "disabled"; | |
| qcom,ps@2700 { | |
| reg = <0x2700 0x100>; | |
| }; | |
| qcom,ctl@2600 { | |
| reg = <0x2600 0x100>; | |
| }; | |
| qcom,freq@2800 { | |
| reg = <0x2800 0x100>; | |
| }; | |
| }; | |
| regulator@1d00 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| spmi-dev-container; | |
| reg = <0x1d00 0x300>; | |
| compatible = "qcom,qpnp-regulator"; | |
| qcom,force-type = <0x1c 0x8>; | |
| regulator-name = "8841_s4"; | |
| status = "disabled"; | |
| qcom,ps@1e00 { | |
| reg = <0x1e00 0x100>; | |
| }; | |
| qcom,ctl@1d00 { | |
| reg = <0x1d00 0x100>; | |
| }; | |
| qcom,freq@1f00 { | |
| reg = <0x1f00 0x100>; | |
| }; | |
| }; | |
| regulator@2000 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| spmi-dev-container; | |
| reg = <0x2000 0x300>; | |
| compatible = "qcom,qpnp-regulator"; | |
| qcom,force-type = <0x1c 0x8>; | |
| regulator-name = "8841_s5"; | |
| status = "disabled"; | |
| qcom,ps@100 { | |
| reg = <0x2100 0x100>; | |
| }; | |
| qcom,freq@200 { | |
| reg = <0x2200 0x100>; | |
| }; | |
| qcom,ctl@0 { | |
| reg = <0x2000 0x100>; | |
| }; | |
| }; | |
| regulator@2300 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| spmi-dev-container; | |
| reg = <0x2300 0x300>; | |
| compatible = "qcom,qpnp-regulator"; | |
| qcom,force-type = <0x1c 0x8>; | |
| regulator-name = "8841_s6"; | |
| status = "disabled"; | |
| qcom,ps@2400 { | |
| reg = <0x2400 0x100>; | |
| }; | |
| qcom,ctl@2300 { | |
| reg = <0x2300 0x100>; | |
| }; | |
| qcom,freq@2500 { | |
| reg = <0x2500 0x100>; | |
| }; | |
| }; | |
| regulator@2900 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| spmi-dev-container; | |
| reg = <0x2900 0x300>; | |
| compatible = "qcom,qpnp-regulator"; | |
| qcom,force-type = <0x1c 0x8>; | |
| regulator-name = "8841_s8"; | |
| status = "disabled"; | |
| qcom,ctl@2900 { | |
| reg = <0x2900 0x100>; | |
| }; | |
| qcom,ps@2a000 { | |
| reg = <0x2a00 0x100>; | |
| }; | |
| qcom,freq@2b00 { | |
| reg = <0x2b00 0x100>; | |
| }; | |
| }; | |
| regulator@1a00 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| spmi-dev-container; | |
| reg = <0x1a00 0x300>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8841_s3"; | |
| status = "disabled"; | |
| qcom,ps@1b00 { | |
| reg = <0x1b00 0x100>; | |
| }; | |
| qcom,freq@1c00 { | |
| reg = <0x1c00 0x100>; | |
| }; | |
| qcom,ctl@1a00 { | |
| reg = <0x1a00 0x100>; | |
| }; | |
| }; | |
| regulator@1400 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| spmi-dev-container; | |
| reg = <0x1400 0x300>; | |
| compatible = "qcom,qpnp-regulator"; | |
| regulator-name = "8841_s1"; | |
| status = "disabled"; | |
| qcom,ctl@1400 { | |
| reg = <0x1400 0x100>; | |
| }; | |
| qcom,freq@1600 { | |
| reg = <0x1600 0x100>; | |
| }; | |
| qcom,ps@1500 { | |
| reg = <0x1500 0x100>; | |
| }; | |
| }; | |
| regulator@1700 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| spmi-dev-container; | |
| reg = <0x1700 0x300>; | |
| compatible = "qcom,qpnp-regulator"; | |
| qcom,force-type = <0x1c 0x8>; | |
| regulator-name = "8841_s2"; | |
| status = "disabled"; | |
| qcom,ps@1800 { | |
| reg = <0x1800 0x100>; | |
| }; | |
| qcom,ctl@1700 { | |
| reg = <0x1700 0x100>; | |
| }; | |
| qcom,freq@1900 { | |
| reg = <0x1900 0x100>; | |
| }; | |
| }; | |
| qcom,krait-regulator-pmic@2000 { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| spmi-dev-container; | |
| compatible = "qcom,krait-regulator-pmic"; | |
| status = "ok"; | |
| qcom,freq@2200 { | |
| reg = <0x2200 0x100>; | |
| status = "ok"; | |
| }; | |
| qcom,ps@2100 { | |
| reg = <0x2100 0x100>; | |
| status = "ok"; | |
| }; | |
| qcom,ctl@2000 { | |
| reg = <0x2000 0x100>; | |
| status = "ok"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| funnel@fc345000 { | |
| linux,phandle = <0x17>; | |
| coresight-child-list = <0x16>; | |
| reg-names = "funnel-base"; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x4>; | |
| reg = <0xfc345000 0x1000>; | |
| compatible = "arm,coresight-funnel"; | |
| coresight-child-ports = <0x5>; | |
| phandle = <0x17>; | |
| coresight-id = <0x7>; | |
| coresight-name = "coresight-funnel-kpss"; | |
| }; | |
| cpu-pmu { | |
| qcom,irq-is-percpu; | |
| compatible = "qcom,krait-pmu"; | |
| interrupts = <0x1 0x7 0xf00>; | |
| }; | |
| qcom,msm-adsp-loader { | |
| qcom,adsp-state = <0x0>; | |
| compatible = "qcom,adsp-loader"; | |
| }; | |
| cti@fc308000 { | |
| linux,phandle = <0xd>; | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc308000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| phandle = <0xd>; | |
| coresight-id = <0x13>; | |
| coresight-name = "coresight-cti0"; | |
| }; | |
| msm-bimc@0xfc380000 { | |
| coresight-child-list = <0x16>; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x0>; | |
| qcom,qos-freq = <0x4b00>; | |
| qcom,ntieredslaves = <0x0>; | |
| qcom,hw-sel = "BIMC"; | |
| reg = <0xfc380000 0x6a000>; | |
| compatible = "msm-bus-fabric"; | |
| qcom,fabclk-active = "mem_a_clk"; | |
| qcom,rpm-en; | |
| coresight-child-ports = <0x3>; | |
| cell-id = <0x0>; | |
| label = "msm_bimc"; | |
| coresight-id = <0x37>; | |
| qcom,fabclk-dual = "mem_clk"; | |
| coresight-name = "coresight-bimc"; | |
| slv-ampss-l2 { | |
| qcom,slv-hw-id = <0x1>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x202>; | |
| label = "slv-ampss-l2"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x2>; | |
| }; | |
| mas-mss-proc { | |
| qcom,mas-hw-id = <0x1>; | |
| qcom,hw-sel = "RPM"; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x2>; | |
| cell-id = <0x41>; | |
| label = "mas-mss-proc"; | |
| }; | |
| slv-ebi-ch0 { | |
| qcom,mode = "Bypass"; | |
| qcom,slv-hw-id = <0x0>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x200>; | |
| label = "slv-ebi-ch0"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x0 0x1>; | |
| }; | |
| mas-ampss-m0 { | |
| qcom,mode = "Limiter"; | |
| qcom,bimc,bw = <0x493e0 0x6ddd0>; | |
| qcom,bimc,gp = <0x1388>; | |
| qcom,prio-rd = <0x0>; | |
| qcom,mas-hw-id = <0x0>; | |
| qcom,hw-sel = "BIMC"; | |
| qcom,qport = <0x0>; | |
| qcom,thresh = <0x1e8480 0x2579c0>; | |
| qcom,bimc,thmp = <0x32>; | |
| qcom,tier = <0x2>; | |
| qcom,mode-thresh = "Fixed"; | |
| qcom,masterp = <0x0>; | |
| qcom,ws = <0x2710>; | |
| cell-id = <0x1>; | |
| label = "mas-ampss-m0"; | |
| qcom,prio-wr = <0x0>; | |
| qcom,dual-conf; | |
| }; | |
| mas-ampss-m1 { | |
| qcom,mode = "Limiter"; | |
| qcom,bimc,bw = <0x493e0 0x6ddd0>; | |
| qcom,bimc,gp = <0x1388>; | |
| qcom,prio-rd = <0x0>; | |
| qcom,mas-hw-id = <0x0>; | |
| qcom,hw-sel = "BIMC"; | |
| qcom,qport = <0x1>; | |
| qcom,thresh = <0x1e8480 0x2579c0>; | |
| qcom,bimc,thmp = <0x32>; | |
| qcom,tier = <0x2>; | |
| qcom,mode-thresh = "Fixed"; | |
| qcom,masterp = <0x1>; | |
| qcom,ws = <0x2710>; | |
| cell-id = <0x2>; | |
| label = "mas-ampss-m1"; | |
| qcom,prio-wr = <0x0>; | |
| qcom,dual-conf; | |
| }; | |
| fab-snoc { | |
| qcom,mode = "Bypass"; | |
| qcom,mas-hw-id = <0x3>; | |
| qcom,hw-sel = "RPM"; | |
| qcom,qport = <0x5 0x6>; | |
| qcom,slv-hw-id = <0x2>; | |
| qcom,masterp = <0x5 0x6>; | |
| qcom,ws = <0x2710>; | |
| qcom,gateway; | |
| cell-id = <0x400>; | |
| label = "fab-snoc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x3>; | |
| }; | |
| fab-mmss-noc { | |
| qcom,mode = "Bypass"; | |
| qcom,mas-hw-id = <0x2>; | |
| qcom,hw-sel = "BIMC"; | |
| qcom,qport = <0x3 0x4>; | |
| qcom,masterp = <0x3 0x4>; | |
| qcom,ws = <0x2710>; | |
| qcom,gateway; | |
| cell-id = <0x800>; | |
| label = "fab_mmss_noc"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| }; | |
| timer { | |
| compatible = "arm,armv7-timer"; | |
| clock-frequency = <0x124f800>; | |
| interrupts = <0x1 0x2 0x0 0x1 0x3 0x0>; | |
| }; | |
| qcom,msm-dai-fe { | |
| compatible = "qcom,msm-dai-fe"; | |
| }; | |
| qcom,gdsc@fd8c1044 { | |
| reg = <0xfd8c1044 0x4>; | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_venus_core1"; | |
| status = "disabled"; | |
| }; | |
| interrupt-controller@F9000000 { | |
| linux,phandle = <0x1>; | |
| interrupt-controller; | |
| reg = <0xf9000000 0x1000 0xf9002000 0x1000>; | |
| compatible = "qcom,msm-qgic2"; | |
| #interrupt-cells = <0x3>; | |
| phandle = <0x1>; | |
| }; | |
| qcom,iommu@fe054000 { | |
| #size-cells = <0x1>; | |
| qcom,iommu-lpae-bfb-data = <0x3 0x0 0x4 0x4 0x0 0x20 0x0 0x10 0x0 0x0 0x15e 0x19e 0x0>; | |
| ranges; | |
| reg-names = "iommu_base"; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| #address-cells = <0x1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008>; | |
| qcom,msm-bus,vectors-KBps = <0xb 0x200 0x0 0x0 0xb 0x200 0x0 0x3e8>; | |
| reg = <0xfe054000 0x10000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-smmu-v1"; | |
| qcom,iommu-lpae-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008>; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| label = "lpass_qdsp_iommu"; | |
| qcom,msm-bus,name = "lpass_qdsp_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,iommu-bfb-data = <0x3 0x4 0x4 0x0 0x0 0x0 0x10 0x0 0x0 0x15e 0x19e 0x0 0x0>; | |
| interrupts = <0x0 0xca 0x0>; | |
| status = "disabled"; | |
| qcom,iommu-ctx@fe05e000 { | |
| qcom,iommu-ctx-sids = <0x2>; | |
| reg = <0xfe05e000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "lpass_qdsp_cb_2"; | |
| interrupts = <0x0 0x109 0x0>; | |
| }; | |
| qcom,iommu-ctx@fe05d000 { | |
| qcom,iommu-ctx-sids = <0x1>; | |
| reg = <0xfe05d000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "lpass_qdsp_cb_1"; | |
| interrupts = <0x0 0x109 0x0>; | |
| }; | |
| qcom,iommu-ctx@fe05f000 { | |
| qcom,iommu-ctx-sids = <0x3>; | |
| reg = <0xfe05f000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "lpass_qdsp_cb_3"; | |
| interrupts = <0x0 0x109 0x0>; | |
| }; | |
| qcom,iommu-ctx@fe05c000 { | |
| qcom,iommu-ctx-sids = <0x0>; | |
| reg = <0xfe05c000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "lpass_qdsp_cb_0"; | |
| interrupts = <0x0 0x109 0x0>; | |
| }; | |
| }; | |
| qcom,smp2p-wcnss { | |
| qcom,remote-pid = <0x4>; | |
| reg = <0xf9011008 0x4>; | |
| compatible = "qcom,smp2p"; | |
| interrupts = <0x0 0x8f 0x1>; | |
| qcom,irq-bitmask = <0x40000>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-1-in { | |
| linux,phandle = <0x68>; | |
| qcom,remote-pid = <0x1>; | |
| qcom,is-inbound; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "slave-kernel"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x68>; | |
| }; | |
| msm-periph-noc@fc468000 { | |
| coresight-child-list = <0x18>; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x0>; | |
| qcom,ntieredslaves = <0x0>; | |
| qcom,hw-sel = "NoC"; | |
| reg = <0xfc468000 0x4000>; | |
| compatible = "msm-bus-fabric"; | |
| qcom,fabclk-active = "bus_a_clk"; | |
| qcom,rpm-en; | |
| coresight-child-ports = <0x6>; | |
| cell-id = <0x1000>; | |
| label = "msm_periph_noc"; | |
| coresight-id = <0x36>; | |
| qcom,fabclk-dual = "bus_clk"; | |
| coresight-name = "coresight-pnoc"; | |
| slv-service-pnoc { | |
| qcom,slv-hw-id = <0x2e>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x26b>; | |
| label = "slv-service-pnoc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xf>; | |
| }; | |
| slv-prng { | |
| qcom,slv-hw-id = <0x2c>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x26a>; | |
| label = "slv-prng"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xd>; | |
| }; | |
| mas-usb-hs { | |
| qcom,mas-hw-id = <0x2a>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x9>; | |
| cell-id = <0x57>; | |
| label = "mas-usb-hs"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| mas-sdcc-2 { | |
| qcom,mas-hw-id = <0x23>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x2>; | |
| cell-id = <0x51>; | |
| label = "mas-sdcc-2"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| slv-blsp-2 { | |
| qcom,slv-hw-id = <0x25>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x263>; | |
| label = "slv-blsp-2"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x6>; | |
| }; | |
| mas-blsp-2 { | |
| qcom,mas-hw-id = <0x27>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x6>; | |
| cell-id = <0x54>; | |
| label = "mas-blsp-2"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| slv-pnoc-mpu-cfg { | |
| qcom,slv-hw-id = <0x2b>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x269>; | |
| label = "slv-pnoc-mpu-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xc>; | |
| }; | |
| slv-usb-hsic { | |
| qcom,slv-hw-id = <0x26>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x264>; | |
| label = "slv-usb-hsic"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x7>; | |
| }; | |
| slv-tsif { | |
| qcom,slv-hw-id = <0x23>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x23f>; | |
| label = "slv-tsif"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x4>; | |
| }; | |
| slv-periph-apu-cfg { | |
| qcom,slv-hw-id = <0x2a>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x268>; | |
| label = "slv-periph-apu-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xb>; | |
| }; | |
| mas-sdcc-3 { | |
| qcom,mas-hw-id = <0x22>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x1>; | |
| cell-id = <0x4f>; | |
| label = "mas-sdcc-3"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| mas-tsif { | |
| qcom,mas-hw-id = <0x25>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x4>; | |
| cell-id = <0x52>; | |
| label = "mas-tsif"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| slv-blsp-1 { | |
| qcom,slv-hw-id = <0x27>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x265>; | |
| label = "slv-blsp-1"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x8>; | |
| }; | |
| mas-sdcc-4 { | |
| qcom,mas-hw-id = <0x24>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x3>; | |
| cell-id = <0x50>; | |
| label = "mas-sdcc-4"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| mas-blsp-1 { | |
| qcom,mas-hw-id = <0x29>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x8>; | |
| cell-id = <0x56>; | |
| label = "mas-blsp-1"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| mas-bam-dma { | |
| qcom,mas-hw-id = <0x26>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x5>; | |
| cell-id = <0x53>; | |
| label = "mas-bam-dma"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| mas-pnoc-cfg { | |
| qcom,mas-hw-id = <0x2b>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0xa>; | |
| cell-id = <0x58>; | |
| label = "mas-pnoc-cfg"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| fab-snoc { | |
| qcom,mas-hw-id = <0x2c>; | |
| qcom,slv-hw-id = <0x2d>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0xb>; | |
| qcom,gateway; | |
| cell-id = <0x400>; | |
| label = "fab-snoc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xe>; | |
| }; | |
| slv-pdm { | |
| qcom,slv-hw-id = <0x29>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x267>; | |
| label = "slv-pdm"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xa>; | |
| }; | |
| slv-sdcc-3 { | |
| qcom,slv-hw-id = <0x20>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x25f>; | |
| label = "slv-sdcc-3"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x1>; | |
| }; | |
| mas-sdcc-1 { | |
| qcom,mas-hw-id = <0x21>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x0>; | |
| cell-id = <0x4e>; | |
| label = "mas-sdcc-1"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| slv-bam-dma { | |
| qcom,slv-hw-id = <0x24>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x262>; | |
| label = "slv-bam-dma"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x5>; | |
| }; | |
| mas-usb-hsic { | |
| qcom,mas-hw-id = <0x28>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x7>; | |
| cell-id = <0x55>; | |
| label = "mas-usb-hsic"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| slv-usb-hs { | |
| qcom,slv-hw-id = <0x28>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x266>; | |
| label = "slv-usb-hs"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x9>; | |
| }; | |
| slv-sdcc-2 { | |
| qcom,slv-hw-id = <0x21>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x260>; | |
| label = "slv-sdcc-2"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x2>; | |
| }; | |
| slv-sdcc-4 { | |
| qcom,slv-hw-id = <0x22>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x261>; | |
| label = "slv-sdcc-4"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x3>; | |
| }; | |
| slv-sdcc-1 { | |
| qcom,slv-hw-id = <0x1f>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x25e>; | |
| label = "slv-sdcc-1"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x0>; | |
| }; | |
| }; | |
| qcom,csiphy@fda0b400 { | |
| cell-index = <0x2>; | |
| reg-names = "csiphy", "csiphy_clk_mux"; | |
| interrupt-names = "csiphy"; | |
| reg = <0xfda0b400 0x200 0xfda00040 0x4>; | |
| compatible = "qcom,csiphy"; | |
| interrupts = <0x0 0x50 0x0>; | |
| }; | |
| cti@fc343000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc343000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x1f>; | |
| coresight-name = "coresight-cti-cpu2"; | |
| }; | |
| qcom,sps@f9980000 { | |
| qcom,bam-dma-res-pipes = <0x6>; | |
| reg = <0xf9984000 0x15000 0xf9999000 0xb000>; | |
| compatible = "qcom,msm_sps"; | |
| interrupts = <0x0 0x5e 0x0>; | |
| }; | |
| qcom,msm-rtb { | |
| qcom,memory-reservation-type = "EBI1"; | |
| compatible = "qcom,msm-rtb"; | |
| qcom,memory-reservation-size = <0x100000>; | |
| }; | |
| qcom,csid@fda08800 { | |
| cell-index = <0x2>; | |
| reg-names = "csid"; | |
| qcom,mipi-csi-vdd-supply = <0x2>; | |
| interrupt-names = "csid"; | |
| reg = <0xfda08800 0x100>; | |
| compatible = "qcom,csid"; | |
| qcom,csi-vdd-voltage = <0x1b7740>; | |
| interrupts = <0x0 0x35 0x0>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-2-in { | |
| linux,phandle = <0x64>; | |
| qcom,remote-pid = <0x2>; | |
| qcom,is-inbound; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "slave-kernel"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x64>; | |
| }; | |
| qcom,ehci-host@f9a55000 { | |
| qcom,usb2-power-budget = <0x1f4>; | |
| HSUSB_VDDCX-supply = <0x63>; | |
| interrupt-names = "core_irq", "async_irq"; | |
| reg = <0xf9a55000 0x400>; | |
| compatible = "qcom,ehci-host"; | |
| HSUSB_3p3-supply = <0x43>; | |
| HSUSB_1p8-supply = <0x42>; | |
| qcom,usb2-enable-hsphy2; | |
| interrupts = <0x0 0x86 0x0 0x0 0x8c 0x0>; | |
| status = "disabled"; | |
| }; | |
| qcom,gdsc@fc401e84 { | |
| reg = <0xfc401e84 0x4>; | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_usb30"; | |
| status = "disabled"; | |
| }; | |
| cti@fc340000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc340000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x1c>; | |
| coresight-name = "coresight-cti-l2"; | |
| }; | |
| qcom,rpm-smd { | |
| rpm-channel-type = <0xf>; | |
| compatible = "qcom,rpm-smd"; | |
| rpm-channel-name = "rpm_requests"; | |
| rpm-regulator-ldoa23 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x17>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l23 { | |
| linux,phandle = <0xc>; | |
| regulator-min-microvolt = <0x2ab980>; | |
| qcom,init-voltage = <0x2ab980>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2dc6c0>; | |
| phandle = <0xc>; | |
| regulator-name = "8941_l23"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa8 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x8>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l8 { | |
| regulator-min-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| regulator-name = "8941_l8"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa18 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x12>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l18 { | |
| linux,phandle = <0x4b>; | |
| regulator-min-microvolt = <0x2b7cd0>; | |
| qcom,init-voltage = <0x2b7cd0>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2b7cd0>; | |
| phandle = <0x4b>; | |
| regulator-name = "8941_l18"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa10 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xa>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l10 { | |
| regulator-min-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x2d0370>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| regulator-name = "8941_l10"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-vsa5 { | |
| qcom,resource-name = "vsa"; | |
| qcom,resource-id = <0x5>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x2>; | |
| status = "disabled"; | |
| regulator-mvs2 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-name = "8941_mvs2"; | |
| status = "disabled"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa19 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x13>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l19 { | |
| linux,phandle = <0x6d>; | |
| regulator-min-microvolt = <0x2c4020>; | |
| qcom,init-voltage = <0x2c4020>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x331df0>; | |
| phandle = <0x6d>; | |
| regulator-name = "8941_l19"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa12 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xc>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l12-ao { | |
| linux,phandle = <0x5e>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x1>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| phandle = <0x5e>; | |
| regulator-name = "8941_l12_ao"; | |
| status = "okay"; | |
| }; | |
| regulator-l12 { | |
| linux,phandle = <0x2>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| phandle = <0x2>; | |
| regulator-name = "8941_l12"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa4 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x4>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l4 { | |
| regulator-min-microvolt = <0x12b128>; | |
| qcom,init-voltage = <0x12b128>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x12b128>; | |
| regulator-name = "8941_l4"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-smpb4 { | |
| qcom,resource-name = "smpb"; | |
| qcom,resource-id = <0x4>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s4-floor-corner { | |
| linux,phandle = <0x6f>; | |
| qcom,use-voltage-floor-corner; | |
| regulator-min-microvolt = <0x1>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x7>; | |
| qcom,always-send-voltage; | |
| phandle = <0x6f>; | |
| regulator-name = "8841_s4_floor_corner"; | |
| }; | |
| regulator-s4-corner { | |
| linux,phandle = <0x19>; | |
| qcom,init-voltage-corner = <0x3>; | |
| regulator-min-microvolt = <0x1>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x7>; | |
| phandle = <0x19>; | |
| regulator-name = "8841_s4_corner"; | |
| qcom,use-voltage-corner; | |
| }; | |
| regulator-s4 { | |
| regulator-min-microvolt = <0xc6f98>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0xdbba0>; | |
| regulator-name = "8841_s4"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-vsa4 { | |
| qcom,resource-name = "vsa"; | |
| qcom,resource-id = <0x4>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x2>; | |
| status = "disabled"; | |
| regulator-mvs1 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-name = "8941_mvs1"; | |
| status = "disabled"; | |
| }; | |
| }; | |
| rpm-regulator-vsa3 { | |
| qcom,resource-name = "vsa"; | |
| qcom,resource-id = <0x3>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x2>; | |
| status = "okay"; | |
| regulator-lvs3 { | |
| linux,phandle = <0x8>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| phandle = <0x8>; | |
| regulator-name = "8941_lvs3"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-smpb1 { | |
| qcom,resource-name = "smpb"; | |
| qcom,resource-id = <0x1>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s1 { | |
| linux,phandle = <0x67>; | |
| regulator-min-microvolt = <0xa4cb8>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x100590>; | |
| phandle = <0x67>; | |
| regulator-name = "8841_s1"; | |
| status = "okay"; | |
| }; | |
| regulator-s1-so { | |
| regulator-min-microvolt = <0xa4cb8>; | |
| qcom,init-voltage = <0xa4cb8>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x2>; | |
| regulator-max-microvolt = <0x100590>; | |
| regulator-name = "8841_s1_so"; | |
| status = "okay"; | |
| }; | |
| regulator-s1-ao { | |
| regulator-min-microvolt = <0xa4cb8>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x1>; | |
| regulator-max-microvolt = <0x100590>; | |
| regulator-name = "8841_s1_ao"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa6 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x6>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l6 { | |
| linux,phandle = <0x42>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| phandle = <0x42>; | |
| regulator-name = "8941_l6"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-vsa1 { | |
| qcom,resource-name = "vsa"; | |
| qcom,resource-id = <0x1>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x2>; | |
| status = "okay"; | |
| regulator-lvs1 { | |
| linux,phandle = <0x57>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| phandle = <0x57>; | |
| regulator-name = "8941_lvs1"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa15 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xf>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l15 { | |
| regulator-min-microvolt = <0x1f47d0>; | |
| qcom,init-voltage = <0x1f47d0>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x1f47d0>; | |
| regulator-name = "8941_l15"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa24 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x18>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l24 { | |
| linux,phandle = <0x43>; | |
| regulator-min-microvolt = <0x2eebb8>; | |
| qcom,init-voltage = <0x2eebb8>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2eebb8>; | |
| phandle = <0x43>; | |
| regulator-name = "8941_l24"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa9 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x9>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l9 { | |
| regulator-min-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x2d0370>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| regulator-name = "8941_l9"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa7 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x7>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l7 { | |
| regulator-min-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| regulator-name = "8941_l7"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-smpb3 { | |
| qcom,resource-name = "smpb"; | |
| qcom,resource-id = <0x3>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s3 { | |
| linux,phandle = <0x66>; | |
| regulator-min-microvolt = <0x100590>; | |
| qcom,init-voltage = <0x100590>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x100590>; | |
| phandle = <0x66>; | |
| regulator-name = "8841_s3"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa2 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x2>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l2 { | |
| linux,phandle = <0x25>; | |
| regulator-min-microvolt = <0x124f80>; | |
| qcom,init-voltage = <0x124f80>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x124f80>; | |
| phandle = <0x25>; | |
| regulator-name = "8941_l2"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa11 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xb>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l11 { | |
| linux,phandle = <0x6c>; | |
| regulator-min-microvolt = <0x12b128>; | |
| qcom,init-voltage = <0x13d620>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x149970>; | |
| phandle = <0x6c>; | |
| regulator-name = "8941_l11"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa1 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x1>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l1 { | |
| linux,phandle = <0x4e>; | |
| regulator-min-microvolt = <0x12b128>; | |
| qcom,init-voltage = <0x12b128>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x12b128>; | |
| phandle = <0x4e>; | |
| regulator-name = "8941_l1"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa21 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x15>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l21 { | |
| linux,phandle = <0xf>; | |
| regulator-min-microvolt = <0x2d0370>; | |
| qcom,init-voltage = <0x2d0370>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| phandle = <0xf>; | |
| regulator-name = "8941_l21"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa17 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x11>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l17 { | |
| linux,phandle = <0x7>; | |
| regulator-min-microvolt = <0x2932e0>; | |
| qcom,init-voltage = <0x2932e0>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2b7cd0>; | |
| phandle = <0x7>; | |
| regulator-name = "8941_l17"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa13 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xd>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l13 { | |
| linux,phandle = <0x10>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x2d0370>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| phandle = <0x10>; | |
| regulator-name = "8941_l13"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-smpa1 { | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x1>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s1 { | |
| regulator-min-microvolt = <0x13d620>; | |
| qcom,init-voltage = <0x13d620>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x13d620>; | |
| regulator-name = "8941_s1"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa22 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x16>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l22 { | |
| linux,phandle = <0x2a>; | |
| regulator-min-microvolt = <0x2dc6c0>; | |
| qcom,init-voltage = <0x2dc6c0>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2dc6c0>; | |
| phandle = <0x2a>; | |
| regulator-name = "8941_l22"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa20 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x14>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l20 { | |
| linux,phandle = <0x44>; | |
| regulator-min-microvolt = <0x2d0370>; | |
| qcom,init-voltage = <0x2d0370>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| phandle = <0x44>; | |
| regulator-name = "8941_l20"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa3 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x3>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l3 { | |
| linux,phandle = <0x6>; | |
| regulator-min-microvolt = <0xf4240>; | |
| qcom,init-voltage = <0x13d620>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x186a00>; | |
| phandle = <0x6>; | |
| regulator-name = "8941_l3"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-smpa3 { | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x3>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s3 { | |
| linux,phandle = <0x2d>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| phandle = <0x2d>; | |
| regulator-name = "8941_s3"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa14 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xe>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l14 { | |
| regulator-min-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| regulator-name = "8941_l14"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-vsa2 { | |
| qcom,resource-name = "vsa"; | |
| qcom,resource-id = <0x2>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x2>; | |
| status = "okay"; | |
| regulator-lvs2 { | |
| linux,phandle = <0x58>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| phandle = <0x58>; | |
| regulator-name = "8941_lvs2"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-smpa2 { | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x2>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s2 { | |
| linux,phandle = <0x4d>; | |
| regulator-min-microvolt = <0x20ce70>; | |
| qcom,init-voltage = <0x20ce70>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x20ce70>; | |
| phandle = <0x4d>; | |
| regulator-name = "8941_s2"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa5 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x5>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l5 { | |
| regulator-min-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| regulator-name = "8941_l5"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa16 { | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x10>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l16 { | |
| regulator-min-microvolt = <0x2932e0>; | |
| qcom,init-voltage = <0x2932e0>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x2932e0>; | |
| regulator-name = "8941_l16"; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-smpb2 { | |
| qcom,resource-name = "smpb"; | |
| qcom,resource-id = <0x2>; | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s2-corner-ao { | |
| linux,phandle = <0x5d>; | |
| regulator-min-microvolt = <0x1>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x1>; | |
| regulator-max-microvolt = <0x7>; | |
| phandle = <0x5d>; | |
| regulator-name = "8841_s2_corner_ao"; | |
| qcom,use-voltage-corner; | |
| }; | |
| regulator-s2 { | |
| linux,phandle = <0x63>; | |
| regulator-min-microvolt = <0x7a120>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x100590>; | |
| phandle = <0x63>; | |
| regulator-name = "8841_s2"; | |
| status = "okay"; | |
| }; | |
| regulator-s2-corner { | |
| linux,phandle = <0x41>; | |
| regulator-min-microvolt = <0x1>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x7>; | |
| phandle = <0x41>; | |
| qcom,consumer-supplies = "vdd_dig", ""; | |
| regulator-name = "8841_s2_corner"; | |
| qcom,use-voltage-corner; | |
| qcom,init-smps-mode = <0x0>; | |
| }; | |
| regulator-s2-floor-corner { | |
| linux,phandle = <0x6e>; | |
| qcom,use-voltage-floor-corner; | |
| regulator-min-microvolt = <0x1>; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,set = <0x3>; | |
| regulator-max-microvolt = <0x7>; | |
| qcom,always-send-voltage; | |
| phandle = <0x6e>; | |
| regulator-name = "8841_s2_floor_corner"; | |
| }; | |
| }; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_4_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_4_in"; | |
| gpios = <0x36 0x0 0x0>; | |
| }; | |
| qcom,msm-mem-hole { | |
| qcom,memblock-remove = <0x5a00000 0x7800000 0xfa00000 0x500000>; | |
| compatible = "qcom,msm-mem-hole"; | |
| }; | |
| qcom,iris-fm { | |
| compatible = "qcom,iris_fm"; | |
| }; | |
| i2c@f9928000 { | |
| #size-cells = <0x0>; | |
| cell-index = <0x3>; | |
| reg-names = "qup_phys_addr"; | |
| interrupt-names = "qup_err_intr"; | |
| #address-cells = <0x1>; | |
| qcom,active-only; | |
| qcom,scl-gpio = <0x5 0x1e 0x0>; | |
| reg = <0xf9928000 0x1000>; | |
| compatible = "qcom,i2c-qup"; | |
| qcom,i2c-bus-freq = <0x61a80>; | |
| interrupts = <0x0 0x64 0x0>; | |
| qcom,i2c-src-freq = <0x124f800>; | |
| qcom,master-id = <0x56>; | |
| qcom,sda-gpio = <0x5 0x1d 0x0>; | |
| tas2552@40 { | |
| tas2552,enable-gpio = <0x5 0x5c 0x0>; | |
| reg = <0x40>; | |
| compatible = "ti,tas2552"; | |
| status = "okay"; | |
| }; | |
| bq24196_charger@6b { | |
| reg = <0x6b>; | |
| compatible = "ti,bq24196_charger"; | |
| status = "okay"; | |
| }; | |
| nfc-nci@e { | |
| qcom,dis-gpio = <0x5 0xd 0x0>; | |
| qcom,clk-gpio = <0x28 0x20 0x0>; | |
| reg = <0xe>; | |
| compatible = "qcom,nfc-nci"; | |
| interrupt-parent = <0x5>; | |
| qcom,irq-gpio = <0x5 0x39 0x0>; | |
| interrupts = <0x39 0x0>; | |
| qcom,clk-src = "BBCLK2"; | |
| }; | |
| pn544-nxp-nfc@28 { | |
| reg = <0x28>; | |
| compatible = "pn544,nxp-nfc"; | |
| pn544,irq-gpio = <0x5 0x3b 0x0>; | |
| pn544,update-gpio = <0x5 0xc 0x0>; | |
| pn544,enable-gpio = <0x5 0xd 0x0>; | |
| interrupt-parent = <0x5>; | |
| interrupts = <0x3b 0x4>; | |
| }; | |
| }; | |
| qcom,msm-stub-codec { | |
| compatible = "qcom,msm-stub-codec"; | |
| }; | |
| qcom,msm-pcm { | |
| qcom,msm-pcm-dsp-id = <0x0>; | |
| compatible = "qcom,msm-pcm-dsp"; | |
| }; | |
| tmc@fc307000 { | |
| linux,phandle = <0x14>; | |
| coresight-child-list = <0x13>; | |
| reg-names = "tmc-base"; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x1>; | |
| reg = <0xfc307000 0x1000>; | |
| compatible = "arm,coresight-tmc"; | |
| coresight-ctis = <0xd 0xe>; | |
| coresight-child-ports = <0x0>; | |
| phandle = <0x14>; | |
| coresight-id = <0x3>; | |
| coresight-name = "coresight-tmc-etf"; | |
| coresight-default-sink; | |
| }; | |
| qcom,mdss_wb_panel { | |
| qcom,mdss_pan_bpp = <0x18>; | |
| qcom,mdss_pan_res = <0x780 0x438>; | |
| compatible = "qcom,mdss_wb"; | |
| qcom,mdss-fb-map = <0x2f>; | |
| }; | |
| qcom,venus@fdce0000 { | |
| reg-names = "wrapper_base", "vbif_base"; | |
| vdd-supply = <0x3c>; | |
| reg = <0xfdce0000 0x4000 0xfdc80000 0x400>; | |
| compatible = "qcom,pil-venus"; | |
| qcom,firmware-name = "venus"; | |
| }; | |
| cti@fc30f000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc30f000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x1a>; | |
| coresight-name = "coresight-cti7"; | |
| }; | |
| cti@fc358000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc358000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x25>; | |
| coresight-name = "coresight-cti-rpm-cpu0"; | |
| }; | |
| qcom,rpm-log@fc19dc00 { | |
| qcom,offset-page-buffer-addr = <0x24>; | |
| qcom,offset-log-len = <0x28>; | |
| qcom,offset-page-indices = <0x38>; | |
| reg = <0xfc19dc00 0x4000>; | |
| compatible = "qcom,rpm-log"; | |
| qcom,offset-version = <0x4>; | |
| qcom,rpm-addr-phys = <0xfc000000>; | |
| qcom,offset-log-len-mask = <0x2c>; | |
| }; | |
| qcom,kgsl-3d0@fdb00000 { | |
| coresight-child-list = <0x20>; | |
| reg-names = "kgsl_3d0_reg_memory", "kgsl_3d0_shader_memory"; | |
| coresight-outports = <0x0>; | |
| qcom,initial-pwrlevel = <0x3>; | |
| coresight-nr-inports = <0x0>; | |
| qcom,chipid = <0x3030002>; | |
| vdd-supply = <0x1e>; | |
| qcom,bus-control; | |
| interrupt-names = "kgsl_3d0_irq"; | |
| iommu = <0x1f>; | |
| qcom,msm-bus,vectors-KBps = <0x1a 0x200 0x0 0x0 0x59 0x25c 0x0 0x0 0x1a 0x200 0x124f80 0x2579c0 0x59 0x25c 0x0 0x30d400 0x1a 0x200 0x124f80 0x2579c0 0x59 0x25c 0x0 0x30d400 0x1a 0x200 0x0 0x382700 0x59 0x25c 0x0 0x30d400 0x1a 0x200 0x124f80 0x2579c0 0x59 0x25c 0x0 0x509100 0x1a 0x200 0x0 0x382700 0x59 0x25c 0x0 0x509100 0x1a 0x200 0x0 0x4af380 0x59 0x25c 0x0 0x509100 0x1a 0x200 0x0 0x382700 0x59 0x25c 0x0 0x5ef880 0x1a 0x200 0x0 0x4af380 0x59 0x25c 0x0 0x5ef880 0x1a 0x200 0x0 0x61a800 0x59 0x25c 0x0 0x5ef880 0x1a 0x200 0x0 0x4af380 0x59 0x25c 0x0 0x70e270 0x1a 0x200 0x0 0x61a800 0x59 0x25c 0x0 0x70e270 0x1a 0x200 0x0 0x71e440 0x59 0x25c 0x0 0x70e270 0x1a 0x200 0x0 0x4af380 0x59 0x25c 0x0 0x8d1d00 0x1a 0x200 0x0 0x71e440 0x59 0x25c 0x0 0x8d1d00>; | |
| qcom,strtstp-sleepwake; | |
| qcom,clk-map = <0x6>; | |
| reg = <0xfdb00000 0x10000 0xfdb20000 0x10000>; | |
| qcom,msm-bus,num-paths = <0x2>; | |
| compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d"; | |
| qcom,idle-timeout = <0x8>; | |
| coresight-child-ports = <0x7>; | |
| vddcx-supply = <0x1d>; | |
| label = "kgsl-3d0"; | |
| qcom,msm-bus,name = "grp3d"; | |
| qcom,msm-bus,num-cases = <0xf>; | |
| coresight-id = <0x43>; | |
| coresight-name = "coresight-gfx"; | |
| interrupts = <0x0 0x21 0x0>; | |
| qcom,id = <0x0>; | |
| qcom,dcvs-core-info { | |
| #size-cells = <0x0>; | |
| qcom,energy-leakage-coeff-a = <0xb>; | |
| qcom,energy-leakage-coeff-c = <0x0>; | |
| qcom,algo-em-max-util-pct = <0x61>; | |
| qcom,core-core-type = <0x1>; | |
| qcom,energy-active-coeff-a = <0x9bc>; | |
| qcom,algo-slack-mode-dynamic = <0x186a0>; | |
| qcom,num-cores = <0x1>; | |
| qcom,algo-max-freq-chg-time-us = <0x186a0>; | |
| qcom,algo-ss-win-size-min-us = <0xf4240>; | |
| qcom,algo-slack-time-max-us = <0x9858>; | |
| #address-cells = <0x1>; | |
| qcom,algo-ss-win-size-max-us = <0xf4240>; | |
| qcom,energy-active-coeff-c = <0x0>; | |
| qcom,energy-leakage-coeff-b = <0x265de>; | |
| qcom,algo-group-id = <0x5f>; | |
| qcom,energy-active-coeff-b = <0x0>; | |
| qcom,energy-leakage-coeff-d = <0x0>; | |
| qcom,algo-slack-weight-thresh-pct = <0x0>; | |
| qcom,algo-em-win-size-min-us = <0x186a0>; | |
| compatible = "qcom,dcvs-core-info"; | |
| qcom,algo-em-win-size-max-us = <0x493e0>; | |
| qcom,algo-slack-time-min-us = <0x9858>; | |
| qcom,algo-disable-pc-threshold = <0x0>; | |
| qcom,power-num-freq = <0x4>; | |
| qcom,sensors = <0x0>; | |
| qcom,algo-ss-util-pct = <0x5f>; | |
| qcom,power-current-temp = <0x19>; | |
| qcom,algo-ss-no-corr-below-freq = <0x0>; | |
| qcom,dcvs-freq@3 { | |
| qcom,freq = <0x0>; | |
| qcom,leakage-energy-offset = <0x0>; | |
| qcom,active-energy-offset = <0xce301>; | |
| qcom,is_trans_level = <0x0>; | |
| reg = <0x3>; | |
| qcom,voltage = <0x0>; | |
| }; | |
| qcom,dcvs-freq@0 { | |
| qcom,freq = <0x0>; | |
| qcom,leakage-energy-offset = <0x0>; | |
| qcom,active-energy-offset = <0x64>; | |
| qcom,is_trans_level = <0x0>; | |
| reg = <0x0>; | |
| qcom,voltage = <0x0>; | |
| }; | |
| qcom,dcvs-freq@2 { | |
| qcom,freq = <0x0>; | |
| qcom,leakage-energy-offset = <0x0>; | |
| qcom,active-energy-offset = <0x64>; | |
| qcom,is_trans_level = <0x0>; | |
| reg = <0x2>; | |
| qcom,voltage = <0x0>; | |
| }; | |
| qcom,dcvs-freq@1 { | |
| qcom,freq = <0x0>; | |
| qcom,leakage-energy-offset = <0x0>; | |
| qcom,active-energy-offset = <0x64>; | |
| qcom,is_trans_level = <0x0>; | |
| reg = <0x1>; | |
| qcom,voltage = <0x0>; | |
| }; | |
| }; | |
| qcom,gpu-pwrlevels { | |
| #size-cells = <0x0>; | |
| #address-cells = <0x1>; | |
| compatible = "qcom,gpu-pwrlevels"; | |
| qcom,gpu-pwrlevel@3 { | |
| reg = <0x3>; | |
| qcom,io-fraction = <0x65>; | |
| qcom,gpu-freq = <0x13ab6680>; | |
| qcom,bus-freq = <0x5>; | |
| }; | |
| qcom,gpu-pwrlevel@0 { | |
| reg = <0x0>; | |
| qcom,io-fraction = <0x65>; | |
| qcom,gpu-freq = <0x22739480>; | |
| qcom,bus-freq = <0xe>; | |
| }; | |
| qcom,gpu-pwrlevel@1 { | |
| reg = <0x1>; | |
| qcom,io-fraction = <0x65>; | |
| qcom,gpu-freq = <0x1b8faa00>; | |
| qcom,bus-freq = <0xb>; | |
| }; | |
| qcom,gpu-pwrlevel@5 { | |
| reg = <0x5>; | |
| qcom,io-fraction = <0x65>; | |
| qcom,gpu-freq = <0x19bfcc0>; | |
| qcom,bus-freq = <0x0>; | |
| }; | |
| qcom,gpu-pwrlevel@2 { | |
| reg = <0x2>; | |
| qcom,io-fraction = <0x65>; | |
| qcom,gpu-freq = <0x172fab40>; | |
| qcom,bus-freq = <0x8>; | |
| }; | |
| qcom,gpu-pwrlevel@4 { | |
| reg = <0x4>; | |
| qcom,io-fraction = <0x65>; | |
| qcom,gpu-freq = <0xbebc200>; | |
| qcom,bus-freq = <0x2>; | |
| }; | |
| }; | |
| }; | |
| qcom,gdsc@fd8c35a4 { | |
| linux,phandle = <0x4>; | |
| reg = <0xfd8c35a4 0x4>; | |
| compatible = "qcom,gdsc"; | |
| qcom,clock-names = "core0_clk", "core1_clk", "core2_clk"; | |
| phandle = <0x4>; | |
| regulator-name = "gdsc_jpeg"; | |
| status = "ok"; | |
| }; | |
| qcom,iommu@fdb10000 { | |
| #size-cells = <0x1>; | |
| linux,phandle = <0x1f>; | |
| ranges; | |
| qcom,iommu-enable-halt; | |
| reg-names = "iommu_base"; | |
| vdd-supply = <0x1d>; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| #address-cells = <0x1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2050 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x2314 0x2394 0x2414 0x2008>; | |
| qcom,msm-bus,vectors-KBps = <0x1a 0x200 0x0 0x0 0x1a 0x200 0x0 0x3e8>; | |
| qcom,alt-vdd-supply = <0x1e>; | |
| qcom,needs-alt-core-clk; | |
| reg = <0xfdb10000 0x10000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-smmu-v1"; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| phandle = <0x1f>; | |
| label = "kgsl_iommu"; | |
| qcom,msm-bus,name = "kgsl_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,iommu-bfb-data = <0x3 0x0 0x4 0x10 0x0 0x0 0x0 0x20 0x0 0x1 0x81 0x0>; | |
| interrupts = <0x0 0x26 0x0>; | |
| status = "ok"; | |
| qcom,iommu-ctx@fdb1a000 { | |
| qcom,iommu-ctx-sids = <0x2>; | |
| reg = <0xfdb1a000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "gfx3d_spare"; | |
| interrupts = <0x0 0xf1 0x0>; | |
| }; | |
| qcom,iommu-ctx@fdb18000 { | |
| qcom,iommu-ctx-sids = <0x0>; | |
| reg = <0xfdb18000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "gfx3d_user"; | |
| interrupts = <0x0 0xf1 0x0>; | |
| }; | |
| qcom,iommu-ctx@fdb19000 { | |
| qcom,iommu-ctx-sids = <0x1>; | |
| reg = <0xfdb19000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "gfx3d_priv"; | |
| interrupts = <0x0 0xf1 0x0>; | |
| }; | |
| }; | |
| qcom,smp2pgpio-smp2p-1-in { | |
| linux,phandle = <0x32>; | |
| qcom,remote-pid = <0x1>; | |
| qcom,is-inbound; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x32>; | |
| }; | |
| qcom,smp2pgpio_client_rdbg_1_out { | |
| compatible = "qcom,smp2pgpio_client_rdbg_1_out"; | |
| gpios = <0x3b 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio_client_rdbg_1_in { | |
| compatible = "qcom,smp2pgpio_client_rdbg_1_in"; | |
| gpios = <0x3a 0x0 0x0>; | |
| }; | |
| cti@fc348000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc348000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x21>; | |
| coresight-name = "coresight-cti-video-cpu0"; | |
| }; | |
| qcom,msm-pcm-afe { | |
| compatible = "qcom,msm-pcm-afe"; | |
| }; | |
| msm_tspp@f99d8000 { | |
| qcom,gpio-names = "tsif_clk", "tsif_en", "tsif_data", "tsif_sync", "tsif_clk", "tsif_en", "tsif_data", "tsif_sync"; | |
| qcom,gpios-func = <0x1>; | |
| cell-index = <0x0>; | |
| reg-names = "MSM_TSIF0_PHYS", "MSM_TSIF1_PHYS", "MSM_TSPP_PHYS", "MSM_TSPP_BAM_PHYS"; | |
| qcom,tsif-ref-clk = "ref_clk"; | |
| interrupt-names = "TSIF_TSPP_IRQ", "TSIF0_IRQ", "TSIF1_IRQ", "TSIF_BAM_IRQ"; | |
| qcom,msm-bus,vectors-KBps = <0x52 0x200 0x0 0x0 0x52 0x200 0x3000 0x6000>; | |
| reg = <0xf99d8000 0x1000 0xf99d9000 0x1000 0xf99da000 0x1000 0xf99c4000 0x14000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,tsif-pclk = "iface_clk"; | |
| compatible = "qcom,msm_tspp"; | |
| vdd_cx-supply = <0x41>; | |
| gpios = <0x5 0x59 0x0 0x5 0x5a 0x0 0x5 0x5b 0x0 0x5 0x5c 0x0 0x5 0x5d 0x0 0x5 0x5e 0x0 0x5 0x5f 0x0 0x5 0x60 0x0>; | |
| qcom,msm-bus,name = "tsif"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| interrupts = <0x0 0x79 0x0 0x0 0x77 0x0 0x0 0x78 0x0 0x0 0x7a 0x0>; | |
| }; | |
| qcom,csid@fda08000 { | |
| cell-index = <0x0>; | |
| reg-names = "csid"; | |
| qcom,mipi-csi-vdd-supply = <0x2>; | |
| interrupt-names = "csid"; | |
| reg = <0xfda08000 0x100>; | |
| compatible = "qcom,csid"; | |
| qcom,csi-vdd-voltage = <0x1b7740>; | |
| interrupts = <0x0 0x33 0x0>; | |
| }; | |
| etm@fc33d000 { | |
| coresight-child-list = <0x17>; | |
| reg-names = "etm-base"; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc33d000 0x1000>; | |
| compatible = "arm,coresight-etm"; | |
| coresight-child-ports = <0x1>; | |
| coresight-id = <0xb>; | |
| qcom,pc-save; | |
| coresight-name = "coresight-etm1"; | |
| qcom,round-robin; | |
| }; | |
| rpm_etm0 { | |
| coresight-child-list = <0x18>; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x0>; | |
| compatible = "qcom,coresight-rpm-etm"; | |
| coresight-child-ports = <0x0>; | |
| coresight-id = <0x11>; | |
| coresight-name = "coresight-rpm-etm0"; | |
| }; | |
| qcom,rpm-rbcpr-stats@fc000000 { | |
| reg = <0xfc000000 0x1a0000>; | |
| compatible = "qcom,rpmrbcpr-stats"; | |
| qcom,start-offset = <0x190010>; | |
| }; | |
| sdhci@f98e4900 { | |
| qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3"; | |
| linux,phandle = <0x4a>; | |
| reg-names = "hc_mem", "core_mem"; | |
| interrupt-map = <0x0 0x1 0x0 0x81 0x0 0x1 0x1 0x0 0xe3 0x0 0x2 0x5 0x5f 0x8>; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100>; | |
| qcom,cpu-dma-latency-us = <0xc8>; | |
| interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq"; | |
| #address-cells = <0x0>; | |
| interrupt-map-mask = <0xffffffff>; | |
| qcom,msm-bus,vectors-KBps = <0x50 0x200 0x0 0x0 0x50 0x200 0x640 0xc80 0x50 0x200 0x13880 0x27100 0x50 0x200 0x186a0 0x30d40 0x50 0x200 0x30d40 0x61a80 0x50 0x200 0x61a80 0xc3500 0x50 0x200 0xc3500 0x186a00 0x50 0x200 0x1f4000 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| reg = <0xf98e4900 0x11c 0xf98e4000 0x800>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,sdhci-msm"; | |
| qcom,bus-width = <0x4>; | |
| gpios = <0x5 0x5d 0x0 0x5 0x5b 0x0 0x5 0x60 0x0 0x5 0x5f 0x0 0x5 0x5e 0x0 0x5 0x5c 0x0>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-parent = <0x4a>; | |
| phandle = <0x4a>; | |
| qcom,msm-bus,name = "sdhc4"; | |
| qcom,msm-bus,num-cases = <0x8>; | |
| interrupts = <0x0 0x1 0x2>; | |
| status = "disable"; | |
| }; | |
| qcom,sdcc@f9864000 { | |
| qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3"; | |
| linux,phandle = <0x46>; | |
| cell-index = <0x3>; | |
| reg-names = "core_mem", "dml_mem", "bam_mem"; | |
| interrupt-map = <0x0 0x1 0x0 0x7f 0x0 0x1 0x1 0x0 0xdf 0x0 0x2 0x5 0x25 0x8>; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100>; | |
| interrupt-names = "core_irq", "bam_irq", "sdiowakeup_irq"; | |
| #address-cells = <0x0>; | |
| interrupt-map-mask = <0xffffffff>; | |
| qcom,sup-voltages = <0x708 0x708>; | |
| qcom,msm-bus,vectors-KBps = <0x4f 0x200 0x0 0x0 0x4f 0x200 0x640 0xc80 0x4f 0x200 0x13880 0x27100 0x4f 0x200 0x186a0 0x30d40 0x4f 0x200 0x30d40 0x61a80 0x4f 0x200 0x61a80 0xc3500 0x4f 0x200 0xc3500 0x186a00 0x4f 0x200 0x1f4000 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| reg = <0xf9864000 0x800 0xf9864800 0x100 0xf9844000 0x7000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-sdcc"; | |
| qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50"; | |
| qcom,bus-width = <0x4>; | |
| gpios = <0x5 0x28 0x0 0x5 0x27 0x0 0x5 0x26 0x0 0x5 0x25 0x0 0x5 0x24 0x0 0x5 0x23 0x0>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-parent = <0x46>; | |
| phandle = <0x46>; | |
| qcom,msm-bus,name = "sdcc3"; | |
| qcom,msm-bus,num-cases = <0x8>; | |
| interrupts = <0x0 0x1 0x2>; | |
| status = "disable"; | |
| }; | |
| cti@fc341000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc341000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x1d>; | |
| coresight-name = "coresight-cti-cpu0"; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-2-out { | |
| linux,phandle = <0x65>; | |
| qcom,remote-pid = <0x2>; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "master-kernel"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x65>; | |
| }; | |
| qcom,cpp@fda04000 { | |
| cell-index = <0x0>; | |
| reg-names = "cpp", "cpp_vbif", "cpp_hw"; | |
| vdd-supply = <0x3>; | |
| interrupt-names = "cpp"; | |
| reg = <0xfda04000 0x100 0xfda40000 0x200 0xfda18000 0x18>; | |
| compatible = "qcom,cpp"; | |
| interrupts = <0x0 0x31 0x0>; | |
| }; | |
| cti@fc309000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc309000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x14>; | |
| coresight-name = "coresight-cti1"; | |
| }; | |
| qcom,wfd { | |
| compatible = "qcom,msm-wfd"; | |
| }; | |
| qcom,pronto@fb21b000 { | |
| qcom,gpio-force-stop = <0x6b 0x0 0x0>; | |
| reg-names = "pmu_base", "clk_base", "halt_base"; | |
| qcom,gpio-err-ready = <0x6a 0x1 0x0>; | |
| vdd_pronto_pll-supply = <0x2>; | |
| reg = <0xfb21b000 0x3000 0xfc401700 0x4 0xfd485300 0xc>; | |
| compatible = "qcom,pil-pronto"; | |
| qcom,gpio-proxy-unvote = <0x6a 0x2 0x0>; | |
| interrupts = <0x0 0x95 0x1>; | |
| qcom,gpio-err-fatal = <0x6a 0x0 0x0>; | |
| qcom,firmware-name = "wcnss"; | |
| }; | |
| qcom,qseecom@7b00000 { | |
| reg-names = "secapp-region"; | |
| qcom,support-bus-scaling; | |
| qcom,hlos-ce-hw-instance = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x37 0x200 0x0 0x0 0x37 0x200 0x0 0x0 0x37 0x200 0x1d4c0 0x124f80 0x37 0x200 0x60180 0x3c0f00>; | |
| qcom,disk-encrypt-pipe-pair = <0x2>; | |
| reg = <0x7b00000 0x500000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,qsee-ce-hw-instance = <0x0>; | |
| compatible = "qcom,qseecom"; | |
| qcom,msm-bus,name = "qseecom-noc"; | |
| qcom,msm-bus,num-cases = <0x4>; | |
| }; | |
| sdhci@f98a4900 { | |
| linux,phandle = <0x48>; | |
| qcom,pad-pull-off = <0x0 0x3 0x3>; | |
| qcom,pad-drv-on = <0x7 0x4 0x4>; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| reg-names = "hc_mem", "core_mem"; | |
| interrupt-map = <0x0 0x1 0x0 0x7d 0x0 0x1 0x1 0x0 0xdd 0x0 0x2 0x5 0x4d 0x3>; | |
| qcom,vdd-current-level = <0x2328 0xc3500>; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200>; | |
| qcom,cpu-dma-latency-us = <0xc8>; | |
| vdd-supply = <0xf>; | |
| vdd-io-supply = <0x10>; | |
| interrupt-names = "hc_irq", "pwr_irq", "status_irq"; | |
| #address-cells = <0x0>; | |
| qcom,vdd-io-current-level = <0x6 0x55f0>; | |
| interrupt-map-mask = <0xffffffff>; | |
| qcom,dat1-mpm-int = <0x2c>; | |
| qcom,msm-bus,vectors-KBps = <0x51 0x200 0x0 0x0 0x51 0x200 0x640 0xc80 0x51 0x200 0x13880 0x27100 0x51 0x200 0x186a0 0x30d40 0x51 0x200 0x30d40 0x61a80 0x51 0x200 0x61a80 0xc3500 0x51 0x200 0xc3500 0x186a00 0x51 0x200 0x1f4000 0x3e8000>; | |
| cd-gpios = <0x5 0x4d 0x1>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| reg = <0xf98a4900 0x11c 0xf98a4000 0x800>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,vdd-io-voltage-level = <0x1b7740 0x2d0370>; | |
| compatible = "qcom,sdhci-msm"; | |
| qcom,bus-width = <0x4>; | |
| qcom,pad-pull-on = <0x0 0x3 0x3>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-parent = <0x48>; | |
| phandle = <0x48>; | |
| qcom,msm-bus,name = "sdhc2"; | |
| qcom,msm-bus,num-cases = <0x8>; | |
| interrupts = <0x0 0x1 0x2>; | |
| status = "ok"; | |
| qcom,pad-drv-off = <0x0 0x0 0x0>; | |
| }; | |
| qcom,msm-compr-dsp { | |
| compatible = "qcom,msm-compr-dsp"; | |
| }; | |
| qcom,csiphy@fda0b000 { | |
| cell-index = <0x1>; | |
| reg-names = "csiphy", "csiphy_clk_mux"; | |
| interrupt-names = "csiphy"; | |
| reg = <0xfda0b000 0x200 0xfda00038 0x4>; | |
| compatible = "qcom,csiphy"; | |
| interrupts = <0x0 0x4f 0x0>; | |
| }; | |
| qcom,msm-pcm-routing { | |
| compatible = "qcom,msm-pcm-routing"; | |
| }; | |
| dsp_sharedmem { | |
| reg-names = "rfsa_dsp"; | |
| reg = <0xfd60000 0x20000>; | |
| compatible = "qcom,sharedmem-uio"; | |
| }; | |
| qcom,sdcc@f98a4000 { | |
| linux,phandle = <0x45>; | |
| qcom,pad-pull-off = <0x0 0x3 0x3>; | |
| qcom,pad-drv-on = <0x7 0x4 0x4>; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| cell-index = <0x2>; | |
| reg-names = "core_mem", "dml_mem", "bam_mem"; | |
| interrupt-map = <0x0 0x1 0x0 0x7d 0x0 0x1 0x1 0x0 0xdc 0x0 0x2 0x5 0x3e 0x3>; | |
| qcom,vdd-current-level = <0x2328 0xc3500>; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200>; | |
| qcom,xpc; | |
| qcom,current-limit = <0x320>; | |
| vdd-supply = <0xf>; | |
| vdd-io-supply = <0x10>; | |
| interrupt-names = "core_irq", "bam_irq", "status_irq"; | |
| #address-cells = <0x0>; | |
| qcom,vdd-io-current-level = <0x6 0x55f0>; | |
| interrupt-map-mask = <0xffffffff>; | |
| qcom,sup-voltages = <0xb86 0xb86>; | |
| qcom,dat1-mpm-int = <0x2c>; | |
| qcom,msm-bus,vectors-KBps = <0x51 0x200 0x0 0x0 0x51 0x200 0x640 0xc80 0x51 0x200 0x13880 0x27100 0x51 0x200 0x186a0 0x30d40 0x51 0x200 0x30d40 0x61a80 0x51 0x200 0x61a80 0xc3500 0x51 0x200 0xc3500 0x186a00 0x51 0x200 0x1f4000 0x3e8000>; | |
| cd-gpios = <0x5 0x3e 0x1>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| reg = <0xf98a4000 0x800 0xf98a4800 0x100 0xf9884000 0x7000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,vdd-io-voltage-level = <0x1b7740 0x2d0370>; | |
| compatible = "qcom,msm-sdcc"; | |
| qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; | |
| qcom,bus-width = <0x4>; | |
| qcom,pad-pull-on = <0x0 0x3 0x3>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-parent = <0x45>; | |
| phandle = <0x45>; | |
| qcom,msm-bus,name = "sdcc2"; | |
| qcom,msm-bus,num-cases = <0x8>; | |
| interrupts = <0x0 0x1 0x2>; | |
| status = "disabled"; | |
| qcom,pad-drv-off = <0x0 0x0 0x0>; | |
| }; | |
| qcom,msm-contig-mem { | |
| qcom,memory-reservation-type = "EBI1"; | |
| compatible = "qcom,msm-contig-mem"; | |
| qcom,memory-reservation-size = <0x280000>; | |
| }; | |
| qcom,cache_erp@f9012000 { | |
| reg-names = "l2_saw", "krait0_saw", "krait1_saw", "krait2_saw", "krait3_saw", "krait0_acs", "krait1_acs", "krait2_acs", "krait3_acs"; | |
| interrupt-names = "l1_irq", "l2_irq"; | |
| reg = <0xf9012000 0x80 0xf9089000 0x80 0xf9099000 0x80 0xf90a9000 0x80 0xf90b9000 0x80 0xf9088000 0x40 0xf9098000 0x40 0xf90a8000 0x40 0xf90b8000 0x40>; | |
| compatible = "qcom,cache_erp"; | |
| interrupts = <0x1 0x9 0x0 0x0 0x2 0x0>; | |
| }; | |
| qcom,gdsc@fd8c4034 { | |
| linux,phandle = <0x1d>; | |
| reg = <0xfd8c4034 0x4>; | |
| compatible = "qcom,gdsc"; | |
| phandle = <0x1d>; | |
| regulator-name = "gdsc_oxili_cx"; | |
| status = "ok"; | |
| }; | |
| l2-pmu { | |
| compatible = "qcom,l2-pmu"; | |
| interrupts = <0x0 0x1 0x0>; | |
| }; | |
| mdm_sharedmem { | |
| reg-names = "rfsa_mdm"; | |
| reg = <0xfd60000 0x20000>; | |
| compatible = "qcom,sharedmem-uio"; | |
| }; | |
| etm@fc33e000 { | |
| coresight-child-list = <0x17>; | |
| reg-names = "etm-base"; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc33e000 0x1000>; | |
| compatible = "arm,coresight-etm"; | |
| coresight-child-ports = <0x2>; | |
| coresight-id = <0xc>; | |
| qcom,pc-save; | |
| coresight-name = "coresight-etm2"; | |
| qcom,round-robin; | |
| }; | |
| qcom,msm-adsp-sensors { | |
| qcom,dst-id = <0x25c>; | |
| qcom,ib = <0x1f00000>; | |
| compatible = "qcom,msm-adsp-sensors"; | |
| qcom,src-id = <0xb>; | |
| qcom,ab = <0x1f00000>; | |
| }; | |
| qcom,jpeg@fda1c000 { | |
| cell-index = <0x0>; | |
| reg-names = "jpeg"; | |
| vdd-supply = <0x4>; | |
| interrupt-names = "jpeg"; | |
| reg = <0xfda1c000 0x400>; | |
| compatible = "qcom,jpeg"; | |
| interrupts = <0x0 0x3b 0x0>; | |
| }; | |
| qcom,tz-log@fe805720 { | |
| reg = <0xfe805720 0x1000>; | |
| compatible = "qcom,tz-log"; | |
| }; | |
| qcom,sdcc@f9824000 { | |
| qcom,pad-pull-off = <0x0 0x3 0x3>; | |
| qcom,pad-drv-on = <0x7 0x4 0x4>; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| cell-index = <0x1>; | |
| reg-names = "core_mem", "dml_mem", "bam_mem"; | |
| qcom,vdd-current-level = <0x320 0x7a120>; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200>; | |
| vdd-supply = <0x44>; | |
| vdd-io-supply = <0x2d>; | |
| interrupt-names = "core_irq", "bam_irq"; | |
| qcom,vdd-io-current-level = <0xfa 0x25990>; | |
| qcom,sup-voltages = <0xb86 0xb86>; | |
| qcom,dat1-mpm-int = <0x2a>; | |
| qcom,msm-bus,vectors-KBps = <0x4e 0x200 0x0 0x0 0x4e 0x200 0x640 0xc80 0x4e 0x200 0x13880 0x27100 0x4e 0x200 0x186a0 0x30d40 0x4e 0x200 0x30d40 0x61a80 0x4e 0x200 0x61a80 0xc3500 0x4e 0x200 0xc3500 0x186a00 0x4e 0x200 0x1f4000 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| reg = <0xf9824000 0x800 0xf9824800 0x100 0xf9804000 0x7000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,vdd-io-voltage-level = <0x1b7740 0x1b7740>; | |
| compatible = "qcom,msm-sdcc"; | |
| qcom,vdd-lpm-sup; | |
| qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v"; | |
| qcom,bus-width = <0x8>; | |
| qcom,nonremovable; | |
| qcom,vdd-io-always-on; | |
| qcom,pad-pull-on = <0x0 0x3 0x3>; | |
| qcom,msm-bus,name = "sdcc1"; | |
| qcom,msm-bus,num-cases = <0x8>; | |
| interrupts = <0x0 0x7b 0x0 0x0 0x89 0x0>; | |
| status = "disabled"; | |
| qcom,vdd-always-on; | |
| qcom,pad-drv-off = <0x0 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-rdbg-1-out { | |
| linux,phandle = <0x3b>; | |
| qcom,remote-pid = <0x1>; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "rdbg"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x3b>; | |
| }; | |
| qcom,iommu@fda64000 { | |
| #size-cells = <0x1>; | |
| ranges; | |
| qcom,iommu-enable-halt; | |
| reg-names = "iommu_base"; | |
| vdd-supply = <0x4>; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| #address-cells = <0x1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2050 0x2514 0x2540 0x256c 0x2314 0x2394 0x2414 0x20ac 0x215c 0x220c 0x2008 0x200c 0x2010 0x2014>; | |
| qcom,msm-bus,vectors-KBps = <0x3e 0x200 0x0 0x0 0x3e 0x200 0x0 0x3e8>; | |
| qcom,needs-alt-core-clk; | |
| reg = <0xfda64000 0x10000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-smmu-v1"; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| label = "jpeg_iommu"; | |
| qcom,msm-bus,name = "jpeg_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,iommu-bfb-data = <0xffff 0x0 0x4 0x4 0x0 0x0 0x10 0x50 0x0 0x2804 0x9614 0x0 0x0 0x0 0x0>; | |
| interrupts = <0x0 0x43 0x0>; | |
| status = "ok"; | |
| qcom,iommu-ctx@fda6e000 { | |
| qcom,iommu-ctx-sids = <0x2>; | |
| reg = <0xfda6e000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "jpeg_dec"; | |
| interrupts = <0x0 0x46 0x0>; | |
| }; | |
| qcom,iommu-ctx@fda6c000 { | |
| qcom,iommu-ctx-sids = <0x0>; | |
| reg = <0xfda6c000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "jpeg_enc0"; | |
| interrupts = <0x0 0x46 0x0>; | |
| }; | |
| qcom,iommu-ctx@fda6d000 { | |
| qcom,iommu-ctx-sids = <0x1>; | |
| reg = <0xfda6d000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "jpeg_enc1"; | |
| interrupts = <0x0 0x46 0x0>; | |
| }; | |
| }; | |
| android_usb@fe8050c8 { | |
| qcom,android-usb-swfi-latency = <0x1>; | |
| reg = <0xfe8050c8 0xc8>; | |
| compatible = "qcom,android-usb"; | |
| }; | |
| tmc@fc322000 { | |
| linux,phandle = <0x11>; | |
| qcom,memory-size = <0x100000>; | |
| reg-names = "tmc-base", "bam-base"; | |
| coresight-nr-inports = <0x1>; | |
| interrupt-names = "byte-cntr-irq"; | |
| reg = <0xfc322000 0x1000 0xfc37c000 0x3000>; | |
| compatible = "arm,coresight-tmc"; | |
| coresight-ctis = <0xd 0xe>; | |
| phandle = <0x11>; | |
| coresight-id = <0x0>; | |
| coresight-name = "coresight-tmc-etr"; | |
| interrupts = <0x0 0xa6 0x0>; | |
| }; | |
| qcom,iommu@fdc84000 { | |
| #size-cells = <0x1>; | |
| ranges; | |
| qcom,iommu-enable-halt; | |
| reg-names = "iommu_base", "clk_base"; | |
| vdd-supply = <0x3c>; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| #address-cells = <0x1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2050 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x2314 0x2394 0x2414 0x2008 0x200c 0x2010 0x2014 0x2018 0x201c 0x2020 0x2024 0x2028 0x202c 0x2030 0x2034 0x2038>; | |
| qcom,msm-bus,vectors-KBps = <0x3f 0x200 0x0 0x0 0x3f 0x200 0x0 0x3e8>; | |
| qcom,needs-alt-core-clk; | |
| reg = <0xfdc84000 0x10000 0xfdce0004 0x4>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-smmu-v1"; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| label = "venus_iommu"; | |
| qcom,iommu-secure-id = <0x0>; | |
| qcom,msm-bus,name = "venus_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,iommu-bfb-data = <0xffffffff 0xffffffff 0x4 0x8 0x0 0x13205 0x4000 0x14020 0x0 0x94 0x114 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| interrupts = <0x0 0x2d 0x0>; | |
| status = "ok"; | |
| qcom,iommu-ctx@fdc8c000 { | |
| linux,phandle = <0x71>; | |
| qcom,iommu-ctx-sids = <0x0 0x1 0x2 0x3 0x4 0x5 0x7>; | |
| reg = <0xfdc8c000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| phandle = <0x71>; | |
| label = "venus_ns"; | |
| interrupts = <0x0 0x2a 0x0>; | |
| }; | |
| qcom,iommu-ctx@fdc8e000 { | |
| qcom,secure-context; | |
| qcom,iommu-ctx-sids = <0xc0 0xc6>; | |
| reg = <0xfdc8e000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| label = "venus_fw"; | |
| interrupts = <0x0 0x2a 0x0 0x0 0x2b 0x0>; | |
| }; | |
| qcom,iommu-ctx@fdc8f000 { | |
| linux,phandle = <0x73>; | |
| qcom,secure-context; | |
| qcom,iommu-ctx-sids = <0x85>; | |
| reg = <0xfdc8f000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| phandle = <0x73>; | |
| label = "venus_sec_pixel"; | |
| interrupts = <0x0 0x2a 0x0 0x0 0x2b 0x0>; | |
| }; | |
| qcom,iommu-ctx@fdc8d000 { | |
| linux,phandle = <0x72>; | |
| qcom,secure-context; | |
| qcom,iommu-ctx-sids = <0x80 0x81 0x82 0x83 0x84>; | |
| reg = <0xfdc8d000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| phandle = <0x72>; | |
| label = "venus_sec_bitstream"; | |
| interrupts = <0x0 0x2a 0x0 0x0 0x2b 0x0>; | |
| }; | |
| qcom,iommu-ctx@fdc90000 { | |
| linux,phandle = <0x74>; | |
| qcom,secure-context; | |
| qcom,iommu-ctx-sids = <0x87 0xa0>; | |
| reg = <0xfdc90000 0x1000>; | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| phandle = <0x74>; | |
| label = "venus_sec_non_pixel"; | |
| interrupts = <0x0 0x2a 0x0 0x0 0x2b 0x0>; | |
| }; | |
| }; | |
| qcom,mdss_mdp@fd900000 { | |
| linux,phandle = <0x27>; | |
| qcom,mdss-prefill-y-buffer-bytes = <0x1000>; | |
| qcom,max-clk-rate = <0x1312d000>; | |
| qcom,mdss-pipe-vig-fetch-id = <0x1 0x4 0x7>; | |
| qcom,mdss-pref-prim-intf = "dsi"; | |
| reg-names = "mdp_phys", "vbif_phys"; | |
| qcom,mdss-prefill-scaler-buffer-lines-caf = <0x4>; | |
| qcom,mdss-clk-factor = <0x5 0x4>; | |
| qcom,mdss-mixer-wb-off = <0x3e00 0x4200>; | |
| qcom,mdss-pingpong-off = <0x12d00 0x12e00 0x12f00>; | |
| qcom,mdss-intf-off = <0x12500 0x12700 0x12900 0x12b00>; | |
| vdd-supply = <0x21>; | |
| qcom,mdss-smp-data = <0x16 0x1000>; | |
| qcom,mdss-has-wfd-blk; | |
| qcom,mdss-ctl-off = <0x600 0x700 0x800 0x900 0xa00>; | |
| qcom,mdss-mixer-intf-off = <0x3200 0x3600 0x3a00>; | |
| qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x3ac 0x4 0x8 0x3b4 0x4 0x8 0x3bc 0x4 0x8>; | |
| qcom,mdss-pipe-dma-xin-id = <0x2 0xa>; | |
| qcom,mdss-prefill-outstanding-buffer-bytes = <0x400>; | |
| qcom,mdss-prefill-pingpong-buffer-pixels = <0x1000>; | |
| qcom,mdss-ib-factor = <0x6 0x5>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x0 0x0 0x16 0x200 0x0 0x61a800 0x16 0x200 0x0 0x61a800>; | |
| qcom,mdss-pipe-rgb-off = <0x1e00 0x2200 0x2600>; | |
| qcom,mdss-wb-off = <0x11100 0x11500 0x11900 0x11d00 0x12100>; | |
| qcom,vbif-settings = <0x4 0x1>; | |
| qcom,mdss-pipe-rgb-fetch-id = <0x10 0x11 0x12>; | |
| batfet-supply = <0x22>; | |
| qcom,mdss-has-bwc; | |
| qcom,mdss-dspp-off = <0x4600 0x4a00 0x4e00>; | |
| reg = <0xfd900000 0x22100 0xfd924000 0x1000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,mdp-settings = <0x2e0 0xe9 0x2e4 0x55 0x3ac 0xc0000ccc 0x3b4 0xc0000ccc 0x3bc 0xcccccc 0x4a8 0xcccc0c0 0x4b0 0xccccc0c0 0x4b8 0xccccc000>; | |
| compatible = "qcom,mdss_mdp"; | |
| qcom,mdss-ad-off = <0x13100 0x13300>; | |
| qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x3ac 0x0 0x0 0x3b4 0x0 0x0 0x3bc 0x0 0x0>; | |
| qcom,mdss-pipe-vig-off = <0x1200 0x1600 0x1a00>; | |
| qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x3ac 0x8 0xc 0x3b4 0x8 0xc>; | |
| qcom,mdss-pipe-dma-off = <0x2a00 0x2e00>; | |
| qcom,mdss-prefill-fbc-lines = <0x2>; | |
| qcom,mdss-pipe-rgb-xin-id = <0x1 0x5 0x9>; | |
| phandle = <0x27>; | |
| qcom,mdss-prefill-post-scaler-buffer-pixels = <0x0>; | |
| qcom,mdss-prefill-scaler-buffer-lines-bilinear = <0x2>; | |
| qcom,msm-bus,name = "mdss_mdp"; | |
| qcom,msm-bus,num-cases = <0x3>; | |
| qcom,mdss-ab-factor = <0x2 0x1>; | |
| qcom,max-bandwidth-high-kbps = <0x2dc6c0>; | |
| qcom,mdss-pipe-dma-fetch-id = <0xa 0xd>; | |
| interrupts = <0x0 0x48 0x0>; | |
| qcom,mdss-has-decimation; | |
| qcom,mdss-pipe-vig-xin-id = <0x0 0x4 0x8>; | |
| qcom,max-bandwidth-low-kbps = <0x29f630>; | |
| qcom,dsi_jdi_qhd_video_0 { | |
| qcom,mdss-dsi-h-back-porch = <0x2c>; | |
| qcom,mdss-dsi-panel-controller = <0x24>; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-v-front-porch = <0x8>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-panel-broadcast-mode; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-panel-name = "Dual 0 video mode dsi panel"; | |
| qcom,mdss-dsi-t-clk-pre = <0x27>; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; | |
| qcom,mdss-dsi-h-front-porch = <0x78>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-panel-timings = <0xcd322200 0x60642634 0x29030400>; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-panel-height = <0x5a0>; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [05 01 00 00 0a 00 01 00 15 01 00 00 0a 00 02 3a 77 39 01 00 00 0a 00 05 2a 00 00 04 ff 39 01 00 00 0a 00 05 2b 00 00 05 9f 15 01 00 00 0a 00 02 35 00 39 01 00 00 0a 00 03 44 00 00 15 01 00 00 0a 00 02 51 ff 15 01 00 00 0a 00 02 53 24 15 01 00 00 0a 00 02 55 00 05 01 00 00 78 00 01 11 23 01 00 00 0a 00 02 b0 00 29 01 00 00 0a 00 02 b3 14 29 01 00 00 0a 00 14 ce 7d 40 48 56 67 78 88 98 a7 b5 c3 d1 de e9 f2 fa ff 04 00 23 01 00 00 0a 00 02 b0 03 05 01 00 00 10 00 01 29]; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-panel-width = <0x500>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0xc8 0x1 0x14>; | |
| qcom,mdss-dsi-t-clk-post = <0x3>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| }; | |
| qcom,mdss_dsi_orise_720p_video { | |
| qcom,mdss-pan-underflow-clr = <0xff>; | |
| qcom,mdss-pan-dsi-dlane-swap = <0x0>; | |
| qcom,dsi-ctrl-phandle = <0x23>; | |
| qcom,mdss-pan-dest = "display_2"; | |
| qcom,mdss-pan-dsi-framerate = <0x3c>; | |
| qcom,mdss-pan-dsi-bllp-power-stop = <0x1 0x1>; | |
| qcom,mdss-pan-dsi-mode = <0x0>; | |
| qcom,off-cmds-dsi-state = "DSI_LP_MODE"; | |
| qcom,panel-phy-timingSettings = <0x69291f00 0x5555192a 0x2a030400>; | |
| qcom,panel-phy-strengthCtrl = [77 06]; | |
| qcom,mdss-pan-dsi-stream = <0x0>; | |
| qcom,panel-phy-regulatorSettings = [03 01 01 00 20 00 01]; | |
| qcom,mdss-pan-dsi-vc = <0x0>; | |
| qcom,mdss-pan-dsi-mdp-tr = <0x0>; | |
| qcom,mdss-pan-bpp = <0x18>; | |
| qcom,mdss-pan-dsi-dma-tr = <0x4>; | |
| qcom,on-cmds-dsi-state = "DSI_LP_MODE"; | |
| qcom,mdss-pan-dsi-data-lanes = <0x1 0x1 0x1 0x1>; | |
| qcom,mdss-pan-dsi-dst-format = <0x3>; | |
| qcom,mdss-pan-dsi-traffic-mode = <0x1>; | |
| qcom,mdss-pan-dsi-h-pulse-mode = <0x0>; | |
| label = "orise 720p video mode dsi panel"; | |
| qcom,mdss-pan-dsi-rgb-swap = <0x0>; | |
| qcom,mdss-pan-dsi-h-power-stop = <0x0 0x0 0x0>; | |
| qcom,panel-off-cmds = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,mdss-pan-res = <0x2d0 0x500>; | |
| qcom,mdss-pan-dsi-t-clk = <0x1b 0x4>; | |
| qcom,mdss-pan-bl-levels = <0x1 0xff>; | |
| qcom,panel-phy-bistCtrl = [00 00 b1 ff 00 00]; | |
| qcom,panel-on-cmds = [05 01 00 00 78 00 02 11 00 05 01 00 00 78 00 02 29 00]; | |
| qcom,mdss-pan-porch-values = <0x20 0xc 0x90 0x3 0x4 0x9>; | |
| qcom,panel-phy-laneConfig = [00 c2 45 00 00 00 00 01 75 00 c2 45 00 00 00 00 01 75 00 c2 45 00 00 00 00 01 75 00 c2 45 00 00 00 00 01 75 00 02 45 00 00 00 00 01 97]; | |
| }; | |
| qcom,dsi_jdi_1440p_video_1 { | |
| linux,phandle = <0x2b>; | |
| qcom,mdss-dsi-h-back-porch = <0x22>; | |
| qcom,mdss-dsi-panel-controller = <0x23>; | |
| qcom,mdss-dsi-panel-destination = "display_2"; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-v-front-porch = <0x4>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x6>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-underflow-color = <0x0>; | |
| qcom,mdss-dsi-panel-name = "jdi 1440p video mode dsi panel2"; | |
| qcom,mdss-dsi-t-clk-pre = <0x3e>; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-panel-framerate = <0x37>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-panel-manufacture = "JDI"; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,cont-splash-enabled; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-h-front-porch = <0x118>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| compatible = "qcom,mdss-dsi-panel2"; | |
| qcom,mdss-dsi-panel-timings = <0xe6382600 0x68aa2a3a 0x2c030400>; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-panel-height = <0xa00>; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-version = "R63319"; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [29 01 00 00 00 00 06 f0 55 aa 52 08 00 15 01 00 00 00 00 02 c1 64 29 01 00 00 00 00 05 bf 81 20 c7 3f 15 01 00 00 00 00 02 6f 0e 15 01 00 00 00 00 02 e5 00 29 01 00 00 00 00 02 d3 07 29 01 00 00 00 00 03 d6 44 44 29 01 00 00 00 00 11 d1 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 29 01 00 00 00 00 05 cc 40 36 87 50 15 01 00 00 00 00 02 6f 03 15 01 00 00 00 00 02 ce 10 15 01 00 00 00 00 02 6f 09 15 01 00 00 00 00 02 ce 10 29 01 00 00 00 00 06 f0 55 aa 52 08 01 29 01 00 00 00 00 03 bc 41 00 29 01 00 00 00 00 03 bd 41 00 29 01 00 00 00 00 06 f0 55 aa 52 08 02 29 01 00 00 00 00 0f b0 03 29 2f 36 41 4c 55 3a 38 37 37 44 50 48 29 01 00 00 00 00 10 b1 41 59 6b 6c 7d 87 98 a4 a5 b3 c3 d4 e5 f6 ff 29 01 00 00 00 00 0f b2 7c 81 82 87 89 90 91 75 6d 65 5b 65 6c 5f 29 01 00 00 00 00 10 b3 50 65 74 75 89 97 ad b6 d4 fc fd fd fd fe ff 29 01 00 00 00 00 0f b4 04 07 08 09 25 2d 41 24 26 2e 2d 3d 4c 49 29 01 00 00 00 00 10 b5 41 55 6b 6c 7d 87 9b ab ac b5 cc da e8 f7 ff 29 01 00 00 00 00 0f b6 03 29 2f 36 41 4c 55 3a 38 37 37 44 50 48 29 01 00 00 00 00 10 b7 41 59 6b 6c 7d 87 98 a4 a5 b3 c3 d4 e5 f6 ff 29 01 00 00 00 00 0f b8 7c 81 82 87 89 90 91 75 6d 65 5b 65 6c 5f 29 01 00 00 00 00 10 b9 50 65 74 75 89 97 ad b6 d4 fc fd fd fd fe ff 29 01 00 00 00 00 0f ba 04 07 08 09 25 2d 41 24 26 2e 2d 3d 4c 49 29 01 00 00 00 00 10 bb 41 55 6b 6c 7d 87 9b ab ac b5 cc da e8 f7 ff 15 01 00 00 00 00 02 35 00 39 01 00 00 00 00 05 ff aa 55 a5 80 39 01 00 00 00 00 03 fc 00 20 15 01 00 00 00 00 02 6f 10 15 01 00 00 00 00 02 fa 02 15 01 00 00 00 00 02 6f 0a 15 01 00 00 00 00 02 f8 00 15 01 00 00 00 00 02 6f 02 15 01 00 00 00 00 02 f7 77 39 01 00 00 01 00 05 ff aa 55 a5 00 05 01 00 00 78 00 02 11 00 05 01 00 00 28 00 02 29 00 39 01 00 00 01 00 02 51 ff 15 01 00 00 01 00 02 53 2c 15 01 00 00 01 00 02 55 83]; | |
| qcom,mdss-dsi-h-pulse-width = <0xe>; | |
| qcom,mdss-dsi-v-pulse-width = <0x1>; | |
| qcom,mdss-dsi-color-order = <0x0>; | |
| phandle = <0x2b>; | |
| qcom,mdss-dsi-lane-map = <0x0>; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-hfp-power-mode; | |
| qcom,mdss-dsi-panel-width = <0x2d0>; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bl-max-level = <0xff>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0xc8 0x1 0x14>; | |
| qcom,mdss-dsi-t-clk-post = <0x20>; | |
| status = "ok"; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| }; | |
| qcom,mdss_fb_wfd { | |
| linux,phandle = <0x2f>; | |
| cell-index = <0x2>; | |
| compatible = "qcom,mdss-fb"; | |
| phandle = <0x2f>; | |
| }; | |
| qcom,mdss_dsi_generic_720p_cmd { | |
| qcom,mdss-dsi-bl-pmic-bank-select = <0x7>; | |
| qcom,mdss-dsi-h-back-porch = <0x1a>; | |
| qcom,mdss-dsi-panel-controller = <0x24>; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-wr-mem-start = <0x2c>; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-v-front-porch = <0x2>; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x2>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-panel-name = "generic 720p cmd mode dsi panel"; | |
| qcom,mdss-dsi-t-clk-pre = <0x2a>; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-te-check-enable; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,cont-splash-enabled; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-bl-pmic-pwm-frequency = <0x64>; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; | |
| qcom,mdss-dsi-wr-mem-continue = <0x3c>; | |
| qcom,mdss-dsi-h-front-porch = <0x1a>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-panel-timings = <0x6e261b00 0x35342028 0x17030400>; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-panel-height = <0x500>; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [05 01 00 00 78 00 01 11 15 01 00 00 0a 00 02 36 00 05 01 00 00 0a 00 01 29 15 01 00 00 0a 00 02 53 24 15 01 00 00 0a 00 02 35 00]; | |
| qcom,mdss-dsi-h-pulse-width = <0x1a>; | |
| qcom,mdss-dsi-v-pulse-width = <0x2>; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-panel-width = <0x300>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bl-max-level = <0xff>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0xc8 0x1 0x14>; | |
| qcom,mdss-dsi-t-clk-post = <0x20>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 0a 00 01 34 05 01 00 00 78 00 01 10 05 01 00 00 78 00 01 28 15 01 00 00 0a 00 02 53 00]; | |
| }; | |
| qcom,dsi_jdi_qhd_video_1 { | |
| qcom,mdss-dsi-h-back-porch = <0x2c>; | |
| qcom,mdss-dsi-panel-controller = <0x23>; | |
| qcom,mdss-dsi-panel-destination = "display_2"; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-v-front-porch = <0x8>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-panel-broadcast-mode; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-panel-name = "Dual 1 video mode dsi panel"; | |
| qcom,mdss-dsi-t-clk-pre = <0x27>; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-h-front-porch = <0x78>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-panel-timings = <0xcd322200 0x60642634 0x29030400>; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-panel-height = <0x5a0>; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [05 01 00 00 0a 00 01 00 15 01 00 00 0a 00 02 3a 77 39 01 00 00 0a 00 05 2a 00 00 04 ff 39 01 00 00 0a 00 05 2b 00 00 05 9f 15 01 00 00 0a 00 02 35 00 39 01 00 00 0a 00 03 44 00 00 15 01 00 00 0a 00 02 51 ff 15 01 00 00 0a 00 02 53 24 15 01 00 00 0a 00 02 55 00 05 01 00 00 78 00 01 11 23 01 00 00 0a 00 02 b0 00 29 01 00 00 0a 00 02 b3 14 29 01 00 00 0a 00 14 ce 7d 40 48 56 67 78 88 98 a7 b5 c3 d1 de e9 f2 fa ff 04 00 23 01 00 00 0a 00 02 b0 03 05 01 00 00 10 00 01 29]; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-panel-width = <0x500>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0xc8 0x1 0x14>; | |
| qcom,mdss-dsi-t-clk-post = <0x3>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| }; | |
| qcom,mdss_dsi_truly_1080p_cmd { | |
| qcom,mdss-dsi-h-back-porch = <0x46>; | |
| qcom,mdss-dsi-panel-controller = <0x24>; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-traffic-mode = <0x2>; | |
| qcom,mdss-dsi-v-front-porch = <0x8>; | |
| qcom,mdss-dsi-te-v-sync-continue-lines = <0x3c>; | |
| qcom,mdss-dsi-cabc-video-command = [15 01 00 00 01 00 02 55 03]; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x6>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-underflow-color = <0x0>; | |
| qcom,mdss-dsi-panel-name = "truly 1080p cmd mode dsi panel"; | |
| qcom,mdss-dsi-t-clk-pre = <0x38>; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-panel-manufacture = "truly"; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-te-check-enable; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,cont-splash-enabled; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-v-sync-rd-ptr-irq-line = <0x2c>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-gamma3 = [23 01 00 00 01 00 02 b0 04 29 01 00 00 01 00 14 c8 01 00 f0 f4 00 d5 00 00 00 00 00 00 00 00 f0 f0 00 fc 00 23 01 00 00 00 00 02 d6 01 23 01 00 00 01 00 02 b0 03]; | |
| qcom,mdss-dsi-h-front-porch = <0x8c>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,mdss-dsi-panel-timings = <0xf93d3400 0x584d363f 0x53030400>; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-cabc-off-command = [15 01 00 00 01 00 02 55 00]; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-version = "R63315"; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-gamma2 = [23 01 00 00 01 00 02 b0 04 29 01 00 00 01 00 14 c8 01 00 f0 f4 00 d5 00 00 e8 e6 02 ba 00 00 00 00 00 00 00 23 01 00 00 00 00 02 d6 01 23 01 00 00 01 00 02 b0 03]; | |
| qcom,mdss-dsi-gamma4 = [23 01 00 00 01 00 02 b0 04 29 01 00 00 01 00 14 c8 01 00 00 00 00 00 00 00 e8 e6 02 ba 00 00 f0 f0 00 fc 00 23 01 00 00 00 00 02 d6 01 23 01 00 00 01 00 02 b0 03]; | |
| qcom,mdss-dsi-cabc-ui-command = [15 01 00 00 01 00 02 55 01]; | |
| qcom,mdss-dsi-on-command = <0x15010000 0x1000235 0x230100 0x10002 0xb0042301 0x100 0x2d60123 0x1000001 0x2b004 0x29010000 0x10007b3 0x4000000 0x2901 0x100 0x3b63ac3 0x29010000 0x10007b8 0x7901e10 0x1e322901 0x100 0x7b90782 0x3c103c87 0x29010000 0x10007ba 0x7782410 0x64442901 0x100 0x2c00029 0x1000001 0x23c184 0x6010ebff 0x6fceffff 0x17125873 0xae3120c6 0xffff1ff3 0xff5f1010 0x10100062 0x1222200 0x1290100 0x10008 0xc231f780 0x8080000 0x29010000 0x10017c4 0x70000000 0x40000 0xc0600 0x0 0x4000000 0xc062901 0x100 0x29c67808 0x67086700 0x0 0x0 0x16 0x18087808 0x67086700 0x0 0x0 0x16 0x18082901 0x100 0xacb31fc 0x3f8c0000 0xc029 0x1000001 0x2cc0b 0x29010000 0x1000bd0 0x1181bb1e 0x1e4c1919 0xc002901 0x100 0x1ad31b33 0xbbbbb333 0x33330001 0xa0d8a0 0xd4e4e33 0x3e227207 0x3dbf1129 0x1000001 0x8d506 0x148 0x1322901 0x100 0x3dd3193 0x29010000 0x1001fc7 0x1131b24 0x303d4754 0x383f4b59 0x676f7701 0x131b2430 0x3d475438 0x3f4b5967 0x6f772901 0x100 0x14c80105 0x4fffd91 0x5ff 0xfcba0000 0x30002fc 0x290100 0x10021 0xca0180dc 0xf0dcf088 0xf0083f14 0x8a0a4a37 0xa055f801 0x1010101 0x100c010 0x103f3f3f 0x3f290100 0x10018 0xce7d3d42 0x49556271 0x8294a8b9 0xcbdbe9f5 0xfcff0400 0x4044400 0x15010000 0x236 0x390100 0x10003 0x44000039 0x1000001 0x251ff 0x15010000 0x1000255 0x3150100 0x10002 0x53240501 0x7800 0x2110005 0x1000078 0x22900>; | |
| qcom,mdss-dsi-h-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-pulse-width = <0x2>; | |
| qcom,mdss-dsi-color-order = <0x0>; | |
| qcom,mdss-dsi-lane-map = <0x0>; | |
| qcom,mdss-dsi-gamma1 = [23 01 00 00 01 00 02 b0 04 29 01 00 00 01 00 14 c8 01 0a fd 03 01 e8 00 00 03 fc f5 a1 00 00 01 fd 06 fc 00 23 01 00 00 00 00 02 d6 01 23 01 00 00 01 00 02 b0 03]; | |
| qcom,mdss-dsi-mdp-trigger = <0x4>; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-cabc-still-image-command = [15 01 00 00 01 00 02 55 02]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bl-max-level = <0xff>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0xc8 0x1 0x14>; | |
| qcom,mdss-dsi-t-clk-post = <0x1e>; | |
| status = "ok"; | |
| qcom,mdss-dsi-dma-trigger = <0x4>; | |
| qcom,mdss-dsi-off-command = <0x29010000 0x100008d5 0x6000000 0x48004829 0x1000010 0x8d506 0x48 0x480501 0x3200 0x2280005 0x1000078 0x21000>; | |
| }; | |
| qcom,mdss_dsi_jdi_1080p_video { | |
| qcom,mdss-dsi-h-back-porch = <0x46>; | |
| qcom,mdss-dsi-panel-controller = <0x24>; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-v-front-porch = <0x8>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x6>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-panel-name = "jdi 1080p video mode dsi panel"; | |
| qcom,mdss-dsi-t-clk-pre = <0x38>; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-panel-manufacture = "JDI"; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,cont-splash-enabled; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-h-front-porch = <0x8c>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x1>; | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,mdss-dsi-panel-timings = <0xf93d3400 0x584d363f 0x53030400>; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-version = "R63417"; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = <0x39010000 0x100052a 0x437 0x39010000 0x100052b 0x77f 0x5010000 0x78000211 0x290100 0x10002 0xb0042901 0x100 0x2b31429 0x1000001 0x2d601 0x29010000 0x10002b0 0x3150100 0xa0002 0x36001501 0x100 0x23a7715 0x1000001 0x25500 0x15010000 0x1000253 0x150100 0x10002 0x35003901 0x100 0x251ff05 0x1000001 0x22900>; | |
| qcom,mdss-dsi-h-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-pulse-width = <0x2>; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bl-max-level = <0xff>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0xc8 0x1 0x14>; | |
| qcom,mdss-dsi-t-clk-post = <0x1e>; | |
| status = "ok"; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| }; | |
| qcom,mdss_dsi_sharp_qhd_video { | |
| qcom,mdss-dsi-h-back-porch = <0x50>; | |
| qcom,mdss-dsi-panel-controller = <0x24>; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_pulse"; | |
| qcom,mdss-dsi-v-front-porch = <0x3>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0xf>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-panel-name = "sharp QHD LS043T1LE01 video mode dsi panel"; | |
| qcom,mdss-dsi-t-clk-pre = <0x1c>; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-h-front-porch = <0x30>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x1>; | |
| qcom,mdss-dsi-panel-timings = <0x461d2000 0x393a2121 0x32030400>; | |
| qcom,mdss-dsi-panel-height = <0x3c0>; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [05 01 00 00 32 00 02 01 00 05 01 00 00 0a 00 02 11 00 15 01 00 00 0a 00 02 53 2c 15 01 00 00 0a 00 02 51 ff 05 01 00 00 0a 00 02 29 00 15 01 00 00 0a 00 02 ae 03 15 01 00 00 0a 00 02 3a 77]; | |
| qcom,mdss-dsi-h-pulse-width = <0x20>; | |
| qcom,mdss-dsi-v-pulse-width = <0xa>; | |
| qcom,mdss-dsi-color-order = "rgb_swap_bgr"; | |
| qcom,mdss-dsi-mdp-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-panel-width = <0x21c>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0xc8 0x1 0x14>; | |
| qcom,mdss-dsi-t-clk-post = <0x4>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 0a 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| }; | |
| qcom,mdss_dsi_jdi_qhd_dualmipi0_cmd { | |
| qcom,mdss-dsi-h-back-porch = <0x2c>; | |
| qcom,mdss-dsi-te-v-sync-continues-lines = <0x3c>; | |
| qcom,mdss-dsi-panel-controller = <0x24>; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-v-front-porch = <0x8>; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-panel-broadcast-mode; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-panel-name = "Dual 0 cmd mode dsi panel"; | |
| qcom,mdss-dsi-t-clk-pre = <0x27>; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-te-check-enable; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-v-sync-rd-ptr-irq-line = <0x2c>; | |
| qcom,mdss-dsi-h-front-porch = <0x78>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-panel-timings = <0xcd322200 0x60642634 0x29030400>; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-panel-height = <0x5a0>; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = <0x29010000 0x2b0 0x3050100 0xa0001 0x150100 0xa0002 0x3a773901 0xa00 0x52a0000 0x4ff3901 0xa00 0x52b0000 0x59f1501 0xa00 0x2350039 0x100000a 0x34400 0x150100 0xa0002 0x51ff1501 0xa00 0x2532415 0x100000a 0x25500 0x5010000 0x78000111 0x5010000 0x10000129>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-color-order = "rgb_swap_rgb"; | |
| qcom,mdss-dsi-lane-map = "lane_map_0123"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-panel-width = <0x500>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0xc8 0x0 0xc8 0x1 0x14>; | |
| qcom,mdss-dsi-t-clk-post = <0x3>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| }; | |
| qcom,mdss_fb_primary { | |
| linux,phandle = <0x26>; | |
| cell-index = <0x0>; | |
| qcom,mdss-fb-split-find7s = <0x2d0 0x2d0>; | |
| qcom,memblock-reserve = <0x3200000 0x1e00000>; | |
| qcom,memory-reservation-type = "EBI1"; | |
| compatible = "qcom,mdss-fb"; | |
| phandle = <0x26>; | |
| qcom,memory-reservation-size = <0x2a30000>; | |
| }; | |
| qcom,mdss_dsi_jdi_qhd_dualmipi1_cmd { | |
| qcom,mdss-dsi-h-back-porch = <0x2c>; | |
| qcom,mdss-dsi-te-v-sync-continues-lines = <0x3c>; | |
| qcom,mdss-dsi-panel-controller = <0x23>; | |
| qcom,mdss-dsi-panel-destination = "display_2"; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-v-front-porch = <0x8>; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x4>; | |
| qcom,mdss-dsi-panel-broadcast-mode; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-panel-name = "Dual 1 cmd mode dsi panel"; | |
| qcom,mdss-dsi-t-clk-pre = <0x27>; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-te-check-enable; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-v-sync-rd-ptr-irq-line = <0x2c>; | |
| qcom,mdss-dsi-h-front-porch = <0x78>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-panel-timings = <0xcd322200 0x60642634 0x29030400>; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-panel-height = <0x5a0>; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = <0x29010000 0x2b0 0x3050100 0xa0001 0x150100 0xa0002 0x3a773901 0xa00 0x52a0000 0x4ff3901 0xa00 0x52b0000 0x59f1501 0xa00 0x2350039 0x100000a 0x34400 0x150100 0xa0002 0x51ff1501 0xa00 0x2532415 0x100000a 0x25500 0x5010000 0x78000111 0x5010000 0x10000129>; | |
| qcom,mdss-dsi-h-pulse-width = <0x10>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-color-order = "rgb_swap_rgb"; | |
| qcom,mdss-dsi-lane-map = "lane_map_0123"; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-panel-width = <0x500>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0xc8 0x0 0xc8 0x1 0x14>; | |
| qcom,mdss-dsi-t-clk-post = <0x3>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| }; | |
| qcom,mdss_dsi_truly_1080p_video { | |
| qcom,mdss-dsi-h-back-porch = <0x2d>; | |
| qcom,mdss-dsi-panel-controller = <0x24>; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-traffic-mode = <0x2>; | |
| qcom,mdss-dsi-v-front-porch = <0x8>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x6>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-panel-name = "truly 1080p video mode dsi panel"; | |
| qcom,mdss-dsi-t-clk-pre = <0x38>; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-panel-manufacture = "truly"; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-h-front-porch = <0x5a>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x1>; | |
| compatible = "qcom,mdss-dsi-panel2"; | |
| qcom,mdss-dsi-panel-timings = <0xf93d3400 0x584d363f 0x53030400>; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-version = "R63315"; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [05 01 00 00 78 00 02 11 00 23 01 00 00 01 00 02 b0 04 05 01 00 00 01 00 02 00 00 05 01 00 00 01 00 02 00 00 29 01 00 00 01 00 07 b3 14 00 00 00 00 00 29 01 00 00 01 00 03 b6 3a d3 29 01 00 00 01 00 02 c0 00 29 01 00 00 01 00 23 c1 84 60 10 eb ff 6f ce ff ff 17 12 58 73 ae 31 20 c6 ff ff 1f f3 ff 5f 10 10 10 10 00 62 01 22 22 00 01 29 01 00 00 01 00 08 c2 31 f7 80 08 08 80 00 29 01 00 00 01 00 17 c4 70 00 00 00 00 00 00 00 00 0c 06 00 00 00 00 00 00 00 00 00 0c 06 29 01 00 00 01 00 29 c6 c8 08 67 08 67 00 00 00 00 00 00 00 00 00 00 00 00 16 18 08 c8 08 67 08 67 00 00 00 00 00 00 00 00 00 00 00 00 16 18 08 29 01 00 00 01 00 1f c7 00 11 19 24 2c 3d 46 53 37 42 50 60 66 6a 70 00 11 19 24 2c 3d 46 53 37 42 50 60 66 6a 70 29 01 00 00 01 00 14 c8 00 00 00 00 00 fc 00 00 00 00 00 fc 00 00 00 00 00 fc 00 23 01 00 00 01 00 09 cb 31 fc 3f 8c 00 00 00 00 29 01 00 00 01 00 0b d0 11 81 bb 19 99 4c 19 19 0c 00 29 01 00 00 01 00 1a d3 1b 33 bb bb b3 33 33 33 01 01 00 a0 d8 a0 0d 48 48 44 3b 22 72 07 3d bf 33 29 01 00 00 01 00 08 d5 06 00 00 01 4e 01 4e 29 01 00 00 01 00 08 d5 06 00 00 01 4e 01 4e 23 01 00 00 01 00 02 cc 0b 29 01 00 00 01 00 08 ce 00 01 00 c1 00 00 00 29 01 00 00 01 00 02 d6 01 15 01 00 00 01 00 02 53 24 29 01 00 00 01 00 08 ce 00 01 00 c1 00 00 00 15 01 00 00 20 00 02 53 24 39 01 00 00 01 00 02 51 ff 15 01 00 00 01 00 02 35 00 05 01 00 00 01 00 02 29 00]; | |
| qcom,mdss-dsi-h-pulse-width = <0x8>; | |
| qcom,mdss-dsi-v-pulse-width = <0x2>; | |
| qcom,mdss-dsi-color-order = <0x0>; | |
| qcom,mdss-dsi-lane-map = <0x0>; | |
| qcom,mdss-dsi-mdp-trigger = <0x0>; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bl-max-level = <0xff>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0xc8 0x1 0x14>; | |
| qcom,mdss-dsi-t-clk-post = <0x1e>; | |
| status = "ok"; | |
| qcom,mdss-dsi-dma-trigger = <0x4>; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| }; | |
| qcom,mdss_dsi_jdi_1080p_cmd { | |
| linux,phandle = <0x29>; | |
| qcom,mdss-dsi-h-back-porch = <0x46>; | |
| qcom,mdss-dsi-panel-controller = <0x24>; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-v-front-porch = <0x8>; | |
| qcom,mdss-dsi-te-v-sync-continue-lines = <0x3c>; | |
| qcom,mdss-dsi-cabc-video-command = [15 01 00 00 01 00 02 55 03]; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x6>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-underflow-color = <0x0>; | |
| qcom,mdss-dsi-panel-name = "jdi 1080p cmd mode dsi panel"; | |
| qcom,mdss-dsi-t-clk-pre = <0x38>; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-te-pin-select = <0x1>; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-panel-manufacture = "JDI"; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-te-check-enable; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,cont-splash-enabled; | |
| qcom,mdss-dsi-te-using-te-pin; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-te-dcs-command = <0x1>; | |
| qcom,mdss-dsi-te-v-sync-rd-ptr-irq-line = <0x2c>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-gamma3 = [23 01 00 00 01 00 02 b0 04 29 01 00 00 01 00 14 c8 01 00 f0 f4 00 d5 00 00 00 00 00 00 00 00 f0 f0 00 fc 00 23 01 00 00 00 00 02 d6 01 23 01 00 00 01 00 02 b0 03]; | |
| qcom,mdss-dsi-h-front-porch = <0x8c>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x1>; | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,mdss-dsi-panel-timings = <0xf93d3400 0x584d363f 0x53030400>; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-panel-height = <0x780>; | |
| qcom,mdss-dsi-cabc-off-command = [15 01 00 00 01 00 02 55 00]; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-version = "R63417"; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-gamma2 = [23 01 00 00 01 00 02 b0 04 29 01 00 00 01 00 14 c8 01 00 f0 f4 00 d5 00 00 e8 e6 02 ba 00 00 00 00 00 00 00 23 01 00 00 00 00 02 d6 01 23 01 00 00 01 00 02 b0 03]; | |
| qcom,mdss-dsi-gamma4 = [23 01 00 00 01 00 02 b0 04 29 01 00 00 01 00 14 c8 01 00 00 00 00 00 00 00 e8 e6 02 ba 00 00 f0 f0 00 fc 00 23 01 00 00 00 00 02 d6 01 23 01 00 00 01 00 02 b0 03]; | |
| qcom,mdss-dsi-cabc-ui-command = [15 01 00 00 01 00 02 55 01]; | |
| qcom,mdss-dsi-on-command = [39 01 00 00 01 00 05 2a 00 00 04 37 39 01 00 00 01 00 05 2b 00 00 07 7f 23 01 00 00 01 00 02 b0 04 29 01 00 00 01 00 07 b8 07 90 1e 10 1e 32 29 01 00 00 01 00 07 b9 07 82 3c 10 3c 87 29 01 00 00 01 00 07 ba 07 78 24 10 64 44 29 01 00 00 01 00 1f c7 00 0b 10 19 27 33 3d 4c 32 39 45 57 6a 74 7f 00 0b 10 19 27 33 3d 4c 32 39 45 57 6a 74 7f 29 01 00 00 01 00 14 c8 01 0a fd 03 01 e8 00 00 03 fc f5 a1 00 00 01 fd 06 fc 00 29 01 00 00 01 00 21 ca 01 80 89 90 c0 80 90 90 10 3f 14 89 0a 4a 37 a0 55 f8 0c 0c 20 10 3f 3f 00 e6 06 0c 0c 0c 0c 0c 29 01 00 00 01 00 18 ce 7d 3d 42 49 55 62 71 82 94 a8 b9 cb db e9 f5 fc ff 04 00 04 04 44 00 29 01 00 00 01 00 17 c4 70 00 00 33 33 33 33 33 33 00 03 00 00 00 33 33 33 33 33 33 00 03 29 01 00 00 01 00 07 b8 03 90 1e 10 1e 32 29 01 00 00 01 00 07 b9 03 82 3c 10 3c 87 29 01 00 00 01 00 07 ba 03 78 64 10 64 b4 23 01 00 00 00 00 02 d6 01 23 01 00 00 01 00 02 b0 03 39 01 00 00 01 00 02 51 ff 15 01 00 00 01 00 02 55 03 15 01 00 00 01 00 02 53 24 05 01 00 00 78 00 02 11 00 15 01 00 00 11 00 02 36 00 15 01 00 00 01 00 02 3a 77 39 01 00 00 01 00 03 44 00 00 15 01 00 00 01 00 02 35 00 05 01 00 00 01 00 02 29 00]; | |
| qcom,mdss-dsi-h-pulse-width = <0x4>; | |
| qcom,mdss-dsi-v-pulse-width = <0x2>; | |
| phandle = <0x29>; | |
| qcom,mdss-dsi-gamma1 = [23 01 00 00 01 00 02 b0 04 29 01 00 00 01 00 14 c8 01 0a fd 03 01 e8 00 00 03 fc f5 a1 00 00 01 fd 06 fc 00 23 01 00 00 00 00 02 d6 01 23 01 00 00 01 00 02 b0 03]; | |
| qcom,mdss-dsi-mdp-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-panel-width = <0x438>; | |
| qcom,mdss-dsi-cabc-still-image-command = [15 01 00 00 01 00 02 55 02]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bl-max-level = <0xff>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0xc8 0x1 0x14>; | |
| qcom,mdss-dsi-t-clk-post = <0x1e>; | |
| status = "ok"; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| }; | |
| qcom,dsi_jdi_1440p_video_0 { | |
| qcom,mdss-dsi-h-back-porch = <0x22>; | |
| qcom,mdss-dsi-panel-controller = <0x24>; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-traffic-mode = "burst_mode"; | |
| qcom,mdss-dsi-v-front-porch = <0x4>; | |
| qcom,mdss-dsi-cabc-video-command = [05 01 00 00 10 00 02 29 00 15 01 00 00 10 00 02 55 83]; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x6>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-underflow-color = <0x0>; | |
| qcom,mdss-dsi-panel-name = "jdi 1440p video mode dsi panel1"; | |
| qcom,mdss-dsi-t-clk-pre = <0x3e>; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-panel-framerate = <0x37>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-panel-manufacture = "JDI"; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,cont-splash-enabled; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-gamma3 = <0x29010000 0x6f0 0x55aa5208 0x290100 0x11 0xd1000306 0x90c0f12 0x15181512 0xf0c0906 0x3290100 0x6 0xf055aa52 0x8022901 0x0 0xfb03a3e 0x474e555b 0x61484442 0x3e4e5a55 0x29010000 0x10b1 0x4b5c7375 0x8892a5a8 0xb2bdc9d7 0xe6f7ff29 0x1000000 0xfb28f 0x9194979a 0x9da0847d 0x73697076 0x69290100 0x10 0xb35a6a80 0x82949ba8 0xaab3bdc7 0xd4e3f5ff 0x29010000 0xfb4 0xa1e2b 0x38414933 0x30323145 0x52502901 0x0 0x10b5485a 0x7273878e 0x989aa3ad 0xb7c5d8f1 0xff290100 0xf 0xb63a3e47 0x4e555b61 0x4844423e 0x4e5a5529 0x1000000 0x10b74b 0x5c737588 0x92a5a8b2 0xbdc9d7e6 0xf7ff2901 0x0 0xfb88f91 0x94979a9d 0xa0847d73 0x69707669 0x29010000 0x10b9 0x5a6a8082 0x949ba8aa 0xb3bdc7d4 0xe3f5ff29 0x1000000 0xfba00 0xa1e2b38 0x41493330 0x32314552 0x50290100 0x10 0xbb485a72 0x73878e98 0x9aa3adb7 0xc5d8f1ff>; | |
| qcom,mdss-dsi-h-front-porch = <0x118>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| compatible = "qcom,mdss-dsi-panel"; | |
| qcom,mdss-dsi-panel-timings = <0xe6382600 0x68aa2a3a 0x2c030400>; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-panel-height = <0xa00>; | |
| qcom,mdss-dsi-cabc-off-command = [05 01 00 00 10 00 02 29 00 15 01 00 00 10 00 02 55 80]; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-panel-version = "R63319"; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-gamma2 = <0x29010000 0x6f0 0x55aa5208 0x290100 0x11 0xd1000306 0x90c0f12 0x15181512 0xf0c0906 0x3290100 0x6 0xf055aa52 0x8022901 0x0 0xfb0000a 0x1d2a363f 0x47312e31 0x3044524f 0x29010000 0x10b1 0x485a7173 0x8690a2a5 0xafbbc7d4 0xe4f6ff29 0x1000000 0xfb25d 0x60656a6f 0x73785e59 0x544d5964 0x5c290100 0x10 0xb3516279 0x7b8e96a4 0xa6b0bac5 0xd2e2f5ff 0x29010000 0xfb4 0x3b3f474e 0x555b6149 0x44423e4e 0x59542901 0x0 0x10b54b5c 0x7375888e 0x999aa3ae 0xb9c7daf2 0xff290100 0xf 0xb6000a1d 0x2a363f47 0x312e3130 0x44524f29 0x1000000 0x10b748 0x5a717386 0x90a2a5af 0xbbc7d4e4 0xf6ff2901 0x0 0xfb85d60 0x656a6f73 0x785e5954 0x4d59645c 0x29010000 0x10b9 0x5162797b 0x8e96a4a6 0xb0bac5d2 0xe2f5ff29 0x1000000 0xfba3b 0x3f474e55 0x5b614944 0x423e4e59 0x54290100 0x10 0xbb4b5c73 0x75888e99 0x9aa3aeb9 0xc7daf2ff>; | |
| qcom,mdss-dsi-gamma4 = [29 01 00 00 00 00 06 f0 55 aa 52 08 02 29 01 00 00 00 00 0f b0 00 09 1c 29 36 3f 47 31 2e 31 30 44 52 4f 29 01 00 00 00 00 10 b1 47 5a 71 73 86 90 a3 a6 b0 bb c8 d5 e5 f6 ff 29 01 00 00 00 00 0f b2 7c 7e 82 85 89 8c 90 75 6e 66 5d 67 6e 63 29 01 00 00 00 00 10 b3 57 67 7d 7f 91 98 a6 a8 b1 bb c6 d3 e2 f5 ff 29 01 00 00 00 00 0f b4 00 00 00 00 00 00 00 00 00 00 00 00 00 00 29 01 00 00 00 00 10 b5 4c 5d 74 76 8a 90 9a 9b a4 ae b8 c5 d8 f1 ff 29 01 00 00 00 00 0f b6 00 09 1c 29 36 3f 47 31 2e 31 30 44 52 4f 29 01 00 00 00 00 10 b7 47 5a 71 73 86 90 a3 a6 b0 bb c8 d5 e5 f6 ff 29 01 00 00 00 00 0f b8 7c 7e 82 85 89 8c 90 75 6e 66 5d 67 6e 63 29 01 00 00 00 00 10 b9 57 67 7d 7f 91 98 a6 a8 b1 bb c6 d3 e2 f5 ff 29 01 00 00 00 00 0f ba 44 48 4f 56 5c 62 67 4e 49 47 41 50 5c 56 29 01 00 00 00 00 10 bb 4c 5d 74 76 8a 90 9a 9b a4 ae b8 c5 d8 f1 ff]; | |
| qcom,mdss-dsi-cabc-ui-command = [05 01 00 00 10 00 02 29 00 15 01 00 00 10 00 02 55 81]; | |
| qcom,mdss-dsi-on-command = [29 01 00 00 00 00 06 f0 55 aa 52 08 00 15 01 00 00 00 00 02 c1 64 29 01 00 00 00 00 05 bf 81 20 c7 3f 15 01 00 00 00 00 02 6f 0e 15 01 00 00 00 00 02 e5 00 29 01 00 00 00 00 02 d3 07 29 01 00 00 00 00 03 d6 44 44 29 01 00 00 00 00 11 d1 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f 29 01 00 00 00 00 05 cc 40 36 87 50 15 01 00 00 00 00 02 6f 03 15 01 00 00 00 00 02 ce 10 15 01 00 00 00 00 02 6f 09 15 01 00 00 00 00 02 ce 10 29 01 00 00 00 00 06 f0 55 aa 52 08 01 29 01 00 00 00 00 03 bc 41 00 29 01 00 00 00 00 03 bd 41 00 29 01 00 00 00 00 06 f0 55 aa 52 08 02 29 01 00 00 00 00 0f b0 03 29 2f 36 41 4c 55 3a 38 37 37 44 50 48 29 01 00 00 00 00 10 b1 41 59 6b 6c 7d 87 98 a4 a5 b3 c3 d4 e5 f6 ff 29 01 00 00 00 00 0f b2 7c 81 82 87 89 90 91 75 6d 65 5b 65 6c 5f 29 01 00 00 00 00 10 b3 50 65 74 75 89 97 ad b6 d4 fc fd fd fd fe ff 29 01 00 00 00 00 0f b4 04 07 08 09 25 2d 41 24 26 2e 2d 3d 4c 49 29 01 00 00 00 00 10 b5 41 55 6b 6c 7d 87 9b ab ac b5 cc da e8 f7 ff 29 01 00 00 00 00 0f b6 03 29 2f 36 41 4c 55 3a 38 37 37 44 50 48 29 01 00 00 00 00 10 b7 41 59 6b 6c 7d 87 98 a4 a5 b3 c3 d4 e5 f6 ff 29 01 00 00 00 00 0f b8 7c 81 82 87 89 90 91 75 6d 65 5b 65 6c 5f 29 01 00 00 00 00 10 b9 50 65 74 75 89 97 ad b6 d4 fc fd fd fd fe ff 29 01 00 00 00 00 0f ba 04 07 08 09 25 2d 41 24 26 2e 2d 3d 4c 49 29 01 00 00 00 00 10 bb 41 55 6b 6c 7d 87 9b ab ac b5 cc da e8 f7 ff 15 01 00 00 00 00 02 35 00 39 01 00 00 00 00 05 ff aa 55 a5 80 39 01 00 00 00 00 03 fc 00 20 15 01 00 00 00 00 02 6f 10 15 01 00 00 00 00 02 fa 02 15 01 00 00 00 00 02 6f 0a 15 01 00 00 00 00 02 f8 00 15 01 00 00 00 00 02 6f 02 15 01 00 00 00 00 02 f7 77 39 01 00 00 01 00 05 ff aa 55 a5 00 05 01 00 00 78 00 02 11 00 05 01 00 00 28 00 02 29 00 39 01 00 00 01 00 02 51 ff 15 01 00 00 01 00 02 53 2c 15 01 00 00 01 00 02 55 83]; | |
| qcom,mdss-dsi-h-pulse-width = <0xe>; | |
| qcom,mdss-dsi-v-pulse-width = <0x1>; | |
| qcom,mdss-dsi-color-order = <0x0>; | |
| qcom,mdss-dsi-lane-map = <0x0>; | |
| qcom,mdss-dsi-gamma1 = <0x29010000 0x6f0 0x55aa5208 0x290100 0x11 0xd1000102 0x3040506 0x708090a 0xb0c0d0e 0xf290100 0x6 0xf055aa52 0x8022901 0x0 0xfb00329 0x2f36414c 0x553a3837 0x37445048 0x29010000 0x10b1 0x41596b6c 0x7d8798a4 0xa5b3c3d4 0xe5f6ff29 0x1000000 0xfb27c 0x81828789 0x9091756d 0x655b656c 0x5f290100 0x10 0xb3506574 0x758997ad 0xb6d4fcfd 0xfdfdfeff 0x29010000 0xfb4 0x4070809 0x252d4124 0x262e2d3d 0x4c492901 0x0 0x10b54155 0x6b6c7d87 0x9babacb5 0xccdae8f7 0xff290100 0xf 0xb603292f 0x36414c55 0x3a383737 0x44504829 0x1000000 0x10b741 0x596b6c7d 0x8798a4a5 0xb3c3d4e5 0xf6ff2901 0x0 0xfb87c81 0x82878990 0x91756d65 0x5b656c5f 0x29010000 0x10b9 0x50657475 0x8997adb6 0xd4fcfdfd 0xfdfeff29 0x1000000 0xfba04 0x7080925 0x2d412426 0x2e2d3d4c 0x49290100 0x10 0xbb41556b 0x6c7d879b 0xabacb5cc 0xdae8f7ff>; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-hfp-power-mode; | |
| qcom,mdss-dsi-panel-width = <0x2d0>; | |
| qcom,mdss-dsi-cabc-still-image-command = [05 01 00 00 10 00 02 29 00 15 01 00 00 10 00 02 55 82]; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bl-max-level = <0xff>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0xc8 0x1 0x14>; | |
| qcom,mdss-dsi-t-clk-post = <0x20>; | |
| status = "ok"; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| }; | |
| qcom,mdss_dsi_toshiba_720p_video { | |
| qcom,mdss-dsi-h-back-porch = <0x20>; | |
| qcom,mdss-dsi-panel-controller = <0x24>; | |
| qcom,mdss-dsi-panel-destination = "display_1"; | |
| qcom,mdss-dsi-traffic-mode = "non_burst_sync_event"; | |
| qcom,mdss-dsi-v-front-porch = <0x9>; | |
| qcom,mdss-dsi-panel-type = "dsi_video_mode"; | |
| qcom,mdss-dsi-v-back-porch = <0x3>; | |
| qcom,mdss-dsi-h-left-border = <0x0>; | |
| qcom,mdss-dsi-lane-1-state; | |
| qcom,mdss-dsi-underflow-color = <0xff>; | |
| qcom,mdss-dsi-panel-name = "toshiba 720p video mode dsi panel"; | |
| qcom,mdss-dsi-t-clk-pre = <0x1b>; | |
| qcom,mdss-dsi-bllp-power-mode; | |
| qcom,mdss-dsi-panel-framerate = <0x3c>; | |
| qcom,mdss-dsi-bl-min-level = <0x1>; | |
| qcom,mdss-dsi-lane-0-state; | |
| qcom,mdss-dsi-virtual-channel-id = <0x0>; | |
| qcom,mdss-dsi-v-bottom-border = <0x0>; | |
| qcom,mdss-dsi-h-right-border = <0x0>; | |
| qcom,mdss-dsi-pan-fps-update = "dfps_suspend_resume_mode"; | |
| qcom,mdss-dsi-off-command-state = "dsi_hs_mode"; | |
| qcom,mdss-dsi-v-top-border = <0x0>; | |
| qcom,mdss-dsi-bpp = <0x18>; | |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled"; | |
| qcom,mdss-dsi-h-front-porch = <0x90>; | |
| qcom,mdss-dsi-h-sync-pulse = <0x0>; | |
| qcom,mdss-dsi-panel-timings = <0xb0231b00 0x94931e25 0x15030400>; | |
| qcom,mdss-dsi-lane-2-state; | |
| qcom,mdss-dsi-panel-height = <0x500>; | |
| qcom,mdss-dsi-lane-3-state; | |
| qcom,mdss-dsi-h-sync-skew = <0x0>; | |
| qcom,mdss-dsi-border-color = <0x0>; | |
| qcom,mdss-dsi-on-command = [23 01 00 00 0a 00 02 b0 00 23 01 00 00 0a 00 02 b2 00 23 01 00 00 0a 00 02 b3 0c 23 01 00 00 0a 00 02 b4 02 29 01 00 00 00 00 06 c0 40 02 7f c8 08 29 01 00 00 00 00 10 c1 00 a8 00 00 00 00 00 9d 08 27 00 00 00 00 00 29 01 00 00 00 00 06 c2 00 00 09 00 00 23 01 00 00 0a 00 02 c3 04 29 01 00 00 00 00 04 c4 4d 83 00 29 01 00 00 00 00 0b c6 12 00 08 71 00 00 00 80 00 04 23 01 00 00 0a 00 02 c7 22 29 01 00 00 00 00 05 c8 4c 0c 0c 0c 29 01 00 00 00 00 0e c9 00 40 00 16 32 2e 3a 43 3e 3c 45 79 3f 29 01 00 00 00 00 0e ca 00 46 1a 23 21 1c 25 31 2d 49 5f 7f 3f 29 01 00 00 00 00 0e cb 00 4c 20 3a 42 40 47 4b 42 3e 46 7e 3f 29 01 00 00 00 00 0e cc 00 41 19 21 1d 14 18 1f 1d 25 3f 73 3f 29 01 00 00 00 00 0e cd 23 79 5a 5f 57 4c 51 51 45 3f 4b 7f 3f 29 01 00 00 00 00 0e ce 00 40 14 20 1a 0e 0e 13 08 00 05 46 1c 29 01 00 00 00 00 04 d0 6a 64 01 29 01 00 00 00 00 03 d1 77 d4 23 01 00 00 0a 00 02 d3 33 29 01 00 00 00 00 03 d5 0f 0f 29 01 00 00 00 00 07 d8 34 64 23 25 62 32 29 01 00 00 00 00 0c de 10 7b 11 0a 00 00 00 00 00 00 00 29 01 00 00 00 00 09 fd 04 55 53 00 70 ff 10 73 23 01 00 00 0a 00 02 e2 00 05 01 00 00 78 00 02 11 00 05 01 00 00 32 00 02 29 00]; | |
| qcom,mdss-dsi-h-pulse-width = <0xc>; | |
| qcom,mdss-dsi-v-pulse-width = <0x4>; | |
| qcom,mdss-dsi-mdp-trigger = "none"; | |
| qcom,mdss-dsi-panel-width = <0x2d0>; | |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; | |
| qcom,mdss-dsi-bllp-eof-power-mode; | |
| qcom,mdss-dsi-bl-max-level = <0xfff>; | |
| qcom,mdss-dsi-stream = <0x0>; | |
| qcom,mdss-dsi-reset-sequence = <0x1 0x14 0x0 0xc8 0x1 0x14>; | |
| qcom,mdss-dsi-t-clk-post = <0x4>; | |
| qcom,mdss-dsi-dma-trigger = "trigger_sw"; | |
| qcom,mdss-dsi-pan-enable-dynamic-fps; | |
| qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| }; | |
| qcom,mdss_fb_external { | |
| linux,phandle = <0x2e>; | |
| cell-index = <0x1>; | |
| compatible = "qcom,mdss-fb"; | |
| phandle = <0x2e>; | |
| }; | |
| }; | |
| qcom,smp2p-adsp { | |
| qcom,remote-pid = <0x2>; | |
| reg = <0xf9011008 0x4>; | |
| compatible = "qcom,smp2p"; | |
| interrupts = <0x0 0x9e 0x1>; | |
| qcom,irq-bitmask = <0x400>; | |
| }; | |
| sdhci@f9864900 { | |
| qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3"; | |
| linux,phandle = <0x49>; | |
| reg-names = "hc_mem", "core_mem"; | |
| interrupt-map = <0x0 0x1 0x0 0x7f 0x0 0x1 0x1 0x0 0xe0 0x0 0x2 0x5 0x25 0x8>; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100>; | |
| qcom,cpu-dma-latency-us = <0xc8>; | |
| interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq"; | |
| #address-cells = <0x0>; | |
| interrupt-map-mask = <0xffffffff>; | |
| qcom,msm-bus,vectors-KBps = <0x4f 0x200 0x0 0x0 0x4f 0x200 0x640 0xc80 0x4f 0x200 0x13880 0x27100 0x4f 0x200 0x186a0 0x30d40 0x4f 0x200 0x30d40 0x61a80 0x4f 0x200 0x61a80 0xc3500 0x4f 0x200 0xc3500 0x186a00 0x4f 0x200 0x1f4000 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| reg = <0xf9864900 0x11c 0xf9864000 0x800>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,sdhci-msm"; | |
| qcom,bus-width = <0x4>; | |
| gpios = <0x5 0x28 0x0 0x5 0x27 0x0 0x5 0x26 0x0 0x5 0x25 0x0 0x5 0x24 0x0 0x5 0x23 0x0>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-parent = <0x49>; | |
| phandle = <0x49>; | |
| qcom,msm-bus,name = "sdhc3"; | |
| qcom,msm-bus,num-cases = <0x8>; | |
| interrupts = <0x0 0x1 0x2>; | |
| status = "disable"; | |
| }; | |
| qcom,wcnss-wlan@fb000000 { | |
| qcom,iris-vdddig-supply = <0x2d>; | |
| qcom,iris-vddxo-supply = <0x42>; | |
| reg-names = "wcnss_mmio", "wcnss_fiq"; | |
| interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq"; | |
| qcom,pronto-vddcx-supply = <0x63>; | |
| reg = <0xfb000000 0x280000 0xf9011008 0x4>; | |
| qcom,iris-vddrfa-supply = <0x6c>; | |
| compatible = "qcom,wcnss_wlan"; | |
| qcom,pronto-vddmx-supply = <0x67>; | |
| qcom,has-pronto-hw; | |
| qcom,pronto-vddpx-supply = <0x2d>; | |
| qcom,has-48mhz-xo; | |
| gpios = <0x5 0x24 0x0 0x5 0x25 0x0 0x5 0x26 0x0 0x5 0x27 0x0 0x5 0x28 0x0>; | |
| qcom,iris-vddpa-supply = <0x6d>; | |
| interrupts = <0x0 0x91 0x0 0x0 0x92 0x0>; | |
| }; | |
| qcom,iommu-domains { | |
| compatible = "qcom,iommu-domains"; | |
| qcom,iommu-domain2 { | |
| linux,phandle = <0x3e>; | |
| phandle = <0x3e>; | |
| label = "venus_sec_bitstream"; | |
| qcom,secure-domain; | |
| qcom,virtual-addr-pool = <0x4b000000 0x12c00000>; | |
| qcom,iommu-contexts = <0x72>; | |
| }; | |
| qcom,iommu-domain4 { | |
| linux,phandle = <0x40>; | |
| phandle = <0x40>; | |
| label = "venus_sec_non_pixel"; | |
| qcom,secure-domain; | |
| qcom,virtual-addr-pool = <0x1000000 0x24800000>; | |
| qcom,iommu-contexts = <0x74>; | |
| }; | |
| qcom,iommu-domain3 { | |
| linux,phandle = <0x3f>; | |
| phandle = <0x3f>; | |
| label = "venus_sec_pixel"; | |
| qcom,secure-domain; | |
| qcom,virtual-addr-pool = <0x25800000 0x25800000>; | |
| qcom,iommu-contexts = <0x73>; | |
| }; | |
| qcom,iommu-domain1 { | |
| linux,phandle = <0x3d>; | |
| phandle = <0x3d>; | |
| label = "venus_ns"; | |
| qcom,virtual-addr-pool = <0x5dc00000 0x7f000000 0xdcc00000 0x1000000>; | |
| qcom,iommu-contexts = <0x71>; | |
| }; | |
| }; | |
| audio_etm0 { | |
| coresight-child-list = <0x18>; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x0>; | |
| compatible = "qcom,coresight-audio-etm"; | |
| coresight-child-ports = <0x2>; | |
| coresight-id = <0xe>; | |
| coresight-name = "coresight-audio-etm0"; | |
| }; | |
| msm-ocmem-vnoc@6144 { | |
| qcom,ntieredslaves = <0x0>; | |
| qcom,hw-sel = "NoC"; | |
| reg = <0x6144 0x2>; | |
| qcom,virt; | |
| compatible = "msm-bus-fabric"; | |
| qcom,rpm-en; | |
| cell-id = <0x1800>; | |
| label = "msm-ocmem-vnoc"; | |
| fab-onoc { | |
| qcom,mas-hw-id = <0x38>; | |
| qcom,slv-hw-id = <0x4f>; | |
| qcom,ws = <0x2710>; | |
| qcom,gateway; | |
| cell-id = <0xc00>; | |
| label = "fab-onoc"; | |
| qcom,buswidth = <0x10>; | |
| }; | |
| slv-ocmem { | |
| qcom,slaveclk-dual = "ocmem_clk"; | |
| qcom,slaveclk-active = "ocmem_a_clk"; | |
| qcom,slv-hw-id = <0x12>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x25c>; | |
| label = "slv-ocmem"; | |
| qcom,buswidth = <0x10>; | |
| qcom,slavep = <0x0 0x1>; | |
| }; | |
| mas-v-ocmem-gfx3d { | |
| qcom,mas-hw-id = <0x37>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x59>; | |
| label = "mas-v-ocmem-gfx3d"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| fab-snoc { | |
| qcom,mas-hw-id = <0x39>; | |
| qcom,slv-hw-id = <0x50>; | |
| qcom,ws = <0x2710>; | |
| qcom,gateway; | |
| cell-id = <0x400>; | |
| label = "fab-snoc"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_4_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_4_out"; | |
| gpios = <0x37 0x0 0x0>; | |
| }; | |
| qcom,msm-dai-q6-hdmi { | |
| qcom,msm-dai-q6-dev-id = <0x8>; | |
| compatible = "qcom,msm-dai-q6-hdmi"; | |
| }; | |
| rmtfs_sharedmem { | |
| reg-names = "rmtfs"; | |
| reg = <0xfd80000 0x180000>; | |
| compatible = "qcom,sharedmem-uio"; | |
| }; | |
| funnel@fc31b000 { | |
| linux,phandle = <0x15>; | |
| coresight-child-list = <0x14>; | |
| reg-names = "funnel-base"; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x2>; | |
| reg = <0xfc31b000 0x1000>; | |
| compatible = "arm,coresight-funnel"; | |
| coresight-child-ports = <0x0>; | |
| phandle = <0x15>; | |
| coresight-id = <0x4>; | |
| coresight-name = "coresight-funnel-merg"; | |
| }; | |
| qcom,smp2pgpio-smp2p-1-out { | |
| linux,phandle = <0x33>; | |
| qcom,remote-pid = <0x1>; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x33>; | |
| }; | |
| jtagfuse@fc4be024 { | |
| reg-names = "fuse-base"; | |
| reg = <0xfc4be024 0x8>; | |
| compatible = "qcom,jtag-fuse"; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-4-out { | |
| linux,phandle = <0x6b>; | |
| qcom,remote-pid = <0x4>; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "master-kernel"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x6b>; | |
| }; | |
| qcom,sdcc@f98e4000 { | |
| qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3"; | |
| linux,phandle = <0x47>; | |
| cell-index = <0x4>; | |
| reg-names = "core_mem", "dml_mem", "bam_mem"; | |
| interrupt-map = <0x0 0x1 0x0 0x81 0x0 0x1 0x1 0x0 0xe2 0x0 0x2 0x5 0x5f 0x8>; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100>; | |
| interrupt-names = "core_irq", "bam_irq", "sdiowakeup_irq"; | |
| #address-cells = <0x0>; | |
| interrupt-map-mask = <0xffffffff>; | |
| qcom,sup-voltages = <0x708 0x708>; | |
| qcom,msm-bus,vectors-KBps = <0x50 0x200 0x0 0x0 0x50 0x200 0x640 0xc80 0x50 0x200 0x13880 0x27100 0x50 0x200 0x186a0 0x30d40 0x50 0x200 0x30d40 0x61a80 0x50 0x200 0x61a80 0xc3500 0x50 0x200 0xc3500 0x186a00 0x50 0x200 0x1f4000 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| reg = <0xf98e4000 0x800 0xf98e4800 0x100 0xf98c4000 0x7000>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-sdcc"; | |
| qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50"; | |
| qcom,bus-width = <0x4>; | |
| gpios = <0x5 0x5d 0x0 0x5 0x5b 0x0 0x5 0x60 0x0 0x5 0x5f 0x0 0x5 0x5e 0x0 0x5 0x5c 0x0>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-parent = <0x47>; | |
| phandle = <0x47>; | |
| qcom,msm-bus,name = "sdcc4"; | |
| qcom,msm-bus,num-cases = <0x8>; | |
| interrupts = <0x0 0x1 0x2>; | |
| status = "disable"; | |
| }; | |
| qcom,mdss_dsi@fd922e00 { | |
| linux,phandle = <0x23>; | |
| cell-index = <0x1>; | |
| qcom,dsi-pref-find7s-jdi-pan = <0x2b>; | |
| qcom,platform-lane-config = [00 00 00 00 00 00 00 01 97 00 00 00 00 05 00 00 01 97 00 00 00 00 0a 00 00 01 97 00 00 00 00 0f 00 00 01 97 00 c0 00 00 00 00 00 01 bb]; | |
| vdd-supply = <0x2a>; | |
| qcom,platform-regulator-settings = [07 09 03 00 20 00 01]; | |
| qcom,platform-strength-ctrl = [ff 06]; | |
| reg = <0xfd922e00 0x600>; | |
| compatible = "qcom,mdss-dsi-ctrl"; | |
| vddio-supply = <0x2>; | |
| qcom,mdss-mdp = <0x27>; | |
| phandle = <0x23>; | |
| label = "MDSS DSI CTRL->1"; | |
| qcom,platform-bist-ctrl = [00 00 b1 ff 00 00]; | |
| vdda-supply = <0x25>; | |
| qcom,mdss-fb-map = <0x26>; | |
| qcom,platform-supply-entry1 { | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-name = "vdd"; | |
| qcom,supply-post-on-sleep = <0x14>; | |
| qcom,supply-pre-off-sleep = <0x0>; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-min-voltage = <0x2dc6c0>; | |
| qcom,supply-pre-on-sleep = <0x0>; | |
| qcom,supply-max-voltage = <0x2dc6c0>; | |
| }; | |
| qcom,platform-supply-entry3 { | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-name = "vdda"; | |
| qcom,supply-post-on-sleep = <0x0>; | |
| qcom,supply-pre-off-sleep = <0x0>; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-min-voltage = <0x124f80>; | |
| qcom,supply-pre-on-sleep = <0x0>; | |
| qcom,supply-max-voltage = <0x124f80>; | |
| }; | |
| qcom,platform-supply-entry2 { | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-name = "vddio"; | |
| qcom,supply-post-on-sleep = <0x14>; | |
| qcom,supply-pre-off-sleep = <0x0>; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-min-voltage = <0x1b7740>; | |
| qcom,supply-pre-on-sleep = <0x0>; | |
| qcom,supply-max-voltage = <0x1b7740>; | |
| }; | |
| }; | |
| qcom,mpm@fc4281d0 { | |
| qcom,ipc-bit-offset = <0x1>; | |
| reg-names = "vmpm", "ipc"; | |
| qcom,gic-map = <0x2 0xd8 0x2f 0xa5 0x32 0xac 0x35 0x68 0x3e 0xde 0xff 0x12 0xff 0x13 0xff 0x19 0xff 0x21 0xff 0x22 0xff 0x23 0xff 0x28 0xff 0x38 0xff 0x39 0xff 0x3a 0xff 0x3b 0xff 0x3c 0xff 0x3d 0xff 0x46 0xff 0x4a 0xff 0x4b 0xff 0x4d 0xff 0x4e 0xff 0x4f 0xff 0x5e 0xff 0x61 0xff 0x63 0xff 0x66 0xff 0x69 0xff 0x6d 0xff 0x7e 0xff 0x8c 0xff 0x92 0xff 0x9b 0xff 0x9d 0xff 0x9f 0xff 0xa3 0xff 0xaa 0xff 0xad 0xff 0xae 0xff 0xaf 0xff 0xb0 0xff 0xb1 0xff 0xb2 0xff 0xb3 0xff 0xb5 0xff 0xbc 0xff 0xbd 0xff 0xbe 0xff 0xbf 0xff 0xc0 0xff 0xc1 0xff 0xc2 0xff 0xc3 0xff 0xc4 0xff 0xc5 0xff 0xc6 0xff 0xc8 0xff 0xc9 0xff 0xca 0xff 0xcb 0xff 0xcc 0xff 0xcd 0xff 0xce 0xff 0xcf 0xff 0xd3 0xff 0xf0 0xff 0xfd 0xff 0x100 0xff 0x10c 0xff 0x10e 0xff 0x10f>; | |
| qcom,gpio-map = <0x3 0x66 0x4 0x1 0x5 0x5 0x6 0x9 0x7 0x12 0x8 0x14 0x9 0x18 0xa 0x1b 0xb 0x1c 0xc 0x22 0xd 0x23 0xe 0x25 0xf 0x2a 0x10 0x2c 0x11 0x2e 0x12 0x32 0x13 0x36 0x14 0x3b 0x15 0x3d 0x16 0x3e 0x17 0x40 0x18 0x41 0x19 0x42 0x1a 0x43 0x1b 0x44 0x1c 0x47 0x1d 0x48 0x1e 0x49 0x1f 0x4a 0x20 0x4b 0x21 0x4d 0x22 0x4f 0x23 0x50 0x24 0x52 0x25 0x56 0x26 0x5c 0x27 0x5d 0x28 0x5f 0x29 0x90>; | |
| reg = <0xfc4281d0 0x1000 0xf9011008 0x4>; | |
| compatible = "qcom,mpm-v2"; | |
| qcom,gic-parent = <0x1>; | |
| qcom,gpio-parent = <0x5>; | |
| interrupts = <0x0 0xab 0x1>; | |
| }; | |
| qcom,cpubw { | |
| qcom,cpu-mem-ports = <0x1 0x200 0x2 0x200>; | |
| compatible = "qcom,cpubw"; | |
| qcom,bw-tbl = <0x17d 0x258 0x320 0x4b0 0x640 0x998 0xe60 0x1330 0x1900 0x1d18>; | |
| }; | |
| qcom,bam_dmux@fc834000 { | |
| qcom,rx-ring-size = <0x40>; | |
| reg = <0xfc834000 0x7000>; | |
| compatible = "qcom,bam_dmux"; | |
| interrupts = <0x0 0x1d 0x1>; | |
| }; | |
| qcom,smp2pgpio_client_rdbg_2_in { | |
| compatible = "qcom,smp2pgpio_client_rdbg_2_in"; | |
| gpios = <0x38 0x0 0x0>; | |
| }; | |
| qcom,pm-8x60@fe805664 { | |
| #size-cells = <0x1>; | |
| ranges; | |
| qcom,lpm-levels = <0x75>; | |
| qcom,cpus-as-clocks; | |
| #address-cells = <0x1>; | |
| qcom,pc-mode = "tz_l2_int"; | |
| reg = <0xfe805664 0x40>; | |
| compatible = "qcom,pm-8x60"; | |
| qcom,pm-snoc-client { | |
| qcom,msm-bus,vectors-KBps = <0x36 0x249 0x0 0x0 0x36 0x249 0x0 0xc3500>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,pm-snoc-client"; | |
| qcom,msm-bus,active-only; | |
| qcom,msm-bus,name = "ocimem_snoc"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| }; | |
| }; | |
| etm@fc33c000 { | |
| coresight-child-list = <0x17>; | |
| reg-names = "etm-base"; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc33c000 0x1000>; | |
| compatible = "arm,coresight-etm"; | |
| coresight-child-ports = <0x0>; | |
| coresight-id = <0xa>; | |
| qcom,pc-save; | |
| coresight-name = "coresight-etm0"; | |
| qcom,round-robin; | |
| }; | |
| qcom,jpeg@fda20000 { | |
| cell-index = <0x1>; | |
| reg-names = "jpeg"; | |
| vdd-supply = <0x4>; | |
| interrupt-names = "jpeg"; | |
| reg = <0xfda20000 0x400>; | |
| compatible = "qcom,jpeg"; | |
| interrupts = <0x0 0x3c 0x0>; | |
| }; | |
| qcom,gdsc@fd8c4024 { | |
| linux,phandle = <0x1e>; | |
| parent-supply = <0x19>; | |
| reg = <0xfd8c4024 0x4>; | |
| compatible = "qcom,gdsc"; | |
| qcom,clock-names = "core_clk"; | |
| phandle = <0x1e>; | |
| regulator-name = "gdsc_oxili_gx"; | |
| status = "ok"; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_2_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_2_out"; | |
| gpios = <0x35 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-smp2p-2-out { | |
| linux,phandle = <0x35>; | |
| qcom,remote-pid = <0x2>; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x35>; | |
| }; | |
| spi_eth_phy_vreg { | |
| linux,phandle = <0x7a>; | |
| gpio = <0x76 0x5 0x0>; | |
| compatible = "regulator-fixed"; | |
| phandle = <0x7a>; | |
| regulator-name = "ethernet_phy"; | |
| enable-active-high; | |
| }; | |
| qcom,msm-dai-q6 { | |
| compatible = "qcom,msm-dai-q6"; | |
| qcom,msm-dai-q6-incall-music-2-rx { | |
| qcom,msm-dai-q6-dev-id = <0x8002>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-afe-proxy-rx { | |
| qcom,msm-dai-q6-dev-id = <0xf1>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-sb-2-tx { | |
| qcom,msm-dai-q6-dev-id = <0x4005>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-sb-0-rx { | |
| qcom,msm-dai-q6-dev-id = <0x4000>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-sb-2-rx { | |
| qcom,msm-dai-q6-dev-id = <0x4004>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-sb-5-tx { | |
| qcom,msm-dai-q6-dev-id = <0x400b>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-int-fm-tx { | |
| qcom,msm-dai-q6-dev-id = <0x3005>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-be-afe-pcm-tx { | |
| qcom,msm-dai-q6-dev-id = <0xe1>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-bt-sco-tx { | |
| qcom,msm-dai-q6-dev-id = <0x3001>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-sb-4-rx { | |
| qcom,msm-dai-q6-dev-id = <0x4008>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-be-afe-pcm-rx { | |
| qcom,msm-dai-q6-dev-id = <0xe0>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-sb-3-rx { | |
| qcom,msm-dai-q6-dev-id = <0x4006>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-incall-record-tx { | |
| qcom,msm-dai-q6-dev-id = <0x8004>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-incall-music-rx { | |
| qcom,msm-dai-q6-dev-id = <0x8005>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-sb-3-tx { | |
| qcom,msm-dai-q6-dev-id = <0x4007>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-sb-1-tx { | |
| qcom,msm-dai-q6-dev-id = <0x4003>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-sb-0-tx { | |
| qcom,msm-dai-q6-dev-id = <0x4001>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-sb-1-rx { | |
| qcom,msm-dai-q6-dev-id = <0x4002>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-incall-record-rx { | |
| qcom,msm-dai-q6-dev-id = <0x8003>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-int-fm-rx { | |
| qcom,msm-dai-q6-dev-id = <0x3004>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-sb-4-tx { | |
| qcom,msm-dai-q6-dev-id = <0x4009>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-afe-proxy-tx { | |
| qcom,msm-dai-q6-dev-id = <0xf0>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| qcom,msm-dai-q6-bt-sco-rx { | |
| qcom,msm-dai-q6-dev-id = <0x3000>; | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| }; | |
| }; | |
| cti@fc354000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc354000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x24>; | |
| coresight-name = "coresight-cti-audio-cpu0"; | |
| }; | |
| modem_etm0 { | |
| coresight-child-list = <0x18>; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x0>; | |
| compatible = "qcom,coresight-modem-etm"; | |
| coresight-child-ports = <0x1>; | |
| coresight-id = <0xf>; | |
| coresight-name = "coresight-modem-etm0"; | |
| }; | |
| qcom,lpass@fe200000 { | |
| qcom,gpio-force-stop = <0x65 0x0 0x0>; | |
| reg-names = "qdsp6_base", "halt_base", "restart_reg"; | |
| qcom,gpio-err-ready = <0x64 0x1 0x0>; | |
| reg = <0xfe200000 0x100 0xfd485100 0x10 0xfc4016c0 0x4>; | |
| compatible = "qcom,pil-q6v5-lpass"; | |
| vdd_cx-supply = <0x41>; | |
| qcom,gpio-proxy-unvote = <0x64 0x2 0x0>; | |
| interrupts = <0x0 0xa2 0x1>; | |
| qcom,gpio-err-fatal = <0x64 0x0 0x0>; | |
| qcom,firmware-name = "adsp"; | |
| }; | |
| qcom,vfe@fda14000 { | |
| cell-index = <0x1>; | |
| reg-names = "vfe", "vfe_vbif", "tcsr"; | |
| vdd-supply = <0x3>; | |
| interrupt-names = "vfe"; | |
| reg = <0xfda14000 0x1000 0xfda40000 0x200 0xfd4a8000 0x4>; | |
| compatible = "qcom,vfe40"; | |
| interrupts = <0x0 0x3a 0x0>; | |
| }; | |
| stm@fc321000 { | |
| coresight-child-list = <0x16>; | |
| reg-names = "stm-base", "stm-data-base"; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc321000 0x1000 0xfa280000 0x180000>; | |
| compatible = "arm,coresight-stm"; | |
| coresight-child-ports = <0x7>; | |
| coresight-id = <0x9>; | |
| coresight-name = "coresight-stm"; | |
| }; | |
| msm-sys-noc@fc460000 { | |
| coresight-child-list = <0x18>; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x0>; | |
| qcom,qos-freq = <0x12c0>; | |
| qcom,ntieredslaves = <0x0>; | |
| qcom,hw-sel = "NoC"; | |
| reg = <0xfc460000 0x4000>; | |
| compatible = "msm-bus-fabric"; | |
| qcom,fabclk-active = "bus_a_clk"; | |
| qcom,rpm-en; | |
| coresight-child-ports = <0x3>; | |
| cell-id = <0x400>; | |
| label = "msm_sys_noc"; | |
| coresight-id = <0x32>; | |
| qcom,fabclk-dual = "bus_clk"; | |
| coresight-name = "coresight-snoc"; | |
| fab-cnoc { | |
| qcom,mas-hw-id = <0x16>; | |
| qcom,slv-hw-id = <0x19>; | |
| qcom,masterp = <0x4>; | |
| qcom,gateway; | |
| cell-id = <0x1400>; | |
| label = "fab-cnoc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x9>; | |
| }; | |
| slv-ocimem { | |
| qcom,slv-hw-id = <0x1a>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x249>; | |
| label = "slv-ocimem"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xa>; | |
| }; | |
| slv-wcss { | |
| qcom,slv-hw-id = <0x17>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x248>; | |
| label = "slv-wcss"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x6>; | |
| }; | |
| mas-crypto-core1 { | |
| qcom,mode = "Fixed"; | |
| qcom,mas-hw-id = <0x18>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,qport = <0x3>; | |
| qcom,prio0 = <0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x6>; | |
| cell-id = <0x38>; | |
| label = "mas-crypto-core1"; | |
| qcom,prio1 = <0x1>; | |
| }; | |
| mas-ocmem-dma { | |
| qcom,mode = "Fixed"; | |
| qcom,mas-hw-id = <0x1c>; | |
| qcom,qport = <0x7>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0xa>; | |
| cell-id = <0x3a>; | |
| label = "mas-ocmem-dma"; | |
| }; | |
| fab-ovnoc { | |
| qcom,mas-hw-id = <0x35>; | |
| qcom,slv-hw-id = <0x4d>; | |
| qcom,gateway; | |
| cell-id = <0x1800>; | |
| label = "fab-ovnoc"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| mas-lpass-proc { | |
| qcom,mode = "Fixed"; | |
| qcom,mas-hw-id = <0x19>; | |
| qcom,qport = <0x4>; | |
| qcom,prio0 = <0x2>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x7>; | |
| cell-id = <0xb>; | |
| label = "mas-lpass-proc"; | |
| qcom,prio1 = <0x2>; | |
| }; | |
| mas-snoc-cfg { | |
| qcom,mas-hw-id = <0x14>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x2>; | |
| cell-id = <0x36>; | |
| label = "mas-snoc-cfg"; | |
| }; | |
| fab-pnoc { | |
| qcom,mode = "Fixed"; | |
| qcom,mas-hw-id = <0x1d>; | |
| qcom,qport = <0x8>; | |
| qcom,slv-hw-id = <0x1c>; | |
| qcom,prio0 = <0x2>; | |
| qcom,masterp = <0xb>; | |
| qcom,gateway; | |
| cell-id = <0x1000>; | |
| label = "fab-pnoc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,prio1 = <0x2>; | |
| qcom,slavep = <0xc>; | |
| }; | |
| slv-service-snoc { | |
| qcom,slv-hw-id = <0x1d>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x24b>; | |
| label = "slv-service-snoc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xd>; | |
| }; | |
| mas-qdss-bam { | |
| qcom,mode = "Fixed"; | |
| qcom,mas-hw-id = <0x13>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,qport = <0x1>; | |
| qcom,prio0 = <0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x1>; | |
| cell-id = <0x35>; | |
| label = "mas-qdss-bam"; | |
| qcom,prio1 = <0x1>; | |
| }; | |
| slv-qdss-stm { | |
| qcom,slv-hw-id = <0x1e>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x24c>; | |
| label = "slv-qdss-stm"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xe>; | |
| }; | |
| msm-lpass-ahb { | |
| qcom,mode = "Fixed"; | |
| qcom,mas-hw-id = <0x12>; | |
| qcom,qport = <0x0>; | |
| qcom,prio0 = <0x2>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x0>; | |
| cell-id = <0x34>; | |
| label = "mas-lpass-ahb"; | |
| qcom,prio1 = <0x2>; | |
| }; | |
| mas-wcss { | |
| qcom,mas-hw-id = <0x1e>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0xc>; | |
| cell-id = <0x3b>; | |
| label = "mas-wcss"; | |
| }; | |
| mas-mss-nav { | |
| qcom,mas-hw-id = <0x1b>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x9>; | |
| cell-id = <0x39>; | |
| label = "mas-mss-nav"; | |
| }; | |
| mas-mss { | |
| qcom,mas-hw-id = <0x1a>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x8>; | |
| cell-id = <0x26>; | |
| label = "mas-mss"; | |
| }; | |
| mas-qdss-etr { | |
| qcom,mode = "Fixed"; | |
| qcom,mas-hw-id = <0x1f>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,qport = <0xa>; | |
| qcom,prio0 = <0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0xd>; | |
| cell-id = <0x3c>; | |
| label = "mas-qdss-etr"; | |
| qcom,prio1 = <0x1>; | |
| }; | |
| slv-snoc-ocmem { | |
| qcom,slv-hw-id = <0x1b>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x24a>; | |
| label = "slv-snoc-ocmem"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xb>; | |
| }; | |
| slv-usb3 { | |
| qcom,slv-hw-id = <0x16>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x247>; | |
| label = "slv-usb3"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x4>; | |
| }; | |
| slv-ampss { | |
| qcom,slv-hw-id = <0x14>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x208>; | |
| label = "slv-ampss"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x1>; | |
| }; | |
| mas-usb3 { | |
| qcom,mode = "Fixed"; | |
| qcom,mas-hw-id = <0x20>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,qport = <0xb>; | |
| qcom,prio0 = <0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0xe>; | |
| cell-id = <0x3d>; | |
| label = "mas-usb3"; | |
| qcom,iface-clk-node = "msm_usb3"; | |
| qcom,prio1 = <0x1>; | |
| }; | |
| slv-lpass { | |
| qcom,slv-hw-id = <0x15>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x20a>; | |
| label = "slv-lpass"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x2>; | |
| }; | |
| mas-crypto-core0 { | |
| qcom,mode = "Fixed"; | |
| qcom,mas-hw-id = <0x17>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,qport = <0x2>; | |
| qcom,prio0 = <0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x5>; | |
| cell-id = <0x37>; | |
| label = "mas-crypto-core0"; | |
| qcom,prio1 = <0x1>; | |
| }; | |
| fab-bimc { | |
| qcom,mas-hw-id = <0x15>; | |
| qcom,slv-hw-id = <0x18>; | |
| qcom,masterp = <0x3>; | |
| qcom,gateway; | |
| cell-id = <0x0>; | |
| label = "fab-bimc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x7 0x8>; | |
| }; | |
| }; | |
| usb@f9a55000 { | |
| qcom,vdd-voltage-level = <0x1 0x5 0x7>; | |
| HSUSB_VDDCX-supply = <0x41>; | |
| qcom,hsusb-otg-phy-type = <0x2>; | |
| interrupt-names = "core_irq", "async_irq"; | |
| qcom,hsusb-otg-mpm-dpsehv-int = <0x31>; | |
| qcom,msm-bus,vectors-KBps = <0x57 0x200 0x0 0x0 0x57 0x200 0xea60 0xea600>; | |
| qcom,hsusb-otg-phy-init-seq = <0x44 0x80 0x3f 0x81 0x4d 0x82 0x13 0x83 0xffffffff>; | |
| qcom,hsusb-otg-otg-control = <0x2>; | |
| qcom,hsusb-otg-disable-reset; | |
| reg = <0xf9a55000 0x400>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,hsusb-otg"; | |
| qcom,hsusb-otg-mpm-dmsehv-int = <0x3a>; | |
| HSUSB_3p3-supply = <0x43>; | |
| qcom,msm-bus,name = "usb2"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| HSUSB_1p8-supply = <0x42>; | |
| interrupts = <0x0 0x86 0x0 0x0 0x8c 0x0>; | |
| status = "disabled"; | |
| qcom,hsusb-otg-mode = <0x1>; | |
| }; | |
| qcom,spm@f9012000 { | |
| #size-cells = <0x1>; | |
| qcom,saw2-avs-hysteresis = <0x0>; | |
| #address-cells = <0x1>; | |
| qcom,saw2-spm-cmd-pc = <0x1032b0 0x11420701 0xb0124450 0x232500f>; | |
| qcom,saw2-pmic-data0 = <0x2030080>; | |
| qcom,saw2-avs-dly = <0x0>; | |
| qcom,saw2-spm-cmd-gdhs = [00 32 42 03 44 50 02 32 50 0f]; | |
| qcom,saw2-spm-cmd-ret = [1f 00 03 00 0f]; | |
| reg = <0xf9012000 0x1000>; | |
| qcom,saw2-ver-reg = <0xfd0>; | |
| compatible = "qcom,spm-v2"; | |
| qcom,vctl-timeout-us = <0x32>; | |
| qcom,saw2-spm-ctl = <0x1>; | |
| qcom,saw2-pmic-data1 = <0x30000>; | |
| qcom,phase-port = <0x1>; | |
| qcom,pfm-port = <0x2>; | |
| qcom,vctl-port = <0x0>; | |
| qcom,saw2-spm-dly = <0x3c102800>; | |
| qcom,saw2-avs-limit = <0x0>; | |
| qcom,core-id = <0xffff>; | |
| qcom,L2-spm-is-apcs-master; | |
| qcom,saw2-avs-ctl = <0x0>; | |
| qcom,saw2-cfg = <0x14>; | |
| }; | |
| qcom,csid@fda08C00 { | |
| cell-index = <0x3>; | |
| reg-names = "csid"; | |
| qcom,mipi-csi-vdd-supply = <0x2>; | |
| interrupt-names = "csid"; | |
| reg = <0xfda08c00 0x100>; | |
| compatible = "qcom,csid"; | |
| qcom,csi-vdd-voltage = <0x1b7740>; | |
| interrupts = <0x0 0x36 0x0>; | |
| }; | |
| sound { | |
| reg-names = "lpaif_pri_mode_muxsel", "lpaif_sec_mode_muxsel", "lpaif_tert_mode_muxsel", "lpaif_quat_mode_muxsel"; | |
| enable_spk-gpio = <0x5 0x49 0x0>; | |
| qcom,yda145_boots-gpio = <0x5 0x43 0x0>; | |
| qcom,prim-auxpcm-gpio-clk = <0x5 0x41 0x0>; | |
| qcom,audio-routing = "RX_BIAS", "MCLK", "LDO_H", "MCLK", "AIF4 MAD", "MCLK", "AMIC1", "MIC BIAS1 Internal1", "MIC BIAS1 Internal1", "Handset Mic", "AMIC2", "MIC BIAS2 External", "MIC BIAS2 External", "Headset Mic", "AMIC3", "MIC BIAS1 External", "MIC BIAS1 External", "Main Mic", "AMIC4", "MIC BIAS1 External", "MIC BIAS1 External", "Second Mic", "AMIC5", "MIC BIAS1 External", "MIC BIAS1 External", "ANC Mic", "DMIC1", "MIC BIAS1 External", "MIC BIAS1 External", "Digital Mic1", "DMIC2", "MIC BIAS1 External", "MIC BIAS1 External", "Digital Mic2", "DMIC3", "MIC BIAS3 External", "MIC BIAS3 External", "Digital Mic3", "DMIC4", "MIC BIAS3 External", "MIC BIAS3 External", "Digital Mic4", "DMIC5", "MIC BIAS4 External", "MIC BIAS4 External", "Digital Mic5", "DMIC6", "MIC BIAS4 External", "MIC BIAS4 External", "Digital Mic6"; | |
| cdc_spk-supply = <0x4f>; | |
| qcom,prim-auxpcm-gpio-dout = <0x5 0x44 0x0>; | |
| qcom,sec-auxpcm-gpio-sync = <0x5 0x50 0x0>; | |
| qcom,cdc-micbias2-headset-only; | |
| qcom,cdc-mclk-gpios = <0x28 0xf 0x0>; | |
| reg = <0xfe02c000 0x4 0xfe02d000 0x4 0xfe02e000 0x4 0xfe02f000 0x4>; | |
| compatible = "qcom,msm8974-audio-taiko"; | |
| qcom,sec-auxpcm-gpio-clk = <0x5 0x4f 0x0>; | |
| qcom,mbhc-audio-jack-type = "4-pole-jack"; | |
| qcom,prim-auxpcm-gpio-set = "prim-gpio-prim"; | |
| qcom,yda145_ctr-gpio = <0x5 0x4d 0x0>; | |
| qcom,prim-auxpcm-gpio-sync = <0x5 0x42 0x0>; | |
| qcom,hpmic-switch-gpio = <0x5 0x57 0x0>; | |
| qcom,sec-auxpcm-gpio-din = <0x5 0x51 0x0>; | |
| qcom,model = "msm8974-taiko-mtp-snd-card"; | |
| qcom,sec-auxpcm-gpio-dout = <0x5 0x52 0x0>; | |
| qcom,prim-auxpcm-gpio-din = <0x5 0x43 0x0>; | |
| qcom,taiko-mclk-clk-freq = <0x927c00>; | |
| }; | |
| cti@fc30e000 { | |
| reg-names = "cti-base"; | |
| coresight-nr-inports = <0x0>; | |
| reg = <0xfc30e000 0x1000>; | |
| compatible = "arm,coresight-cti"; | |
| coresight-id = <0x19>; | |
| coresight-name = "coresight-cti6"; | |
| }; | |
| timer@f9020000 { | |
| #size-cells = <0x1>; | |
| ranges; | |
| #address-cells = <0x1>; | |
| reg = <0xf9020000 0x1000>; | |
| compatible = "arm,armv7-timer-mem"; | |
| clock-frequency = <0x124f800>; | |
| frame@f9021000 { | |
| reg = <0xf9021000 0x1000 0xf9022000 0x1000>; | |
| frame-number = <0x0>; | |
| interrupts = <0x0 0x8 0x4 0x0 0x7 0x4>; | |
| }; | |
| frame@f9025000 { | |
| reg = <0xf9025000 0x1000>; | |
| frame-number = <0x3>; | |
| interrupts = <0x0 0xb 0x4>; | |
| status = "disabled"; | |
| }; | |
| frame@f9027000 { | |
| reg = <0xf9027000 0x1000>; | |
| frame-number = <0x5>; | |
| interrupts = <0x0 0xd 0x4>; | |
| status = "disabled"; | |
| }; | |
| frame@f9023000 { | |
| reg = <0xf9023000 0x1000>; | |
| frame-number = <0x1>; | |
| interrupts = <0x0 0x9 0x4>; | |
| status = "disabled"; | |
| }; | |
| frame@f9026000 { | |
| reg = <0xf9026000 0x1000>; | |
| frame-number = <0x4>; | |
| interrupts = <0x0 0xc 0x4>; | |
| status = "disabled"; | |
| }; | |
| frame@f9024000 { | |
| reg = <0xf9024000 0x1000>; | |
| frame-number = <0x2>; | |
| interrupts = <0x0 0xa 0x4>; | |
| status = "disabled"; | |
| }; | |
| frame@f9028000 { | |
| reg = <0xf9028000 0x1000>; | |
| frame-number = <0x6>; | |
| interrupts = <0x0 0xe 0x4>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| funnel@fc319000 { | |
| linux,phandle = <0x18>; | |
| coresight-child-list = <0x15>; | |
| reg-names = "funnel-base"; | |
| coresight-outports = <0x0>; | |
| coresight-nr-inports = <0x8>; | |
| reg = <0xfc319000 0x1000>; | |
| compatible = "arm,coresight-funnel"; | |
| coresight-child-ports = <0x0>; | |
| phandle = <0x18>; | |
| coresight-id = <0x5>; | |
| coresight-name = "coresight-funnel-in0"; | |
| }; | |
| qcom,smem@fa00000 { | |
| reg-names = "smem", "irq-reg-base", "aux-mem1"; | |
| reg = <0xfa00000 0x200000 0xf9011000 0x1000 0xfc428000 0x4000>; | |
| compatible = "qcom,smem"; | |
| qcom,smd-modem { | |
| qcom,smd-irq-offset = <0x8>; | |
| qcom,pil-string = "modem"; | |
| compatible = "qcom,smd"; | |
| qcom,smd-irq-bitmask = <0x1000>; | |
| interrupts = <0x0 0x19 0x1>; | |
| qcom,smd-edge = <0x0>; | |
| }; | |
| qcom,smd-wcnss { | |
| qcom,smd-irq-offset = <0x8>; | |
| qcom,pil-string = "wcnss"; | |
| compatible = "qcom,smd"; | |
| qcom,smd-irq-bitmask = <0x20000>; | |
| interrupts = <0x0 0x8e 0x1>; | |
| qcom,smd-edge = <0x6>; | |
| }; | |
| qcom,smsm-adsp { | |
| qcom,smsm-irq-bitmask = <0x200>; | |
| qcom,smsm-edge = <0x1>; | |
| compatible = "qcom,smsm"; | |
| qcom,smsm-irq-offset = <0x8>; | |
| interrupts = <0x0 0x9d 0x1>; | |
| }; | |
| qcom,smd-rpm { | |
| qcom,irq-no-suspend; | |
| qcom,smd-irq-offset = <0x8>; | |
| compatible = "qcom,smd"; | |
| qcom,smd-irq-bitmask = <0x1>; | |
| interrupts = <0x0 0xa8 0x1>; | |
| qcom,smd-edge = <0xf>; | |
| }; | |
| qcom,smsm-wcnss { | |
| qcom,smsm-irq-bitmask = <0x80000>; | |
| qcom,smsm-edge = <0x6>; | |
| compatible = "qcom,smsm"; | |
| qcom,smsm-irq-offset = <0x8>; | |
| interrupts = <0x0 0x90 0x1>; | |
| }; | |
| qcom,smsm-modem { | |
| qcom,smsm-irq-bitmask = <0x2000>; | |
| qcom,smsm-edge = <0x0>; | |
| compatible = "qcom,smsm"; | |
| qcom,smsm-irq-offset = <0x8>; | |
| interrupts = <0x0 0x1a 0x1>; | |
| }; | |
| qcom,smd-adsp { | |
| qcom,smd-irq-offset = <0x8>; | |
| qcom,pil-string = "adsp"; | |
| compatible = "qcom,smd"; | |
| qcom,smd-irq-bitmask = <0x100>; | |
| interrupts = <0x0 0x9c 0x1>; | |
| qcom,smd-edge = <0x1>; | |
| }; | |
| }; | |
| i2c@f9923000 { | |
| #size-cells = <0x0>; | |
| cell-index = <0x1>; | |
| reg-names = "qup_phys_addr"; | |
| interrupt-names = "qup_err_intr"; | |
| #address-cells = <0x1>; | |
| qcom,scl-gpio = <0x5 0x3 0x0>; | |
| reg = <0xf9923000 0x1000>; | |
| compatible = "qcom,i2c-qup"; | |
| qcom,i2c-bus-freq = <0x186a0>; | |
| interrupts = <0x0 0x5f 0x0>; | |
| status = "ok"; | |
| qcom,i2c-src-freq = <0x124f800>; | |
| qcom,master-id = <0x56>; | |
| qcom,sda-gpio = <0x5 0x2 0x0>; | |
| bq27541-battery@55 { | |
| microchip,mcu-en-gpio = <0x28 0x3 0x0>; | |
| reg = <0x55>; | |
| compatible = "ti,bq27541-battery"; | |
| status = "okay"; | |
| }; | |
| pic16f_fastcg@25 { | |
| reg = <0x25>; | |
| compatible = "microchip,pic16f_fastcg"; | |
| status = "okay"; | |
| }; | |
| }; | |
| qcom,smp2pgpio-smp2p-4-in { | |
| linux,phandle = <0x36>; | |
| qcom,remote-pid = <0x4>; | |
| qcom,is-inbound; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x36>; | |
| }; | |
| spi@f9964000 { | |
| #size-cells = <0x0>; | |
| cell-index = <0x8>; | |
| qcom,gpio-miso = <0x5 0x2e 0x0>; | |
| qcom,gpio-clk = <0x5 0x30 0x0>; | |
| reg-names = "spi_physical"; | |
| interrupt-names = "spi8_irq"; | |
| #address-cells = <0x1>; | |
| qcom,gpio-cs0 = <0x5 0x2f 0x0>; | |
| spi-max-frequency = <0x124f800>; | |
| reg = <0xf9964000 0x1000>; | |
| compatible = "qcom,spi-qup-v2"; | |
| qcom,gpio-mosi = <0x5 0x2d 0x0>; | |
| interrupts = <0x0 0x66 0x0>; | |
| qcom,master-id = <0x54>; | |
| p61-nxp-nfc@0 { | |
| p61-nxp-nfc,irq-gpio = <0x5 0x22 0x0>; | |
| #spi-cpha; | |
| spi-cs-high; | |
| spi-max-frequency = <0x3d0900>; | |
| reg = <0x0>; | |
| compatible = "p61,nxp-nfc-n3"; | |
| interrupt-parent = <0x5>; | |
| interrupts = <0x22 0x0>; | |
| #spi-cpol; | |
| }; | |
| }; | |
| spi@f9965000 { | |
| #size-cells = <0x0>; | |
| cell-index = <0x9>; | |
| qcom,gpio-miso = <0x5 0x32 0x0>; | |
| qcom,gpio-clk = <0x5 0x34 0x0>; | |
| reg-names = "spi_physical"; | |
| interrupt-names = "spi9_irq"; | |
| #address-cells = <0x1>; | |
| qcom,gpio-cs0 = <0x5 0x33 0x0>; | |
| spi-max-frequency = <0x124f800>; | |
| reg = <0xf9965000 0x1000>; | |
| compatible = "qcom,spi-qup-v2"; | |
| qcom,gpio-mosi = <0x5 0x31 0x0>; | |
| interrupts = <0x0 0x67 0x0>; | |
| qcom,master-id = <0x54>; | |
| p61-nxp-nfc@0 { | |
| p61-nxp-nfc,irq-gpio = <0x5 0x22 0x0>; | |
| #spi-cpha; | |
| spi-cs-high; | |
| spi-max-frequency = <0x3d0900>; | |
| reg = <0x0>; | |
| compatible = "p61,nxp-nfc"; | |
| interrupt-parent = <0x5>; | |
| interrupts = <0x22 0x0>; | |
| #spi-cpol; | |
| }; | |
| }; | |
| qcom,gdsc@fd8c1040 { | |
| reg = <0xfd8c1040 0x4>; | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_venus_core0"; | |
| status = "disabled"; | |
| }; | |
| qcom,msm-cam@fd8C0000 { | |
| reg-names = "msm-cam"; | |
| reg = <0xfd8c0000 0x10000>; | |
| compatible = "qcom,msm-cam"; | |
| }; | |
| qcom,ssm { | |
| compatible = "qcom,ssm"; | |
| qcom,channel-name = "SSM_RTR"; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-4-in { | |
| linux,phandle = <0x6a>; | |
| qcom,remote-pid = <0x4>; | |
| qcom,is-inbound; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "slave-kernel"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x6a>; | |
| }; | |
| qcom,msm-ocmem-audio { | |
| qcom,msm-bus,vectors-KBps = <0xb 0x25c 0x0 0x0 0xb 0x25c 0x7efa 0x7efa>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| compatible = "qcom,msm-ocmem-audio"; | |
| qcom,msm-bus,name = "audio-ocmem"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| }; | |
| qcom,cpu-sleep-status@f9088008 { | |
| qcom,sleep-status-mask = <0x80000>; | |
| qcom,cpu-alias-addr = <0x10000>; | |
| reg = <0xf9088008 0x100>; | |
| compatible = "qcom,cpu-sleep-status"; | |
| }; | |
| msm-config-noc@fc480000 { | |
| qcom,ntieredslaves = <0x0>; | |
| qcom,hw-sel = "NoC"; | |
| reg = <0xfc480000 0x4000>; | |
| compatible = "msm-bus-fabric"; | |
| qcom,fabclk-active = "bus_a_clk"; | |
| qcom,rpm-en; | |
| cell-id = <0x1400>; | |
| label = "msm_config_noc"; | |
| qcom,fabclk-dual = "bus_clk"; | |
| mas-rpm-inst { | |
| qcom,mas-hw-id = <0x2d>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x0>; | |
| cell-id = <0x48>; | |
| label = "mas-rpm-inst"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| slv-rbcpr-cfg { | |
| qcom,slv-hw-id = <0x40>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x27c>; | |
| label = "slv-rbcpr-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x12>; | |
| }; | |
| slv-cnoc-mnoc-mmss-cfg { | |
| qcom,slv-hw-id = <0x3a>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x277>; | |
| label = "slv-cnoc-mnoc-mmss-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xc>; | |
| }; | |
| slv-snoc-mpu-cfg { | |
| qcom,slv-hw-id = <0x43>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x27e>; | |
| label = "slv-snoc-mpu-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x15>; | |
| }; | |
| slv-snoc-cfg { | |
| qcom,slv-hw-id = <0x46>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x282>; | |
| label = "slv-snoc-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x18>; | |
| }; | |
| slv-ebi1-phy-cfg { | |
| qcom,slv-hw-id = <0x49>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x285>; | |
| label = "slv-ebi1-phy-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x1b>; | |
| }; | |
| slv-mpm { | |
| qcom,slv-hw-id = <0x3e>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x218>; | |
| label = "slv-mpm"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x10>; | |
| }; | |
| slv-rbcpr-qdss-apu-cfg { | |
| qcom,slv-hw-id = <0x41>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x27d>; | |
| label = "slv-rbcpr-qdss-apu-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x13>; | |
| }; | |
| slv-clk-ctl { | |
| qcom,slv-hw-id = <0x2f>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x26c>; | |
| label = "slv-clk-ctl"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x1>; | |
| }; | |
| slv-security { | |
| qcom,slv-hw-id = <0x31>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x26e>; | |
| label = "slv-security"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x3>; | |
| }; | |
| slv-bimc-cfg { | |
| qcom,slv-hw-id = <0x38>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x275>; | |
| label = "slv-bimc-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xa>; | |
| }; | |
| slv-spdm-wrapper { | |
| qcom,slv-hw-id = <0x3c>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x279>; | |
| label = "slv-spdm-wrapper"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xe>; | |
| }; | |
| slv-crypto-0-cfg { | |
| qcom,slv-hw-id = <0x34>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x271>; | |
| label = "slv-crypto-0-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x6>; | |
| }; | |
| slv-cnoc-onoc-cfg { | |
| qcom,slv-hw-id = <0x44>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x27f>; | |
| label = "slv-cnoc-onoc-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x16>; | |
| }; | |
| mas-rpm-data { | |
| qcom,mas-hw-id = <0x2e>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x1>; | |
| cell-id = <0x49>; | |
| label = "mas-rpm-data"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| slv-crypto-1-cfg { | |
| qcom,slv-hw-id = <0x35>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x272>; | |
| label = "slv-crypto-1-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x7>; | |
| }; | |
| slv-dehr-cfg { | |
| qcom,slv-hw-id = <0x3d>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x27a>; | |
| label = "slv-dehr-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xf>; | |
| }; | |
| mas-spdm { | |
| qcom,mas-hw-id = <0x32>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x5>; | |
| cell-id = <0x24>; | |
| label = "mas-spdm"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| slv-rpm { | |
| qcom,slv-hw-id = <0x4a>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x216>; | |
| label = "slv-rpm"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x1c>; | |
| }; | |
| slv-qdss-cfg { | |
| qcom,slv-hw-id = <0x3f>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x27b>; | |
| label = "slv-qdss-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x11>; | |
| }; | |
| slv-boot-rom { | |
| qcom,slv-hw-id = <0x39>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x276>; | |
| label = "slv-boot-rom"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xb>; | |
| }; | |
| slv-cnoc-mss { | |
| qcom,slv-hw-id = <0x30>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x26d>; | |
| label = "slv-cnoc-mss"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x2>; | |
| }; | |
| slv-pmic-arb { | |
| qcom,slv-hw-id = <0x3b>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x278>; | |
| label = "slv-pmic-arb"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0xd>; | |
| }; | |
| slv-phy-apu-cfg { | |
| qcom,slv-hw-id = <0x48>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x284>; | |
| label = "slv-phy-apu-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x1a>; | |
| }; | |
| mas-rpm-sys { | |
| qcom,mas-hw-id = <0x2f>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x2>; | |
| cell-id = <0x4a>; | |
| label = "mas-rpm-sys"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| slv-message-ram { | |
| qcom,slv-hw-id = <0x37>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x274>; | |
| label = "slv-message-ram"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x9>; | |
| }; | |
| slv-imem-cfg { | |
| qcom,slv-hw-id = <0x36>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x273>; | |
| label = "slv-imem-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x8>; | |
| }; | |
| mas-qdss-dsp { | |
| qcom,mas-hw-id = <0x31>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x4>; | |
| cell-id = <0x4c>; | |
| label = "mas-qdss-dap"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| mas-tic { | |
| qcom,mas-hw-id = <0x33>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x6>; | |
| cell-id = <0x4d>; | |
| label = "mas-tic"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| slv-cnoc-mnoc-cfg { | |
| qcom,slv-hw-id = <0x42>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x280>; | |
| label = "slv-cnoc-mnoc-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x14>; | |
| }; | |
| slv-ebi1-dll-cfg { | |
| qcom,slv-hw-id = <0x47>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x283>; | |
| label = "slv-ebi1-dll-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x19>; | |
| }; | |
| fab-snoc { | |
| qcom,mas-hw-id = <0x34>; | |
| qcom,slv-hw-id = <0x4b>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x7>; | |
| qcom,gateway; | |
| cell-id = <0x400>; | |
| label = "fab-snoc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x1d>; | |
| }; | |
| mas-dehr { | |
| qcom,mas-hw-id = <0x30>; | |
| qcom,tier = <0x2>; | |
| qcom,masterp = <0x3>; | |
| cell-id = <0x4b>; | |
| label = "mas-dehr"; | |
| qcom,buswidth = <0x8>; | |
| }; | |
| slv-service-cnoc { | |
| qcom,slv-hw-id = <0x4c>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x286>; | |
| label = "slv-service-cnoc"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x1e>; | |
| }; | |
| slv-tcsr { | |
| qcom,slv-hw-id = <0x32>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x26f>; | |
| label = "slv-tcsr"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x4>; | |
| }; | |
| slv-pnoc-cfg { | |
| qcom,slv-hw-id = <0x45>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x281>; | |
| label = "slv-pnoc-cfg"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x17>; | |
| }; | |
| slv-tlmm { | |
| qcom,slv-hw-id = <0x33>; | |
| qcom,tier = <0x2>; | |
| cell-id = <0x270>; | |
| label = "slv-tlmm"; | |
| qcom,buswidth = <0x8>; | |
| qcom,slavep = <0x5>; | |
| }; | |
| }; | |
| qcom,ocmem@fdd00000 { | |
| #size-cells = <0x1>; | |
| ranges = <0x0 0xfec00000 0x180000>; | |
| reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical"; | |
| qcom,ocmem-num-regions = <0x3>; | |
| interrupt-names = "ocmem_irq", "dm_irq"; | |
| #address-cells = <0x1>; | |
| qcom,resource-type = <0x706d636f>; | |
| reg = <0xfdd00000 0x2000 0xfdd02000 0x2000 0xfe039000 0x400 0xfec00000 0x180000>; | |
| compatible = "qcom,msm-ocmem"; | |
| interrupts = <0x0 0x4c 0x0 0x0 0x4d 0x0>; | |
| qcom,ocmem-num-macros = <0x18>; | |
| partition@0 { | |
| qcom,ocmem-part-min = <0x80000>; | |
| reg = <0x0 0x100000>; | |
| qcom,ocmem-part-name = "graphics"; | |
| }; | |
| partition@100000 { | |
| qcom,ocmem-part-min = <0x55000>; | |
| reg = <0x100000 0x80000>; | |
| qcom,ocmem-part-name = "video"; | |
| }; | |
| partition@80000 { | |
| qcom,ocmem-part-min = <0x80000>; | |
| reg = <0x100000 0x80000>; | |
| qcom,ocmem-part-name = "lp_audio"; | |
| }; | |
| }; | |
| qcom,smp2pgpio-smp2p-4-out { | |
| linux,phandle = <0x37>; | |
| qcom,remote-pid = <0x4>; | |
| #gpio-cells = <0x2>; | |
| gpio-controller; | |
| interrupt-controller; | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x37>; | |
| }; | |
| qcom,gdsc@fd8c1804 { | |
| reg = <0xfd8c1804 0x4>; | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_vcap"; | |
| status = "disabled"; | |
| }; | |
| }; | |
| memory { | |
| #size-cells = <0x1>; | |
| #address-cells = <0x1>; | |
| device_type = "memory"; | |
| reg = <0x0 0x40000000 0x40000000 0x40000000>; | |
| adsp_region { | |
| linux,phandle = <0x1b>; | |
| reg = <0x0 0x3f00000>; | |
| phandle = <0x1b>; | |
| label = "adsp_mem"; | |
| linux,contiguous-region; | |
| }; | |
| secure_region { | |
| linux,phandle = <0x1a>; | |
| reg = <0x0 0xfc00000>; | |
| phandle = <0x1a>; | |
| label = "secure_mem"; | |
| linux,contiguous-region; | |
| }; | |
| qsecom_region { | |
| linux,phandle = <0x1c>; | |
| reg = <0x0 0x1100000>; | |
| phandle = <0x1c>; | |
| label = "qseecom_mem"; | |
| linux,contiguous-region; | |
| }; | |
| }; | |
| qcom,battery-data { | |
| linux,phandle = <0x53>; | |
| qcom,rpull-up-kohm = <0x64>; | |
| phandle = <0x53>; | |
| qcom,vref-batt-therm = <0x1b7740>; | |
| qcom,mtp-3000mah { | |
| qcom,v-cutoff-uv = <0x33e140>; | |
| qcom,batt-id-kohm = <0x12c>; | |
| qcom,max-voltage-uv = <0x426800>; | |
| qcom,chg-term-ua = <0x249f0>; | |
| qcom,rbatt-capacitive-mohm = <0x32>; | |
| qcom,default-rbatt-mohm = <0x71>; | |
| qcom,fcc-mah = <0xbb8>; | |
| qcom,pc-temp-ocv-lut { | |
| qcom,lut-data = <0x105f 0x105c 0x1057 0x1053 0x104e 0x100a 0x101d 0x101f 0x101d 0x1019 0xfce 0xff2 0xff2 0xff0 0xfed 0xf7e 0xfc6 0xfcc 0xfc8 0xfc3 0xf52 0xf8f 0xf9a 0xf9e 0xf9d 0xf2e 0xf6d 0xf7e 0xf7e 0xf7a 0xf10 0xf44 0xf61 0xf5f 0xf5b 0xef8 0xf23 0xf44 0xf43 0xf3f 0xee6 0xf07 0xf22 0xf26 0xf23 0xed7 0xef2 0xef7 0xef8 0xef6 0xecb 0xedf 0xee3 0xee3 0xee1 0xebf 0xed1 0xed3 0xed3 0xed1 0xeb4 0xec6 0xec7 0xec7 0xec5 0xea8 0xebf 0xebd 0xebc 0xeb9 0xe9b 0xeb8 0xeb6 0xeb2 0xeab 0xe8d 0xeac 0xeac 0xea3 0xe95 0xe7e 0xe94 0xe96 0xe8d 0xe7f 0xe70 0xe7b 0xe79 0xe71 0xe64 0xe61 0xe6f 0xe66 0xe5e 0xe53 0xe53 0xe6a 0xe64 0xe5c 0xe51 0xe4a 0xe68 0xe63 0xe5b 0xe50 0xe3e 0xe65 0xe61 0xe5a 0xe4f 0xe2f 0xe62 0xe5f 0xe59 0xe4c 0xe1c 0xe5d 0xe5c 0xe55 0xe47 0xe05 0xe53 0xe52 0xe4c 0xe37 0xde8 0xe3b 0xe34 0xe2e 0xe0f 0xdc3 0xe10 0xe02 0xdfd 0xdda 0xd92 0xdd1 0xdbe 0xdbc 0xd95 0xd42 0xd76 0xd61 0xd63 0xd33 0xcb9 0xcea 0xcc9 0xcd3 0xc8d 0xbb8 0xbb8 0xbb8 0xbb8 0xbb8>; | |
| qcom,lut-col-legend = <0xffffffec 0x0 0x19 0x28 0x3c>; | |
| qcom,lut-row-legend = <0x64 0x5f 0x5a 0x55 0x50 0x4b 0x46 0x41 0x3c 0x37 0x32 0x2d 0x28 0x23 0x1e 0x19 0x14 0x10 0xd 0xb 0xa 0x9 0x8 0x7 0x6 0x5 0x4 0x3 0x2 0x1 0x0>; | |
| }; | |
| qcom,fcc-temp-lut { | |
| qcom,lut-data = <0xbd6 0xbd9 0xbdd 0xbdb 0xbd7>; | |
| qcom,lut-col-legend = <0xffffffec 0x0 0x19 0x28 0x3c>; | |
| }; | |
| qcom,rbatt-sf-lut { | |
| qcom,lut-data = <0x401 0xd0 0x64 0x55 0x50 0x401 0xd0 0x64 0x55 0x50 0x408 0xe1 0x67 0x57 0x51 0x3bf 0xf9 0x6b 0x5b 0x52 0x3ba 0xf9 0x6d 0x5c 0x54 0x3b9 0xff 0x75 0x5e 0x54 0x3bd 0xe6 0x7b 0x62 0x57 0x3c8 0xd8 0x86 0x66 0x5b 0x3d7 0xd4 0x8a 0x70 0x5f 0x3ea 0xd5 0x67 0x59 0x52 0x406 0xd7 0x64 0x56 0x51 0x42a 0xdb 0x65 0x59 0x53 0x45b 0xe0 0x68 0x5c 0x55 0x49e 0xea 0x6a 0x5e 0x56 0x4ef 0xf6 0x6c 0x5c 0x54 0x54d 0x101 0x6b 0x57 0x51 0x5b8 0x105 0x66 0x55 0x50 0x61c 0x100 0x65 0x54 0x50 0x665 0x10c 0x64 0x54 0x50 0x62c 0x114 0x66 0x57 0x51 0x651 0x11d 0x68 0x57 0x52 0x686 0x12a 0x6b 0x5b 0x52 0x6bd 0x13b 0x6c 0x5c 0x53 0x6f9 0x152 0x70 0x5c 0x53 0x73a 0x169 0x6f 0x5b 0x52 0x781 0x17a 0x6c 0x59 0x54 0x7d0 0x18a 0x70 0x5c 0x57 0x847 0x1ae 0x79 0x63 0x5e 0xaeb 0x1f1 0x90 0x72 0x68 0x2241 0x40b 0x2a0 0x142 0xea>; | |
| qcom,lut-col-legend = <0xffffffec 0x0 0x19 0x28 0x3c>; | |
| qcom,lut-row-legend = <0x64 0x5f 0x5a 0x55 0x50 0x4b 0x46 0x41 0x3c 0x37 0x32 0x2d 0x28 0x23 0x1e 0x19 0x14 0x10 0xd 0xb 0xa 0x9 0x8 0x7 0x6 0x5 0x4 0x3 0x2 0x1>; | |
| }; | |
| }; | |
| qcom,palladium-batterydata { | |
| qcom,v-cutoff-uv = <0x33e140>; | |
| qcom,batt-id-kohm = <0x4b>; | |
| qcom,max-voltage-uv = <0x426800>; | |
| qcom,chg-term-ua = <0x249f0>; | |
| qcom,flat-ocv-threshold-uv = <0x39fbc0>; | |
| qcom,rbatt-capacitive-mohm = <0x32>; | |
| qcom,default-rbatt-mohm = <0xd2>; | |
| qcom,fcc-mah = <0x5dc>; | |
| qcom,pc-temp-ocv-lut { | |
| qcom,lut-data = <0x104f 0x104d 0x1047 0x1042 0x103d 0x1001 0x100f 0x1010 0x100e 0x100b 0xfc7 0xfeb 0xfe8 0xfe4 0xfe0 0xf7b 0xfb1 0xfb9 0xfba 0xfb9 0xf50 0xf81 0xf90 0xf95 0xf94 0xf2f 0xf5c 0xf75 0xf76 0xf73 0xf10 0xf3a 0xf59 0xf58 0xf55 0xef6 0xf1c 0xf3c 0xf3d 0xf3a 0xee0 0xf03 0xf12 0xf17 0xf16 0xed1 0xeed 0xef3 0xef3 0xef3 0xec3 0xedb 0xedf 0xee0 0xedf 0xeb8 0xecc 0xed0 0xed1 0xed0 0xead 0xec3 0xec4 0xec4 0xec3 0xea2 0xebb 0xebc 0xeb8 0xeb8 0xe96 0xeb2 0xeb5 0xeaf 0xea5 0xe8a 0xea3 0xea9 0xea0 0xe92 0xe7b 0xe89 0xe93 0xe8a 0xe7d 0xe6d 0xe79 0xe78 0xe70 0xe63 0xe5e 0xe72 0xe67 0xe5e 0xe53 0xe50 0xe6d 0xe63 0xe5c 0xe51 0xe48 0xe6a 0xe62 0xe5b 0xe50 0xe3e 0xe67 0xe61 0xe5a 0xe4e 0xe32 0xe63 0xe60 0xe58 0xe4d 0xe22 0xe5d 0xe5c 0xe54 0xe48 0xe0f 0xe53 0xe53 0xe47 0xe37 0xdf5 0xe3d 0xe36 0xe27 0xe13 0xdd5 0xe17 0xe07 0xdf7 0xde2 0xda8 0xdde 0xdc8 0xdb7 0xda2 0xd64 0xd8d 0xd75 0xd5f 0xd48 0xcf0 0xd0e 0xcec 0xcd0 0xcb2 0xbb8 0xbb8 0xbb8 0xbb8 0xbb8>; | |
| qcom,lut-col-legend = <0xffffffec 0x0 0x19 0x28 0x3c>; | |
| qcom,lut-row-legend = <0x64 0x5f 0x5a 0x55 0x50 0x4b 0x46 0x41 0x3c 0x37 0x32 0x2d 0x28 0x23 0x1e 0x19 0x14 0x10 0xd 0xb 0xa 0x9 0x8 0x7 0x6 0x5 0x4 0x3 0x2 0x1 0x0>; | |
| }; | |
| qcom,fcc-temp-lut { | |
| qcom,lut-data = <0x5bb 0x5be 0x5c1 0x5c1 0x5be>; | |
| qcom,lut-col-legend = <0xffffffec 0x0 0x19 0x28 0x3c>; | |
| }; | |
| qcom,rbatt-sf-lut { | |
| qcom,lut-data = <0x38d 0xd8 0x64 0x55 0x54 0x35b 0xee 0x6a 0x58 0x56 0x35c 0xed 0x69 0x58 0x56 0x328 0xef 0x6b 0x5a 0x58 0x321 0xea 0x6f 0x5e 0x5a 0x321 0xe6 0x76 0x61 0x5c 0x321 0xe0 0x7b 0x64 0x5f 0x327 0xdd 0x80 0x6a 0x63 0x332 0xdd 0x6f 0x65 0x61 0x349 0xe1 0x65 0x58 0x57 0x366 0xe5 0x65 0x58 0x57 0x38a 0xeb 0x67 0x5b 0x5a 0x3b6 0xf3 0x6a 0x5d 0x5d 0x3e6 0xfd 0x6e 0x5d 0x60 0x41b 0x107 0x71 0x5e 0x5a 0x45c 0x110 0x71 0x5b 0x58 0x4b0 0x113 0x6f 0x5b 0x58 0x520 0x12a 0x6c 0x5a 0x57 0x596 0x149 0x68 0x58 0x57 0x5cc 0x15f 0x6b 0x5b 0x59 0x5a6 0x159 0x6e 0x5d 0x5a 0x576 0x158 0x70 0x5e 0x5a 0x5ba 0x166 0x73 0x60 0x5b 0x5d2 0x165 0x75 0x60 0x5a 0x635 0x16d 0x75 0x5e 0x59 0x724 0x17b 0x6f 0x5b 0x58 0x867 0x18f 0x6f 0x5d 0x5b 0xa3d 0x1b4 0x75 0x62 0x5f 0xd4c 0x1f0 0x82 0x6a 0x64 0x2014 0x268 0x96 0x772 0x86 0x21053 0x1e80c 0xe6cf 0xc29c 0x73e8>; | |
| qcom,lut-col-legend = <0xffffffec 0x0 0x19 0x28 0x3c>; | |
| qcom,lut-row-legend = <0x64 0x5f 0x5a 0x55 0x50 0x4b 0x46 0x41 0x3c 0x37 0x32 0x2d 0x28 0x23 0x1e 0x19 0x14 0x10 0xd 0xb 0xa 0x9 0x8 0x7 0x6 0x5 0x4 0x3 0x2 0x1 0x0>; | |
| }; | |
| }; | |
| }; | |
| cpus { | |
| #size-cells = <0x0>; | |
| #address-cells = <0x1>; | |
| cpu@2 { | |
| device_type = "cpu"; | |
| reg = <0x2>; | |
| compatible = "qcom,krait"; | |
| }; | |
| cpu@3 { | |
| device_type = "cpu"; | |
| reg = <0x3>; | |
| compatible = "qcom,krait"; | |
| }; | |
| cpu@1 { | |
| device_type = "cpu"; | |
| reg = <0x1>; | |
| compatible = "qcom,krait"; | |
| }; | |
| cpu@0 { | |
| device_type = "cpu"; | |
| reg = <0x0>; | |
| compatible = "qcom,krait"; | |
| }; | |
| }; | |
| }; |
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