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@jaykrell
Created July 13, 2018 19:00
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builder2@xam-jetsontx1-1:/home/builder/jenkins/workspace/test-mono-mainline-linux/label/debian-9-arm64/mcs/class/corlib$ MONO_VERBOSE_METHOD=SequenceCompareTo MONO_PATH="./../../class/lib/basic:$MONO_PATH" gdb --args /home/builder/jenkins/workspace/test-mono-mainline-linux/label/debian-9-arm64/mono/mini/mono --debug ./../../class/lib/basic/cil-stringreplacer.exe --resourcestrings:../referencesource/mscorlib/mscorlib.txt --ilreplace:./../../class/lib/build-linux/corlib.unsafe.dll.tmp ../../class/lib/build-linux/mscorlib.dll
GNU gdb (Debian 7.12-6) 7.12.0.20161007-git
Copyright (C) 2016 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law. Type "show copying"
and "show warranty" for details.
This GDB was configured as "aarch64-linux-gnu".
Type "show configuration" for configuration details.
For bug reporting instructions, please see:
<http://www.gnu.org/software/gdb/bugs/>.
Find the GDB manual and other documentation resources online at:
<http://www.gnu.org/software/gdb/documentation/>.
For help, type "help".
Type "apropos word" to search for commands related to "word"...
Reading symbols from /home/builder/jenkins/workspace/test-mono-mainline-linux/label/debian-9-arm64/mono/mini/mono...done.
(gdb) run
Starting program: /home/builder/jenkins/workspace/test-mono-mainline-linux/label/debian-9-arm64/mono/mini/mono --debug ./../../class/lib/basic/cil-stringreplacer.exe --resourcestrings:../referencesource/mscorlib/mscorlib.txt --ilreplace:./../../class/lib/build-linux/corlib.unsafe.dll.tmp ../../class/lib/build-linux/mscorlib.dll
[Thread debugging using libthread_db enabled]
Using host libthread_db library "/lib/aarch64-linux-gnu/libthread_db.so.1".
[New Thread 0x7fb77ff1d0 (LWP 14318)]
[New Thread 0x7fb5c101d0 (LWP 14319)]
converting method int System.SpanHelpers:SequenceCompareTo<char> (char&,int,char&,int)
created temp 0 (R32) of type System.Int32
creating vars
created temp 1 (R33) of type System.IntPtr
created temp 2 (R34) of type System.Int32
created temp 3 (R35) of type System.IntPtr
created temp 4 (R36) of type System.Int32
return : arg R32 <-
arg [0]: arg R33 <-
arg [1]: arg R34 <-
arg [2]: arg R35 <-
arg [3]: arg R36 <-
creating locals
local [0]: created temp 5 (R37) of type System.Int32
local [1]: created temp 6 (R38) of type System.Int32
local [2]: created temp 7 (R39) of type System.Int32
locals done
method to IR System.SpanHelpers:SequenceCompareTo<char> (char&,int,char&,int)
converting (in B2: stack: 0) IL_0000: ldarg.1
converting (in B2: stack: 1) IL_0001: stloc.0
converting (in B2: stack: 0) IL_0002: ldloc.0
converting (in B2: stack: 1) IL_0003: ldarg.3
converting (in B2: stack: 2) IL_0004: ble.s IL_0008
converting (in B5: stack: 0) IL_0006: ldarg.3
converting (in B5: stack: 1) IL_0007: stloc.0
converting (in B4: stack: 0) IL_0008: ldc.i4.0
converting (in B4: stack: 1) IL_0009: stloc.1
converting (in B4: stack: 0) IL_000a: br.s IL_0034
converting (in B7: stack: 0) IL_000c: ldarg.0
converting (in B7: stack: 1) IL_000d: ldloc.1
converting (in B7: stack: 2) IL_000e: call 0x2b000017
INLINE START 0x5555c3d0d0 System.SpanHelpers:SequenceCompareTo<char> (char&,int,char&,int) -> System.Runtime.CompilerServices.Unsafe:Add<char> (char&,int)
created temp 8 (R47) of type System.IntPtr
method to IR System.Runtime.CompilerServices.Unsafe:Add<char> (char&,int)
created temp 9 (R48) of type System.IntPtr
created temp 10 (R49) of type System.Int32
converting (in B14: stack: 0) IL_0000: ldarg.0
converting (in B14: stack: 1) IL_0001: ldarg.1
converting (in B14: stack: 2) IL_0002: sizeof 0x1b00001c
converting (in B14: stack: 3) IL_0008: conv.i
converting (in B14: stack: 3) IL_0009: mul
converting (in B14: stack: 2) IL_000a: add
converting (in B14: stack: 1) IL_000b: ret
INLINE END System.SpanHelpers:SequenceCompareTo<char> (char&,int,char&,int) -> System.Runtime.CompilerServices.Unsafe:Add<char> (char&,int)
converting (in B7: stack: 1) IL_0013: ldarg.2
converting (in B7: stack: 2) IL_0014: ldloc.1
converting (in B7: stack: 3) IL_0015: call 0x2b000017
INLINE START 0x5555c3d0d0 System.SpanHelpers:SequenceCompareTo<char> (char&,int,char&,int) -> System.Runtime.CompilerServices.Unsafe:Add<char> (char&,int)
created temp 11 (R59) of type System.IntPtr
method to IR System.Runtime.CompilerServices.Unsafe:Add<char> (char&,int)
created temp 12 (R60) of type System.IntPtr
created temp 13 (R61) of type System.Int32
converting (in B19: stack: 0) IL_0000: ldarg.0
converting (in B19: stack: 1) IL_0001: ldarg.1
converting (in B19: stack: 2) IL_0002: sizeof 0x1b00001c
converting (in B19: stack: 3) IL_0008: conv.i
converting (in B19: stack: 3) IL_0009: mul
converting (in B19: stack: 2) IL_000a: add
converting (in B19: stack: 1) IL_000b: ret
INLINE END System.SpanHelpers:SequenceCompareTo<char> (char&,int,char&,int) -> System.Runtime.CompilerServices.Unsafe:Add<char> (char&,int)
converting (in B7: stack: 2) IL_001a: ldobj 0x1b00001c
converting (in B7: stack: 2) IL_001f: constrained.0x1b00001c
converting (in B7: stack: 2) IL_0025: callvirt 0x0a0000a2
Constrained call to System.Char
INLINE START 0x5555a78678 System.SpanHelpers:SequenceCompareTo<char> (char&,int,char&,int) -> char:CompareTo (char)
created temp 14 (R70) of type System.Int32
method to IR char:CompareTo (char)
created temp 15 (R71) of type System.IntPtr
created temp 16 (R72) of type System.UInt16
converting (in B24: stack: 0) IL_0000: ldarg.0
converting (in B24: stack: 1) IL_0001: ldind.u2
converting (in B24: stack: 1) IL_0002: ldarg.1
converting (in B24: stack: 2) IL_0003: sub
converting (in B24: stack: 1) IL_0004: ret
INLINE END System.SpanHelpers:SequenceCompareTo<char> (char&,int,char&,int) -> char:CompareTo (char)
converting (in B7: stack: 1) IL_002a: stloc.2
converting (in B7: stack: 0) IL_002b: ldloc.2
converting (in B7: stack: 1) IL_002c: brfalse.s IL_0030
converting (in B9: stack: 0) IL_002e: ldloc.2
converting (in B9: stack: 1) IL_002f: ret
converting (in B8: stack: 0) IL_0030: ldloc.1
converting (in B8: stack: 1) IL_0031: ldc.i4.1
converting (in B8: stack: 2) IL_0032: add
converting (in B8: stack: 1) IL_0033: stloc.1
converting (in B6: stack: 0) IL_0034: ldloc.1
converting (in B6: stack: 1) IL_0035: ldloc.0
converting (in B6: stack: 2) IL_0036: blt.s IL_000c
converting (in B10: stack: 0) IL_0038: ldarga.s 1
converting (in B10: stack: 1) IL_003a: ldarg.3
converting (in B10: stack: 2) IL_003b: call 0x060012db
INLINE START 0x555597e798 System.SpanHelpers:SequenceCompareTo<char> (char&,int,char&,int) -> int:CompareTo (int)
created temp 17 (R88) of type System.Int32
method to IR int:CompareTo (int)
created temp 18 (R89) of type System.IntPtr
created temp 19 (R90) of type System.Int32
converting (in B29: stack: 0) IL_0000: ldarg.0
converting (in B29: stack: 1) IL_0001: ldind.i4
converting (in B29: stack: 1) IL_0002: ldarg.1
converting (in B29: stack: 2) IL_0003: bge.s IL_0007
converting (in B32: stack: 0) IL_0005: ldc.i4.m1
converting (in B32: stack: 1) IL_0006: ret
converting (in B31: stack: 0) IL_0007: ldarg.0
converting (in B31: stack: 1) IL_0008: ldind.i4
converting (in B31: stack: 1) IL_0009: ldarg.1
converting (in B31: stack: 2) IL_000a: ble.s IL_000e
converting (in B34: stack: 0) IL_000c: ldc.i4.1
converting (in B34: stack: 1) IL_000d: ret
converting (in B33: stack: 0) IL_000e: ldc.i4.0
converting (in B33: stack: 1) IL_000f: ret
INLINE END System.SpanHelpers:SequenceCompareTo<char> (char&,int,char&,int) -> int:CompareTo (int)
converting (in B28: stack: 1) IL_0040: ret
REGION BB0 IL_0000 ID_FFFFFFFF
REGION BB3 IL_0000 ID_FFFFFFFF
REGION BB2 IL_0004 ID_FFFFFFFF
REGION BB5 IL_0007 ID_FFFFFFFF
REGION BB4 IL_000a ID_FFFFFFFF
REGION BB7 IL_002c ID_FFFFFFFF
REGION BB9 IL_002f ID_FFFFFFFF
REGION BB8 IL_0033 ID_FFFFFFFF
REGION BB6 IL_0036 ID_FFFFFFFF
REGION BB10 IL_003b ID_FFFFFFFF
REGION BB29 IL_003b ID_FFFFFFFF
REGION BB32 IL_003b ID_FFFFFFFF
REGION BB31 IL_003b ID_FFFFFFFF
REGION BB34 IL_003b ID_FFFFFFFF
REGION BB33 IL_003b ID_FFFFFFFF
REGION BB28 IL_0040 ID_FFFFFFFF
REGION BB1 IL_0000 ID_FFFFFFFF
AFTER METHOD-TO-IR 0: [IN: , OUT: BB3(0) ]
AFTER METHOD-TO-IR 3: [IN: BB0(0), OUT: BB2(0) ]
iconst R37 <- [0]
iconst R38 <- [0]
iconst R39 <- [0]
AFTER METHOD-TO-IR 2: [IN: BB3(0), OUT: BB4(0) BB5(0) ]
il_seq_point il: 0x0
move R40 <- R34
move R37 <- R40
il_seq_point il: 0x2
move R41 <- R37
move R42 <- R36
icompare R41 R42
int_ble [B4B5]
AFTER METHOD-TO-IR 5: [IN: BB2(0), OUT: BB4(0) ]
il_seq_point il: 0x6
move R43 <- R36
move R37 <- R43
AFTER METHOD-TO-IR 4: [IN: BB2(0) BB5(0), OUT: BB6(0) ]
il_seq_point il: 0x8
iconst R38 <- [0]
il_seq_point il: 0xa
br [B6]
AFTER METHOD-TO-IR 7: [IN: BB6(0), OUT: BB8(0) BB9(0) ]
il_seq_point il: 0xc
move R45 <- R33
move R46 <- R38
nop
move R48 <- R45
move R49 <- R46
move R50 <- R48
move R51 <- R49
iconst R52 <- [2]
sext_i4 R53 <- R52
long_mul R54 <- R51 R53
long_add R55 <- R50 R54
move R47 <- R55
nop
move R56 <- R47
il_seq_point il: 0x13, nonempty-stack
move R57 <- R35
move R58 <- R38
nop
move R60 <- R57
move R61 <- R58
move R62 <- R60
move R63 <- R61
iconst R64 <- [2]
sext_i4 R65 <- R64
long_mul R66 <- R63 R65
long_add R67 <- R62 R66
move R59 <- R67
nop
move R68 <- R59
il_seq_point il: 0x1a, nonempty-stack
loadu2_membase R69 <- [R68 + 0x0]
nop
move R71 <- R56
move R72 <- R69
move R73 <- R71
checkthis [R73 + 0x0]
not_null R73
move R74 <- R71
loadu2_membase R75 <- [R74 + 0x0]
move R76 <- R72
int_sub R77 <- R75 R76
move R70 <- R77
nop
move R78 <- R70
il_seq_point il: 0x2a, nonempty-stack
move R39 <- R78
il_seq_point il: 0x2b
move R79 <- R39
icompare_imm R79 [0]
int_beq [B8B9]
AFTER METHOD-TO-IR 9: [IN: BB7(0), OUT: BB1(0) ]
il_seq_point il: 0x2e
move R80 <- R39
il_seq_point il: 0x2f
move R32 <- R80
br [B1]
AFTER METHOD-TO-IR 8: [IN: BB7(0), OUT: BB6(0) ]
il_seq_point il: 0x30
move R81 <- R38
nop
int_add_imm R83 <- R81 [1]
move R38 <- R83
AFTER METHOD-TO-IR 6: [IN: BB4(0) BB8(0), OUT: BB7(0) BB10(0) ]
il_seq_point il: 0x34
move R84 <- R38
move R85 <- R37
icompare R84 R85
int_blt [B7B10]
AFTER METHOD-TO-IR 10: [IN: BB6(0), OUT: BB29(0) ]
il_seq_point il: 0x38
ldaddr R86 <- R34
move R87 <- R36
nop
move R89 <- R86
move R90 <- R87
AFTER METHOD-TO-IR 29: [IN: BB10(0), OUT: BB31(0) BB32(0) ]
move R91 <- R89
loadi4_membase R92 <- [R91 + 0x0]
move R93 <- R90
icompare R92 R93
int_bge [B31B32]
AFTER METHOD-TO-IR 32: [IN: BB29(0), OUT: BB28(0) ]
iconst R94 <- [-1]
move R88 <- R94
br [B28]
AFTER METHOD-TO-IR 31: [IN: BB29(0), OUT: BB33(0) BB34(0) ]
move R95 <- R89
loadi4_membase R96 <- [R95 + 0x0]
move R97 <- R90
icompare R96 R97
int_ble [B33B34]
AFTER METHOD-TO-IR 34: [IN: BB31(0), OUT: BB28(0) ]
iconst R98 <- [1]
move R88 <- R98
br [B28]
AFTER METHOD-TO-IR 33: [IN: BB31(0), OUT: BB28(0) ]
iconst R99 <- [0]
move R88 <- R99
br [B28]
AFTER METHOD-TO-IR 28: [IN: BB32(0) BB34(0) BB33(0), OUT: BB1(0) ]
move R100 <- R88
il_seq_point il: 0x40, nonempty-stack
il_seq_point il: 0x40
move R32 <- R100
br [B1]
AFTER METHOD-TO-IR 1: [IN: BB9(0) BB28(0), OUT: ]
CCOPY/2: R42 -> R36
CCOPY/2: R43 -> R36
CCOPY/2: R45 -> R33
CCOPY/2: R46 -> R38
CCOPY/2: R48 -> R33
CCOPY/2: R49 -> R38
CCOPY/2: R51 -> R38
CCOPY/2: R50 -> R33
CCOPY/2: R57 -> R35
CCOPY/2: R58 -> R38
CCOPY/2: R60 -> R35
CCOPY/2: R61 -> R38
CCOPY/2: R63 -> R38
CCOPY/2: R62 -> R35
CCOPY/2: R71 -> R56
CCOPY/2: R73 -> R56
CCOPY/2: R73 -> R56
CCOPY/2: R71 -> R56
CCOPY/2: R74 -> R56
CCOPY/2: R72 -> R69
CCOPY/2: R76 -> R69
CCOPY/2: R80 -> R39
CCOPY/2: R81 -> R38
CCOPY/2: R84 -> R38
CCOPY/2: R85 -> R37
CCOPY/2: R87 -> R36
CCOPY/2: R91 -> R89
CCOPY/2: R93 -> R90
CCOPY/2: R95 -> R89
CCOPY/2: R97 -> R90
CCOPY/2: R100 -> R88
block merge triggered 3 -> 2
block merge triggered 10 -> 29
br removal triggered 33 -> 28
br removal triggered 28 -> 1
HANDLE-GLOBAL-VREGS BLOCK 0:
HANDLE-GLOBAL-VREGS BLOCK 3:
iconst R37 <- [0]
iconst R38 <- [0]
iconst R39 <- [0]
il_seq_point il: 0x0
move R40 <- R34
move R37 <- R40
il_seq_point il: 0x2
move R41 <- R37
move R42 <- R36
icompare R41 R36
int_ble [B4B5]
HANDLE-GLOBAL-VREGS BLOCK 5:
il_seq_point il: 0x6
move R43 <- R36
move R37 <- R36
HANDLE-GLOBAL-VREGS BLOCK 4:
il_seq_point il: 0x8
iconst R38 <- [0]
il_seq_point il: 0xa
br [B6]
HANDLE-GLOBAL-VREGS BLOCK 7:
il_seq_point il: 0xc
move R45 <- R33
move R46 <- R38
move R48 <- R33
move R49 <- R38
move R50 <- R33
move R51 <- R38
iconst R52 <- [2]
iconst R53 <- [2]
long_shl_imm R54 <- R38
long_add R55 <- R33 R54
move R47 <- R55
move R56 <- R47
il_seq_point il: 0x13, nonempty-stack
move R57 <- R35
move R58 <- R38
move R60 <- R35
move R61 <- R38
move R62 <- R35
move R63 <- R38
iconst R64 <- [2]
iconst R65 <- [2]
long_shl_imm R66 <- R38
long_add R67 <- R35 R66
move R59 <- R67
move R68 <- R59
il_seq_point il: 0x1a, nonempty-stack
loadu2_membase R69 <- [R68 + 0x0]
move R71 <- R56
move R72 <- R69
move R73 <- R56
checkthis [R56 + 0x0]
not_null R56
move R74 <- R56
loadu2_membase R75 <- [R56 + 0x0]
move R76 <- R69
int_sub R77 <- R75 R69
move R70 <- R77
move R78 <- R70
il_seq_point il: 0x2a, nonempty-stack
move R39 <- R78
il_seq_point il: 0x2b
move R79 <- R39
icompare_imm R79 [0]
int_beq [B8B9]
HANDLE-GLOBAL-VREGS BLOCK 9:
il_seq_point il: 0x2e
move R80 <- R39
il_seq_point il: 0x2f
move R32 <- R39
br [B1]
HANDLE-GLOBAL-VREGS BLOCK 8:
il_seq_point il: 0x30
move R81 <- R38
int_add_imm R83 <- R38 [1]
move R38 <- R83
HANDLE-GLOBAL-VREGS BLOCK 6:
il_seq_point il: 0x34
move R84 <- R38
move R85 <- R37
icompare R38 R37
int_blt [B7B10]
HANDLE-GLOBAL-VREGS BLOCK 10:
il_seq_point il: 0x38
ldaddr R86 <- R34
move R87 <- R36
ldaddr R89 <- R34
move R90 <- R36
move R91 <- R89
loadi4_membase R92 <- [R89 + 0x0]
move R93 <- R90
icompare R92 R90
int_bge [B31B32]
HANDLE-GLOBAL-VREGS BLOCK 32:
iconst R94 <- [-1]
iconst R88 <- [-1]
br [B28]
HANDLE-GLOBAL-VREGS BLOCK 31:
move R95 <- R89
loadi4_membase R96 <- [R89 + 0x0]
move R97 <- R90
icompare R96 R90
int_ble [B33B34]
HANDLE-GLOBAL-VREGS BLOCK 34:
iconst R98 <- [1]
iconst R88 <- [1]
br [B28]
HANDLE-GLOBAL-VREGS BLOCK 33:
iconst R99 <- [0]
iconst R88 <- [0]
nop
HANDLE-GLOBAL-VREGS BLOCK 28:
move R100 <- R88
il_seq_point il: 0x40, nonempty-stack
il_seq_point il: 0x40
move R32 <- R88
nop
HANDLE-GLOBAL-VREGS BLOCK 1:
CONVERTED R47(8) TO VREG.
CONVERTED R48(9) TO VREG.
CONVERTED R49(10) TO VREG.
CONVERTED R59(11) TO VREG.
CONVERTED R60(12) TO VREG.
CONVERTED R61(13) TO VREG.
CONVERTED R70(14) TO VREG.
CONVERTED R71(15) TO VREG.
CONVERTED R72(16) TO VREG.
Reverse copyprop in BB3 on move R37 <- R40
Reverse copyprop in BB7 on move R39 <- R78
Reverse copyprop in BB7 on move R39 <- R70
Reverse copyprop in BB7 on move R39 <- R77
Reverse copyprop in BB7 on move R68 <- R59
Reverse copyprop in BB7 on move R68 <- R67
Reverse copyprop in BB7 on move R56 <- R47
Reverse copyprop in BB7 on move R56 <- R55
Reverse copyprop in BB8 on move R38 <- R83
BEFORE ALIAS_ANALYSIS 0: [IN: , OUT: BB3(0) ]
BEFORE ALIAS_ANALYSIS 3: [IN: BB0(0), OUT: BB4(0) BB5(0) ]
iconst R38 <- [0]
iconst R39 <- [0]
il_seq_point il: 0x0
move R37 <- R34
il_seq_point il: 0x2
move R41 <- R37
icompare R41 R36
int_ble [B4B5]
BEFORE ALIAS_ANALYSIS 5: [IN: BB3(0), OUT: BB4(0) ]
il_seq_point il: 0x6
move R37 <- R36
BEFORE ALIAS_ANALYSIS 4: [IN: BB5(0) BB3(0), OUT: BB6(0) ]
il_seq_point il: 0x8
iconst R38 <- [0]
il_seq_point il: 0xa
br [B6]
BEFORE ALIAS_ANALYSIS 7: [IN: BB6(0), OUT: BB8(0) BB9(0) ]
il_seq_point il: 0xc
long_shl_imm R54 <- R38
long_add R56 <- R33 R54
il_seq_point il: 0x13, nonempty-stack
long_shl_imm R66 <- R38
long_add R68 <- R35 R66
il_seq_point il: 0x1a, nonempty-stack
loadu2_membase R69 <- [R68 + 0x0]
checkthis [R56 + 0x0]
not_null R56
loadu2_membase R75 <- [R56 + 0x0]
int_sub R39 <- R75 R69
il_seq_point il: 0x2a, nonempty-stack
il_seq_point il: 0x2b
move R79 <- R39
icompare_imm R79 [0]
int_beq [B8B9]
BEFORE ALIAS_ANALYSIS 9: [IN: BB7(0), OUT: BB1(0) ]
il_seq_point il: 0x2e
il_seq_point il: 0x2f
move R32 <- R39
br [B1]
BEFORE ALIAS_ANALYSIS 8: [IN: BB7(0), OUT: BB6(0) ]
il_seq_point il: 0x30
int_add_imm R38 <- R38 [1]
BEFORE ALIAS_ANALYSIS 6: [IN: BB4(0) BB8(0), OUT: BB7(0) BB10(0) ]
il_seq_point il: 0x34
icompare R38 R37
int_blt [B7B10]
BEFORE ALIAS_ANALYSIS 10: [IN: BB6(0), OUT: BB31(0) BB32(0) ]
il_seq_point il: 0x38
ldaddr R89 <- R34
move R90 <- R36
loadi4_membase R92 <- [R89 + 0x0]
icompare R92 R90
int_bge [B31B32]
BEFORE ALIAS_ANALYSIS 32: [IN: BB10(0), OUT: BB28(0) ]
iconst R88 <- [-1]
br [B28]
BEFORE ALIAS_ANALYSIS 31: [IN: BB10(0), OUT: BB33(0) BB34(0) ]
loadi4_membase R96 <- [R89 + 0x0]
icompare R96 R90
int_ble [B33B34]
BEFORE ALIAS_ANALYSIS 34: [IN: BB31(0), OUT: BB28(0) ]
iconst R88 <- [1]
br [B28]
BEFORE ALIAS_ANALYSIS 33: [IN: BB31(0), OUT: BB28(0) ]
iconst R88 <- [0]
BEFORE ALIAS_ANALYSIS 28: [IN: BB32(0) BB34(0) BB33(0), OUT: BB1(0) ]
il_seq_point il: 0x40, nonempty-stack
il_seq_point il: 0x40
move R32 <- R88
BEFORE ALIAS_ANALYSIS 1: [IN: BB9(0) BB28(0), OUT: ]
New address: ldaddr R89 <- R34
Found candidate load: loadi4_membase R92 <- [R89 + 0x0]
mem2reg replacing: loadi4_membase R92 <- [R89 + 0x0]
Killing : arg R34 <-
Found op : ldaddr R89 <- R34
Restoring : arg R34 <-
AFTER ALIAS_ANALYSIS 0: [IN: , OUT: BB3(0) ]
AFTER ALIAS_ANALYSIS 3: [IN: BB0(0), OUT: BB4(0) BB5(0) ]
iconst R38 <- [0]
iconst R39 <- [0]
il_seq_point il: 0x0
move R37 <- R34
il_seq_point il: 0x2
move R41 <- R37
icompare R41 R36
int_ble [B4B5]
AFTER ALIAS_ANALYSIS 5: [IN: BB3(0), OUT: BB4(0) ]
il_seq_point il: 0x6
move R37 <- R36
AFTER ALIAS_ANALYSIS 4: [IN: BB5(0) BB3(0), OUT: BB6(0) ]
il_seq_point il: 0x8
iconst R38 <- [0]
il_seq_point il: 0xa
br [B6]
AFTER ALIAS_ANALYSIS 7: [IN: BB6(0), OUT: BB8(0) BB9(0) ]
il_seq_point il: 0xc
long_shl_imm R54 <- R38
long_add R56 <- R33 R54
il_seq_point il: 0x13, nonempty-stack
long_shl_imm R66 <- R38
long_add R68 <- R35 R66
il_seq_point il: 0x1a, nonempty-stack
loadu2_membase R69 <- [R68 + 0x0]
checkthis [R56 + 0x0]
not_null R56
loadu2_membase R75 <- [R56 + 0x0]
int_sub R39 <- R75 R69
il_seq_point il: 0x2a, nonempty-stack
il_seq_point il: 0x2b
move R79 <- R39
icompare_imm R79 [0]
int_beq [B8B9]
AFTER ALIAS_ANALYSIS 9: [IN: BB7(0), OUT: BB1(0) ]
il_seq_point il: 0x2e
il_seq_point il: 0x2f
move R32 <- R39
br [B1]
AFTER ALIAS_ANALYSIS 8: [IN: BB7(0), OUT: BB6(0) ]
il_seq_point il: 0x30
int_add_imm R38 <- R38 [1]
AFTER ALIAS_ANALYSIS 6: [IN: BB4(0) BB8(0), OUT: BB7(0) BB10(0) ]
il_seq_point il: 0x34
icompare R38 R37
int_blt [B7B10]
AFTER ALIAS_ANALYSIS 10: [IN: BB6(0), OUT: BB31(0) BB32(0) ]
il_seq_point il: 0x38
ldaddr R89 <- R34
move R90 <- R36
move R92 <- R34
icompare R92 R90
int_bge [B31B32]
AFTER ALIAS_ANALYSIS 32: [IN: BB10(0), OUT: BB28(0) ]
iconst R88 <- [-1]
br [B28]
AFTER ALIAS_ANALYSIS 31: [IN: BB10(0), OUT: BB33(0) BB34(0) ]
loadi4_membase R96 <- [R89 + 0x0]
icompare R96 R90
int_ble [B33B34]
AFTER ALIAS_ANALYSIS 34: [IN: BB31(0), OUT: BB28(0) ]
iconst R88 <- [1]
br [B28]
AFTER ALIAS_ANALYSIS 33: [IN: BB31(0), OUT: BB28(0) ]
iconst R88 <- [0]
AFTER ALIAS_ANALYSIS 28: [IN: BB32(0) BB34(0) BB33(0), OUT: BB1(0) ]
il_seq_point il: 0x40, nonempty-stack
il_seq_point il: 0x40
move R32 <- R88
AFTER ALIAS_ANALYSIS 1: [IN: BB9(0) BB28(0), OUT: ]
BB0 IN:
BB3 IN: 0
BB4 IN: 5 3
BB6 IN: 4 8
BB7 IN: 6
BB8 IN: 7
BB9 IN: 7
BB1 IN: 9 28
BB10 IN: 6
BB31 IN: 10
BB33 IN: 31
BB28 IN: 32 34 33
BB34 IN: 31
BB32 IN: 10
BB5 IN: 3
DTREE System.SpanHelpers:SequenceCompareTo<char> (char&,int,char&,int) 0
BB0(dfn=0) (IDOM=BB-1): BB0
BB3(dfn=1) (IDOM=BB0): BB0 BB3
BB4(dfn=2) (IDOM=BB3): BB0 BB3 BB4
BB6(dfn=3) (IDOM=BB4): BB0 BB3 BB4 BB6
BB7(dfn=4) (IDOM=BB6): BB0 BB3 BB4 BB6 BB7
BB8(dfn=5) (IDOM=BB7): BB0 BB3 BB4 BB6 BB7 BB8
BB9(dfn=6) (IDOM=BB7): BB0 BB3 BB4 BB6 BB7 BB9
BB1(dfn=7) (IDOM=BB6): BB0 BB3 BB4 BB6 BB1
BB10(dfn=8) (IDOM=BB6): BB0 BB3 BB4 BB6 BB10
BB31(dfn=9) (IDOM=BB10): BB0 BB3 BB4 BB6 BB10 BB31
BB33(dfn=10) (IDOM=BB31): BB0 BB3 BB4 BB6 BB10 BB31 BB33
BB28(dfn=11) (IDOM=BB10): BB0 BB3 BB4 BB6 BB10 BB28
BB34(dfn=12) (IDOM=BB31): BB0 BB3 BB4 BB6 BB10 BB31 BB34
BB32(dfn=13) (IDOM=BB10): BB0 BB3 BB4 BB6 BB10 BB32
BB5(dfn=14) (IDOM=BB3): BB0 BB3 BB5
LOOP START 6
BB6 1 0x5555dc5c40
BB7 1 (nil)
BB8 1 (nil)
BEFORE LOWER-VTYPE-OPTS 0: [IN: , OUT: BB3(1) ]
AFTER LOWER-VTYPE-OPTS 0: [IN: , OUT: BB3(1) ]
BEFORE LOWER-VTYPE-OPTS 3: [IN: BB0(0), OUT: BB4(2) BB5(14) ]
iconst R38 <- [0]
iconst R39 <- [0]
il_seq_point il: 0x0
move R37 <- R34
il_seq_point il: 0x2
move R41 <- R37
icompare R41 R36
int_ble [B4B5]
AFTER LOWER-VTYPE-OPTS 3: [IN: BB0(0), OUT: BB4(2) BB5(14) ]
iconst R38 <- [0]
iconst R39 <- [0]
il_seq_point il: 0x0
move R37 <- R34
il_seq_point il: 0x2
move R41 <- R37
icompare R41 R36
int_ble [B4B5]
BEFORE LOWER-VTYPE-OPTS 5: [IN: BB3(1), OUT: BB4(2) ]
il_seq_point il: 0x6
move R37 <- R36
AFTER LOWER-VTYPE-OPTS 5: [IN: BB3(1), OUT: BB4(2) ]
il_seq_point il: 0x6
move R37 <- R36
BEFORE LOWER-VTYPE-OPTS 4: [IN: BB5(14) BB3(1), OUT: BB6(3) ]
il_seq_point il: 0x8
iconst R38 <- [0]
il_seq_point il: 0xa
br [B6]
AFTER LOWER-VTYPE-OPTS 4: [IN: BB5(14) BB3(1), OUT: BB6(3) ]
il_seq_point il: 0x8
iconst R38 <- [0]
il_seq_point il: 0xa
br [B6]
BEFORE LOWER-VTYPE-OPTS 7: [IN: BB6(3), OUT: BB8(5) BB9(6) ]
il_seq_point il: 0xc
long_shl_imm R54 <- R38
long_add R56 <- R33 R54
il_seq_point il: 0x13, nonempty-stack
long_shl_imm R66 <- R38
long_add R68 <- R35 R66
il_seq_point il: 0x1a, nonempty-stack
loadu2_membase R69 <- [R68 + 0x0]
checkthis [R56 + 0x0]
not_null R56
loadu2_membase R75 <- [R56 + 0x0]
int_sub R39 <- R75 R69
il_seq_point il: 0x2a, nonempty-stack
il_seq_point il: 0x2b
move R79 <- R39
icompare_imm R79 [0]
int_beq [B8B9]
AFTER LOWER-VTYPE-OPTS 7: [IN: BB6(3), OUT: BB8(5) BB9(6) ]
il_seq_point il: 0xc
long_shl_imm R54 <- R38
long_add R56 <- R33 R54
il_seq_point il: 0x13, nonempty-stack
long_shl_imm R66 <- R38
long_add R68 <- R35 R66
il_seq_point il: 0x1a, nonempty-stack
loadu2_membase R69 <- [R68 + 0x0]
checkthis [R56 + 0x0]
not_null R56
loadu2_membase R75 <- [R56 + 0x0]
int_sub R39 <- R75 R69
il_seq_point il: 0x2a, nonempty-stack
il_seq_point il: 0x2b
move R79 <- R39
icompare_imm R79 [0]
int_beq [B8B9]
BEFORE LOWER-VTYPE-OPTS 9: [IN: BB7(4), OUT: BB1(7) ]
il_seq_point il: 0x2e
il_seq_point il: 0x2f
move R32 <- R39
br [B1]
AFTER LOWER-VTYPE-OPTS 9: [IN: BB7(4), OUT: BB1(7) ]
il_seq_point il: 0x2e
il_seq_point il: 0x2f
move R32 <- R39
br [B1]
BEFORE LOWER-VTYPE-OPTS 8: [IN: BB7(4), OUT: BB6(3) ]
il_seq_point il: 0x30
int_add_imm R38 <- R38 [1]
AFTER LOWER-VTYPE-OPTS 8: [IN: BB7(4), OUT: BB6(3) ]
il_seq_point il: 0x30
int_add_imm R38 <- R38 [1]
BEFORE LOWER-VTYPE-OPTS 6: [IN: BB4(2) BB8(5), OUT: BB7(4) BB10(8) ]
il_seq_point il: 0x34
icompare R38 R37
int_blt [B7B10]
AFTER LOWER-VTYPE-OPTS 6: [IN: BB4(2) BB8(5), OUT: BB7(4) BB10(8) ]
il_seq_point il: 0x34
icompare R38 R37
int_blt [B7B10]
BEFORE LOWER-VTYPE-OPTS 10: [IN: BB6(3), OUT: BB31(9) BB32(13) ]
il_seq_point il: 0x38
ldaddr R89 <- R34
move R90 <- R36
move R92 <- R34
icompare R92 R90
int_bge [B31B32]
AFTER LOWER-VTYPE-OPTS 10: [IN: BB6(3), OUT: BB31(9) BB32(13) ]
il_seq_point il: 0x38
ldaddr R89 <- R34
move R90 <- R36
move R92 <- R34
icompare R92 R90
int_bge [B31B32]
BEFORE LOWER-VTYPE-OPTS 32: [IN: BB10(8), OUT: BB28(11) ]
iconst R88 <- [-1]
br [B28]
AFTER LOWER-VTYPE-OPTS 32: [IN: BB10(8), OUT: BB28(11) ]
iconst R88 <- [-1]
br [B28]
BEFORE LOWER-VTYPE-OPTS 31: [IN: BB10(8), OUT: BB33(10) BB34(12) ]
loadi4_membase R96 <- [R89 + 0x0]
icompare R96 R90
int_ble [B33B34]
AFTER LOWER-VTYPE-OPTS 31: [IN: BB10(8), OUT: BB33(10) BB34(12) ]
loadi4_membase R96 <- [R89 + 0x0]
icompare R96 R90
int_ble [B33B34]
BEFORE LOWER-VTYPE-OPTS 34: [IN: BB31(9), OUT: BB28(11) ]
iconst R88 <- [1]
br [B28]
AFTER LOWER-VTYPE-OPTS 34: [IN: BB31(9), OUT: BB28(11) ]
iconst R88 <- [1]
br [B28]
BEFORE LOWER-VTYPE-OPTS 33: [IN: BB31(9), OUT: BB28(11) ]
iconst R88 <- [0]
AFTER LOWER-VTYPE-OPTS 33: [IN: BB31(9), OUT: BB28(11) ]
iconst R88 <- [0]
BEFORE LOWER-VTYPE-OPTS 28: [IN: BB32(13) BB34(12) BB33(10), OUT: BB1(7) ]
il_seq_point il: 0x40, nonempty-stack
il_seq_point il: 0x40
move R32 <- R88
AFTER LOWER-VTYPE-OPTS 28: [IN: BB32(13) BB34(12) BB33(10), OUT: BB1(7) ]
il_seq_point il: 0x40, nonempty-stack
il_seq_point il: 0x40
move R32 <- R88
BEFORE LOWER-VTYPE-OPTS 1: [IN: BB9(6) BB28(11), OUT: ]
AFTER LOWER-VTYPE-OPTS 1: [IN: BB9(6) BB28(11), OUT: ]
LIVENESS:
BLOCK BB0 (BB3, ):
GEN BB0: {}
KILL BB0: {}
BLOCK BB3 (BB4, BB5, ):
1 iconst R38 <- [0]
KILL: R38(6)
1 iconst R39 <- [0]
KILL: R39(7)
1 il_seq_point il: 0x0
1 move R37 <- R34
GEN: R34(2)
KILL: R37(5)
1 il_seq_point il: 0x2
1 move R41 <- R37
GEN: R37(5)
1 icompare R41 R36
GEN: R36(4)
1 int_ble [B4B5]
GEN BB3: {2, 4}
KILL BB3: {5, 6, 7}
BLOCK BB4 (BB6, ):
1 il_seq_point il: 0x8
1 iconst R38 <- [0]
KILL: R38(6)
1 il_seq_point il: 0xa
1 br [B6]
GEN BB4: {}
KILL BB4: {6}
BLOCK BB6 (BB7, BB10, ):
1 il_seq_point il: 0x34
1 icompare R38 R37
GEN: R38(6)
GEN: R37(5)
1 int_blt [B7B10]
GEN BB6: {5, 6}
KILL BB6: {}
BLOCK BB7 (BB8, BB9, ):
1 il_seq_point il: 0xc
1 long_shl_imm R54 <- R38
GEN: R38(6)
1 long_add R56 <- R33 R54
GEN: R33(1)
1 il_seq_point il: 0x13, nonempty-stack
1 long_shl_imm R66 <- R38
GEN: R38(6)
1 long_add R68 <- R35 R66
GEN: R35(3)
1 il_seq_point il: 0x1a, nonempty-stack
1 loadu2_membase R69 <- [R68 + 0x0]
1 checkthis [R56 + 0x0]
1 not_null R56
1 loadu2_membase R75 <- [R56 + 0x0]
1 int_sub R39 <- R75 R69
KILL: R39(7)
1 il_seq_point il: 0x2a, nonempty-stack
1 il_seq_point il: 0x2b
1 move R79 <- R39
GEN: R39(7)
1 icompare_imm R79 [0]
1 int_beq [B8B9]
GEN BB7: {1, 3, 6}
KILL BB7: {7}
BLOCK BB8 (BB6, ):
1 il_seq_point il: 0x30
1 int_add_imm R38 <- R38 [1]
GEN: R38(6)
KILL: R38(6)
GEN BB8: {6}
KILL BB8: {6}
BLOCK BB9 (BB1, ):
1 il_seq_point il: 0x2e
1 il_seq_point il: 0x2f
1 move R32 <- R39
GEN: R39(7)
KILL: R32(0)
1 br [B1]
GEN BB9: {7}
KILL BB9: {0}
BLOCK BB1 ():
GEN BB1: {}
KILL BB1: {}
BLOCK BB10 (BB31, BB32, ):
1 il_seq_point il: 0x38
1 ldaddr R89 <- R34
GEN: R34(2)
KILL: R89(9)
1 move R90 <- R36
GEN: R36(4)
KILL: R90(10)
1 move R92 <- R34
GEN: R34(2)
1 icompare R92 R90
GEN: R90(10)
1 int_bge [B31B32]
GEN BB10: {2, 4}
KILL BB10: {9, 10}
BLOCK BB31 (BB33, BB34, ):
1 loadi4_membase R96 <- [R89 + 0x0]
GEN: R89(9)
1 icompare R96 R90
GEN: R90(10)
1 int_ble [B33B34]
GEN BB31: {9, 10}
KILL BB31: {}
BLOCK BB33 (BB28, ):
1 iconst R88 <- [0]
KILL: R88(8)
GEN BB33: {}
KILL BB33: {8}
BLOCK BB28 (BB1, ):
1 il_seq_point il: 0x40, nonempty-stack
1 il_seq_point il: 0x40
1 move R32 <- R88
GEN: R88(8)
KILL: R32(0)
GEN BB28: {8}
KILL BB28: {0}
BLOCK BB34 (BB28, ):
1 iconst R88 <- [1]
KILL: R88(8)
1 br [B28]
GEN BB34: {}
KILL BB34: {8}
BLOCK BB32 (BB28, ):
1 iconst R88 <- [-1]
KILL: R88(8)
1 br [B28]
GEN BB32: {}
KILL BB32: {8}
BLOCK BB5 (BB4, ):
1 il_seq_point il: 0x6
1 move R37 <- R36
GEN: R36(4)
KILL: R37(5)
GEN BB5: {4}
KILL BB5: {5}
ITERATION:
P: BB5(14): IN: BB3 OUT:BB4
LIVE IN BB5: {4}
P: BB32(13): IN: BB10 OUT:BB28
LIVE IN BB32: {}
P: BB34(12): IN: BB31 OUT:BB28
LIVE IN BB34: {}
P: BB28(11): IN: BB32 BB34 BB33 OUT:BB1
LIVE IN BB28: {8}
P: BB33(10): IN: BB31 OUT:BB28
LIVE IN BB33: {}
P: BB31(9): IN: BB10 OUT:BB33 BB34
LIVE IN BB31: {9, 10}
P: BB10(8): IN: BB6 OUT:BB31 BB32
LIVE IN BB10: {2, 4}
P: BB1(7): IN: BB9 BB28 OUT:
P: BB9(6): IN: BB7 OUT:BB1
LIVE IN BB9: {7}
P: BB8(5): IN: BB7 OUT:BB6
LIVE IN BB8: {5, 6}
P: BB7(4): IN: BB6 OUT:BB8 BB9
LIVE IN BB7: {1, 3, 5, 6}
P: BB6(3): IN: BB4 BB8 OUT:BB7 BB10
ADD: 8
LIVE IN BB6: {1, 2, 3, 4, 5, 6}
P: BB8(5): IN: BB7 OUT:BB6
ADD: 7
LIVE IN BB8: {1, 2, 3, 4, 5, 6}
P: BB7(4): IN: BB6 OUT:BB8 BB9
ADD: 6
LIVE IN BB7: {1, 2, 3, 4, 5, 6}
P: BB6(3): IN: BB4 BB8 OUT:BB7 BB10
LIVE IN BB6: {1, 2, 3, 4, 5, 6}
P: BB4(2): IN: BB5 BB3 OUT:BB6
ADD: 5
LIVE IN BB4: {1, 2, 3, 4, 5}
P: BB5(14): IN: BB3 OUT:BB4
LIVE IN BB5: {1, 2, 3, 4}
P: BB3(1): IN: BB0 OUT:BB4 BB5
LIVE IN BB3: {1, 2, 3, 4}
P: BB0(0): IN: OUT:BB3
LIVE IN BB0: {1, 2, 3, 4}
IT: 15 18.
LIVE IN BB5: {1, 2, 3, 4}
LIVE OUT BB5: {1, 2, 3, 4, 5}
LIVE IN BB32: {}
LIVE OUT BB32: {8}
LIVE IN BB34: {}
LIVE OUT BB34: {8}
LIVE IN BB28: {8}
LIVE OUT BB28: {}
LIVE IN BB33: {}
LIVE OUT BB33: {8}
LIVE IN BB31: {9, 10}
LIVE OUT BB31: {}
LIVE IN BB10: {2, 4}
LIVE OUT BB10: {9, 10}
LIVE IN BB1: {}
LIVE OUT BB1: {}
LIVE IN BB9: {7}
LIVE OUT BB9: {}
LIVE IN BB8: {1, 2, 3, 4, 5, 6}
LIVE OUT BB8: {1, 2, 3, 4, 5, 6}
LIVE IN BB7: {1, 2, 3, 4, 5, 6}
LIVE OUT BB7: {1, 2, 3, 4, 5, 6, 7}
LIVE IN BB6: {1, 2, 3, 4, 5, 6}
LIVE OUT BB6: {1, 2, 3, 4, 5, 6}
LIVE IN BB4: {1, 2, 3, 4, 5}
LIVE OUT BB4: {1, 2, 3, 4, 5, 6}
LIVE IN BB3: {1, 2, 3, 4}
LIVE OUT BB3: {1, 2, 3, 4, 5}
LIVE IN BB0: {1, 2, 3, 4}
LIVE OUT BB0: {1, 2, 3, 4}
V0: [0x0 - 0x2c0007]
V1: [0x0 - 0x3bffff]
V2: [0x0 - 0x3bffff]
V3: [0x0 - 0x3bffff]
V4: [0x0 - 0x3bffff]
V5: [0x40009 - 0x3bffff]
V6: [0x40003 - 0x17ffff]
V7: [0x40005 - 0x180006]
V8: [0x280003 - 0x37ffff]
V9: [0x200005 - 0x240002]
V10: [0x200007 - 0x240004]
ALLOCATED R36(4) TO HREG 26 COST 3
ALLOCATED R35(3) TO HREG 25 COST 4
ALLOCATED R33(1) TO HREG 24 COST 4
ALLOCATED R38(6) TO HREG 23 COST 21
ALLOCATED R39(7) TO HREG 22 COST 9
ALLOCATED R37(5) TO HREG 21 COST 7
ALLOCATED R89(9) TO HREG 22 COST 2
ALLOCATED R90(10) TO HREG 23 COST 3
ALLOCATED R88(8) TO HREG 23 COST 4
SPILL BLOCK 0:
SPILL BLOCK 3:
nop
nop
il_seq_point il: 0x0
-1
1 il_seq_point il: 0x0
move R37 <- R34
ii 37 34
1 nop
il_seq_point il: 0x2
-1
1 il_seq_point il: 0x2
move R41 <- R37
ii 41 37
1 move R41 <- r21
icompare R41 R36
ii -1 41 36
1 icompare R41 r26
int_ble [B4B5]
-1
1 int_ble [B4B5]
SPILL BLOCK 5:
il_seq_point il: 0x6
-1
1 il_seq_point il: 0x6
move R37 <- R36
ii 37 36
1 move r21 <- r26
SPILL BLOCK 4:
il_seq_point il: 0x8
-1
1 il_seq_point il: 0x8
iconst R38 <- [0]
i 38
1 iconst r23 <- [0]
il_seq_point il: 0xa
-1
1 il_seq_point il: 0xa
br [B6]
-1
1 br [B6]
SPILL BLOCK 7:
il_seq_point il: 0xc
-1
1 il_seq_point il: 0xc
long_shl_imm R54 <- R38
ii 54 38
1 long_shl_imm R54 <- r23
long_add R56 <- R33 R54
iii 56 33 54
1 long_add R56 <- r24 R54
il_seq_point il: 0x13, nonempty-stack
-1
1 il_seq_point il: 0x13, nonempty-stack
long_shl_imm R66 <- R38
ii 66 38
1 long_shl_imm R66 <- r23
long_add R68 <- R35 R66
iii 68 35 66
1 long_add R68 <- r25 R66
il_seq_point il: 0x1a, nonempty-stack
-1
1 il_seq_point il: 0x1a, nonempty-stack
loadu2_membase R69 <- [R68 + 0x0]
ii 69 68
1 loadu2_membase R69 <- [R68 + 0x0]
checkthis [R56 + 0x0]
i -1 56
1 checkthis [R56 + 0x0]
not_null R56
i -1 56
1 not_null R56
loadu2_membase R75 <- [R56 + 0x0]
ii 75 56
1 loadu2_membase R75 <- [R56 + 0x0]
int_sub R39 <- R75 R69
iii 39 75 69
1 int_sub r22 <- R75 R69
il_seq_point il: 0x2a, nonempty-stack
-1
1 il_seq_point il: 0x2a, nonempty-stack
il_seq_point il: 0x2b
-1
1 il_seq_point il: 0x2b
move R79 <- R39
ii 79 39
1 move R79 <- r22
icompare_imm R79 [0]
i -1 79
1 icompare_imm R79 [0]
int_beq [B8B9]
-1
1 int_beq [B8B9]
SPILL BLOCK 9:
il_seq_point il: 0x2e
-1
1 il_seq_point il: 0x2e
il_seq_point il: 0x2f
-1
1 il_seq_point il: 0x2f
move R32 <- R39
ii 32 39
1 move r0 <- r22
br [B1]
-1
1 br [B1]
SPILL BLOCK 8:
il_seq_point il: 0x30
-1
1 il_seq_point il: 0x30
int_add_imm R38 <- R38 [1]
ii 38 38
1 int_add_imm r23 <- r23 [1]
SPILL BLOCK 6:
il_seq_point il: 0x34
-1
1 il_seq_point il: 0x34
icompare R38 R37
ii -1 38 37
1 icompare r23 r21
int_blt [B7B10]
-1
1 int_blt [B7B10]
SPILL BLOCK 10:
il_seq_point il: 0x38
-1
1 il_seq_point il: 0x38
ldaddr R89 <- R34
ii 89 29
1 add_imm r22 <- fp [64]
move R90 <- R36
ii 90 36
1 move r23 <- r26
move R92 <- R34
ii 92 34
1 nop
icompare R92 R90
ii -1 92 90
1 icompare R92 r23
int_bge [B31B32]
-1
1 int_bge [B31B32]
SPILL BLOCK 32:
iconst R88 <- [-1]
i 88
1 iconst r23 <- [-1]
br [B28]
-1
1 br [B28]
SPILL BLOCK 31:
loadi4_membase R96 <- [R89 + 0x0]
ii 96 89
1 loadi4_membase R96 <- [r22 + 0x0]
icompare R96 R90
ii -1 96 90
1 icompare R96 r23
int_ble [B33B34]
-1
1 int_ble [B33B34]
SPILL BLOCK 34:
iconst R88 <- [1]
i 88
1 iconst r23 <- [1]
br [B28]
-1
1 br [B28]
SPILL BLOCK 33:
iconst R88 <- [0]
i 88
1 iconst r23 <- [0]
SPILL BLOCK 28:
il_seq_point il: 0x40, nonempty-stack
-1
1 il_seq_point il: 0x40, nonempty-stack
il_seq_point il: 0x40
-1
1 il_seq_point il: 0x40
move R32 <- R88
ii 32 88
1 move r0 <- r23
SPILL BLOCK 1:
CCOPY/2: R23 -> R26
DUMP BLOCK 0:
DUMP BLOCK 3:
il_seq_point il: 0x0
loadi4_membase r21 <- [fp + 0x40]
il_seq_point il: 0x2
move R41 <- r21
icompare R41 r26
int_ble [B4B5]
DUMP BLOCK 5:
il_seq_point il: 0x6
move r21 <- r26
DUMP BLOCK 4:
il_seq_point il: 0x8
iconst r23 <- [0]
il_seq_point il: 0xa
br [B6]
DUMP BLOCK 7:
il_seq_point il: 0xc
long_shl_imm R54 <- r23
long_add R56 <- r24 R54
il_seq_point il: 0x13, nonempty-stack
long_shl_imm R66 <- r23
long_add R68 <- r25 R66
il_seq_point il: 0x1a, nonempty-stack
loadu2_membase R69 <- [R68 + 0x0]
checkthis [R56 + 0x0]
not_null R56
loadu2_membase R75 <- [R56 + 0x0]
int_sub r22 <- R75 R69
il_seq_point il: 0x2a, nonempty-stack
il_seq_point il: 0x2b
move R79 <- r22
icompare_imm R79 [0]
int_beq [B8B9]
DUMP BLOCK 9:
il_seq_point il: 0x2e
il_seq_point il: 0x2f
move r0 <- r22
br [B1]
DUMP BLOCK 8:
il_seq_point il: 0x30
int_add_imm r23 <- r23 [1]
DUMP BLOCK 6:
il_seq_point il: 0x34
icompare r23 r21
int_blt [B7B10]
DUMP BLOCK 10:
il_seq_point il: 0x38
add_imm r22 <- fp [64]
move r23 <- r26
loadi4_membase R92 <- [fp + 0x40]
icompare R92 r26
int_bge [B31B32]
DUMP BLOCK 32:
iconst r23 <- [-1]
br [B28]
DUMP BLOCK 31:
loadi4_membase R96 <- [r22 + 0x0]
icompare R96 r23
int_ble [B33B34]
DUMP BLOCK 34:
iconst r23 <- [1]
br [B28]
DUMP BLOCK 33:
iconst r23 <- [0]
DUMP BLOCK 28:
il_seq_point il: 0x40, nonempty-stack
il_seq_point il: 0x40
move r0 <- r23
DUMP BLOCK 1:
LOCAL REGALLOC BLOCK 3:
1 il_seq_point il: 0x0
2 loadi4_membase r21 <- [fp + 0x40]
3 il_seq_point il: 0x2
4 move R41 <- r21
5 icompare R41 r26
6 int_ble [B4B5]
liveness: r21 [2 - 2]
liveness: R41 [4 - 4]
processing: 6 int_ble [B4B5]
6 int_ble [B4B5]
processing: 5 icompare R41 r26
assigned sreg1 r0 to R41
5 icompare r0 r26
processing: 4 move R41 <- r21
assigned dreg r0 to dest R41
freeable r0 (R41) (born in 4)
4 move r0 <- r21
processing: 3 il_seq_point il: 0x2
3 il_seq_point il: 0x2
processing: 2 loadi4_membase r21 <- [fp + 0x40]
2 loadi4_membase r21 <- [fp + 0x40]
processing: 1 il_seq_point il: 0x0
1 il_seq_point il: 0x0
LOCAL REGALLOC BLOCK 5:
1 il_seq_point il: 0x6
2 move r21 <- r26
liveness: r21 [2 - 2]
processing: 2 move r21 <- r26
2 move r21 <- r26
processing: 1 il_seq_point il: 0x6
1 il_seq_point il: 0x6
LOCAL REGALLOC BLOCK 4:
1 il_seq_point il: 0x8
2 iconst r23 <- [0]
3 il_seq_point il: 0xa
4 br [B6]
liveness: r23 [2 - 2]
processing: 4 br [B6]
4 br [B6]
processing: 3 il_seq_point il: 0xa
3 il_seq_point il: 0xa
processing: 2 iconst r23 <- [0]
2 iconst r23 <- [0]
processing: 1 il_seq_point il: 0x8
1 il_seq_point il: 0x8
LOCAL REGALLOC BLOCK 7:
1 il_seq_point il: 0xc
2 long_shl_imm R54 <- r23
3 long_add R56 <- r24 R54
4 il_seq_point il: 0x13, nonempty-stack
5 long_shl_imm R66 <- r23
6 long_add R68 <- r25 R66
7 il_seq_point il: 0x1a, nonempty-stack
8 loadu2_membase R69 <- [R68 + 0x0]
9 checkthis [R56 + 0x0]
10 not_null R56
11 loadu2_membase R75 <- [R56 + 0x0]
12 int_sub r22 <- R75 R69
13 il_seq_point il: 0x2a, nonempty-stack
14 il_seq_point il: 0x2b
15 move R79 <- r22
16 nop
17 arm64_cbzw R79
liveness: r22 [12 - 12]
liveness: R54 [2 - 2]
liveness: R56 [3 - 3]
liveness: R66 [5 - 5]
liveness: R68 [6 - 6]
liveness: R69 [8 - 8]
liveness: R75 [11 - 11]
liveness: R79 [15 - 15]
processing: 17 arm64_cbzw R79
assigned sreg1 r0 to R79
17 arm64_cbzw r0
processing: 16 nop
16 nop
processing: 15 move R79 <- r22
assigned dreg r0 to dest R79
freeable r0 (R79) (born in 15)
15 move r0 <- r22
processing: 14 il_seq_point il: 0x2b
14 il_seq_point il: 0x2b
processing: 13 il_seq_point il: 0x2a, nonempty-stack
13 il_seq_point il: 0x2a, nonempty-stack
processing: 12 int_sub r22 <- R75 R69
assigned sreg1 r0 to R75
assigned sreg2 r1 to R69
12 int_sub r22 <- r0 r1
processing: 11 loadu2_membase R75 <- [R56 + 0x0]
assigned dreg r0 to dest R75
freeable r0 (R75) (born in 11)
assigned sreg1 r0 to R56
11 loadu2_membase r0 <- [r0 + 0x0]
processing: 10 not_null R56
10 not_null r0
processing: 9 checkthis [R56 + 0x0]
9 checkthis [r0 + 0x0]
processing: 8 loadu2_membase R69 <- [R68 + 0x0]
assigned dreg r1 to dest R69
freeable r1 (R69) (born in 8)
assigned sreg1 r1 to R68
8 loadu2_membase r1 <- [r1 + 0x0]
processing: 7 il_seq_point il: 0x1a, nonempty-stack
7 il_seq_point il: 0x1a, nonempty-stack
processing: 6 long_add R68 <- r25 R66
assigned dreg r1 to dest R68
freeable r1 (R68) (born in 6)
assigned sreg2 r1 to R66
6 long_add r1 <- r25 r1
processing: 5 long_shl_imm R66 <- r23
assigned dreg r1 to dest R66
freeable r1 (R66) (born in 5)
5 long_shl_imm r1 <- r23
processing: 4 il_seq_point il: 0x13, nonempty-stack
4 il_seq_point il: 0x13, nonempty-stack
processing: 3 long_add R56 <- r24 R54
assigned dreg r0 to dest R56
freeable r0 (R56) (born in 3)
assigned sreg2 r0 to R54
3 long_add r0 <- r24 r0
processing: 2 long_shl_imm R54 <- r23
assigned dreg r0 to dest R54
freeable r0 (R54) (born in 2)
2 long_shl_imm r0 <- r23
processing: 1 il_seq_point il: 0xc
1 il_seq_point il: 0xc
LOCAL REGALLOC BLOCK 9:
1 il_seq_point il: 0x2e
2 il_seq_point il: 0x2f
3 move r0 <- r22
4 br [B1]
liveness: r0 [3 - 3]
processing: 4 br [B1]
4 br [B1]
processing: 3 move r0 <- r22
3 move r0 <- r22
processing: 2 il_seq_point il: 0x2f
2 il_seq_point il: 0x2f
processing: 1 il_seq_point il: 0x2e
1 il_seq_point il: 0x2e
LOCAL REGALLOC BLOCK 8:
1 il_seq_point il: 0x30
2 int_add_imm r23 <- r23 [1]
liveness: r23 [2 - 2]
processing: 2 int_add_imm r23 <- r23 [1]
2 int_add_imm r23 <- r23 [1]
processing: 1 il_seq_point il: 0x30
1 il_seq_point il: 0x30
LOCAL REGALLOC BLOCK 6:
1 il_seq_point il: 0x34
2 icompare r23 r21
3 int_blt [B7B10]
processing: 3 int_blt [B7B10]
3 int_blt [B7B10]
processing: 2 icompare r23 r21
2 icompare r23 r21
processing: 1 il_seq_point il: 0x34
1 il_seq_point il: 0x34
LOCAL REGALLOC BLOCK 10:
1 il_seq_point il: 0x38
2 add_imm r22 <- fp [64]
3 move r23 <- r26
4 loadi4_membase R92 <- [fp + 0x40]
5 icompare R92 r26
6 int_bge [B31B32]
liveness: r22 [2 - 2]
liveness: r23 [3 - 3]
liveness: R92 [4 - 4]
processing: 6 int_bge [B31B32]
6 int_bge [B31B32]
processing: 5 icompare R92 r26
assigned sreg1 r0 to R92
5 icompare r0 r26
processing: 4 loadi4_membase R92 <- [fp + 0x40]
assigned dreg r0 to dest R92
freeable r0 (R92) (born in 4)
4 loadi4_membase r0 <- [fp + 0x40]
processing: 3 move r23 <- r26
3 move r23 <- r26
processing: 2 add_imm r22 <- fp [64]
2 add_imm r22 <- fp [64]
processing: 1 il_seq_point il: 0x38
1 il_seq_point il: 0x38
LOCAL REGALLOC BLOCK 32:
1 iconst r23 <- [-1]
2 br [B28]
liveness: r23 [1 - 1]
processing: 2 br [B28]
2 br [B28]
processing: 1 iconst r23 <- [-1]
1 iconst r23 <- [-1]
LOCAL REGALLOC BLOCK 31:
1 loadi4_membase R96 <- [r22 + 0x0]
2 icompare R96 r23
3 int_ble [B33B34]
liveness: R96 [1 - 1]
processing: 3 int_ble [B33B34]
3 int_ble [B33B34]
processing: 2 icompare R96 r23
assigned sreg1 r0 to R96
2 icompare r0 r23
processing: 1 loadi4_membase R96 <- [r22 + 0x0]
assigned dreg r0 to dest R96
freeable r0 (R96) (born in 1)
1 loadi4_membase r0 <- [r22 + 0x0]
LOCAL REGALLOC BLOCK 34:
1 iconst r23 <- [1]
2 br [B28]
liveness: r23 [1 - 1]
processing: 2 br [B28]
2 br [B28]
processing: 1 iconst r23 <- [1]
1 iconst r23 <- [1]
LOCAL REGALLOC BLOCK 33:
1 iconst r23 <- [0]
liveness: r23 [1 - 1]
processing: 1 iconst r23 <- [0]
1 iconst r23 <- [0]
LOCAL REGALLOC BLOCK 28:
1 il_seq_point il: 0x40, nonempty-stack
2 il_seq_point il: 0x40
3 move r0 <- r23
liveness: r0 [3 - 3]
processing: 3 move r0 <- r23
3 move r0 <- r23
processing: 2 il_seq_point il: 0x40
2 il_seq_point il: 0x40
processing: 1 il_seq_point il: 0x40, nonempty-stack
1 il_seq_point il: 0x40, nonempty-stack
CFA: [0] def_cfa: sp+0x0
CFA: [4] def_cfa_offset: 0x50
CFA: [4] offset: fp at cfa-0x50
CFA: [4] offset: lr at cfa-0x48
CFA: [8] def_cfa_reg: fp
CFA: [c] offset: r21 at cfa-0x40
CFA: [c] offset: r22 at cfa-0x38
CFA: [10] offset: r23 at cfa-0x30
CFA: [10] offset: r24 at cfa-0x28
CFA: [14] offset: r25 at cfa-0x20
CFA: [14] offset: r26 at cfa-0x18
Basic block 0 starting at offset 0x24
Basic block 3 starting at offset 0x24
Basic block 5 starting at offset 0x34
Basic block 4 starting at offset 0x38
Basic block 7 starting at offset 0x40
Basic block 9 starting at offset 0x68
Basic block 8 starting at offset 0x70
Basic block 6 starting at offset 0x74
Basic block 10 starting at offset 0x7c
Basic block 32 starting at offset 0x90
Basic block 31 starting at offset 0x9c
Basic block 34 starting at offset 0xa8
Basic block 33 starting at offset 0xb0
Basic block 28 starting at offset 0xb4
Basic block 1 starting at offset 0xb8
Method int System.SpanHelpers:SequenceCompareTo<char> (char&,int,char&,int) emitted at 0x7fadb69d90 to 0x7fadb69e60 (code length 208) [cil-stringreplacer.exe]
/tmp/.WqNF1a: file format elf64-littleaarch64
Disassembly of section .text:
0000000000000000 <.text>:
0: a9bb7bfd .word 0xa9bb7bfd
4: 910003fd .word 0x910003fd
8: a9015bb5 .word 0xa9015bb5
c: a90263b7 .word 0xa90263b7
10: a9036bb9 .word 0xa9036bb9
14: aa0003f8 .word 0xaa0003f8
18: f90023a1 .word 0xf90023a1
1c: aa0203f9 .word 0xaa0203f9
20: aa0303fa .word 0xaa0303fa
24: b98043b5 .word 0xb98043b5
28: aa1503e0 .word 0xaa1503e0
2c: 6b1a001f .word 0x6b1a001f
30: 5400004d .word 0x5400004d
34: aa1a03f5 .word 0xaa1a03f5
38: d2800017 .word 0xd2800017
3c: 1400000e .word 0x1400000e
40: d37ffae0 .word 0xd37ffae0
44: 8b000300 .word 0x8b000300
48: d37ffae1 .word 0xd37ffae1
4c: 8b010321 .word 0x8b010321
50: 79400021 .word 0x79400021
54: f940001e .word 0xf940001e
58: 79400000 .word 0x79400000
5c: 4b010016 .word 0x4b010016
60: aa1603e0 .word 0xaa1603e0
64: 34000060 .word 0x34000060
68: aa1603e0 .word 0xaa1603e0
6c: 14000013 .word 0x14000013
70: 110006f7 .word 0x110006f7
74: 6b1502ff .word 0x6b1502ff
78: 54fffe4b .word 0x54fffe4b
7c: 910103b6 .word 0x910103b6
80: aa1a03f7 .word 0xaa1a03f7
84: b98043a0 .word 0xb98043a0
88: 6b1a001f .word 0x6b1a001f
8c: 5400008a .word 0x5400008a
90: 92800017 .word 0x92800017
94: f2bffff7 .word 0xf2bffff7
98: 14000007 .word 0x14000007
9c: b98002c0 .word 0xb98002c0
a0: 6b17001f .word 0x6b17001f
a4: 5400006d .word 0x5400006d
a8: d2800037 .word 0xd2800037
ac: 14000002 .word 0x14000002
b0: d2800017 .word 0xd2800017
b4: aa1703e0 .word 0xaa1703e0
b8: a9415bb5 .word 0xa9415bb5
bc: a94263b7 .word 0xa94263b7
c0: a9436bb9 .word 0xa9436bb9
c4: 910003bf .word 0x910003bf
c8: a8c57bfd .word 0xa8c57bfd
cc: d65f03c0 .word 0xd65f03c0
Thread 1 "mono" received signal SIGSEGV, Segmentation fault.
0x0000007fadb69de4 in ?? ()
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