LPC43xx configuration for controlling CPLD RX decimation.

gistfile1.c

void sgpio_configure_pin_functions() {
  ...
	scu_pinmux(SCU_PINMUX_SGPIO13, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);	/* GPIO5[12] */
	scu_pinmux(SCU_PINMUX_SGPIO14, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);	/* GPIO5[13] */
	scu_pinmux(SCU_PINMUX_SGPIO15, SCU_GPIO_FAST | SCU_CONF_FUNCTION4);	/* GPIO5[14] */

	sgpio_cpld_stream_rx_set_decimation(0);

	GPIO_DIR(GPIO5) |= GPIOPIN14 | GPIOPIN13 | GPIOPIN12;
}

bool sgpio_cpld_stream_rx_set_decimation(const uint_fast8_t skip_n) {
	/* CPLD interface is three bits, SGPIO[15:13]:
	 * 111: decimate by 1 (skip_n=0, skip no samples)
	 * 110: decimate by 2 (skip_n=1, skip every other sample)
	 * 101: decimate by 3 (skip_n=2, skip two of three samples)
	 * ...
	 * 000: decimate by 8 (skip_n=7, skip seven of eight samples)
	 */
	GPIO_SET(GPIO5) = GPIOPIN14 | GPIOPIN13 | GPIOPIN12;
	GPIO_CLR(GPIO5) = (skip_n & 7) << 12;

	return (skip_n < 8);
}