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March 3, 2014 18:11
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#ifndef TESTS_H | |
#define TESTS_H | |
#include "asic.h" | |
#include <stdlib.h> | |
#include <stdio.h> | |
#include <string.h> | |
#include <time.h> | |
void flash(asic_t *device, const uint8_t *data); | |
typedef struct { | |
int (*execute)(void); | |
char *name; | |
} test_t; | |
#define TEST(NAME) int (test_##NAME)(); | |
TEST(performance) | |
TEST(ADD_A_r) | |
TEST(ADC_A_r) | |
TEST(SUB_A_r) | |
TEST(SBC_A_r) | |
TEST(AND_A_r) | |
TEST(XOR_A_r) | |
TEST(OR_A_r) | |
TEST(CP_r) | |
TEST(RST) | |
TEST(DJNZ) | |
TEST(JR) | |
TEST(JR_cc) | |
TEST(LD_rp_nn) | |
TEST(ADD_HL_rp) | |
TEST(LD_BCptr_A) | |
TEST(LD_nnptr_HL) | |
TEST(LD_nnptr_A) | |
TEST(LD_HL_nnptr) | |
TEST(LD_A_nnptr) | |
TEST(INC_rp) | |
TEST(INC_r) | |
TEST(DEC_rp) | |
TEST(DEC_r) | |
TEST(LD_r_n) | |
TEST(RLCA) | |
TEST(RRCA) | |
TEST(RLA) | |
TEST(RRA) | |
TEST(CPL) | |
TEST(DAA) | |
TEST(LD_r_r) | |
TEST(POP_rp2) | |
TEST(RET_cc) | |
TEST(RET) | |
TEST(EXX) | |
TEST(JP_HL) | |
TEST(LD_SP_HL) | |
TEST(JP_cc_nn) | |
TEST(JP_nn) | |
TEST(OUT_n_A) | |
TEST(IN_A_n) | |
TEST(EX_SP_HL) | |
TEST(EX_DE_HL) | |
TEST(CALL_cc_nn) | |
TEST(PUSH_rp2) | |
TEST(CALL_nn) | |
TEST(alu_n) | |
TEST(JP_IX__JP_IY) | |
TEST(ADD_IX_rp) | |
TEST(prefix_reset) | |
TEST(index_offsets) | |
TEST(ixh_ixl) | |
TEST(IM_set) | |
TEST(RLC) | |
TEST(RRC) | |
TEST(RL) | |
TEST(RR) | |
TEST(SLA) | |
TEST(SRA) | |
TEST(SLL) | |
TEST(SRL) | |
TEST(BIT) | |
TEST(RES) | |
TEST(SET) | |
TEST(EI_DI) | |
TEST(NEG) | |
TEST(IN_C) | |
TEST(IN_r_C) | |
TEST(OUT_C_0) | |
TEST(OUT_C_r) | |
TEST(SBC_HL_rp) | |
TEST(ADC_HL_rp) | |
TEST(LD_nn_rp) | |
TEST(LD_rp_nn_ind) | |
TEST(LD_A_I) | |
TEST(RRD_RLD) | |
TEST(LDI) | |
TEST(LDIR) | |
TEST(LDD) | |
TEST(LDDR) | |
TEST(CPI) | |
TEST(CPD) | |
TEST(CPIR) | |
TEST(CPDR) | |
TEST(INI) | |
TEST(IND) | |
TEST(INIR) | |
TEST(INDR) | |
const test_t tests[] = { | |
{ test_performance, "performance" }, | |
{ test_ADD_A_r, "ADD A, r" }, | |
{ test_ADC_A_r, "ADC A, r" }, | |
{ test_SUB_A_r, "SUB A, r" }, | |
{ test_SBC_A_r, "SBC A, r" }, | |
{ test_AND_A_r, "AND A, r" }, | |
{ test_XOR_A_r, "XOR A, r" }, | |
{ test_OR_A_r, "OR A, r" }, | |
{ test_CP_r, "CP r" }, | |
{ test_RST, "RST y" }, | |
{ test_DJNZ, "DJNZ d" }, | |
{ test_JR, "JR d" }, | |
{ test_JR_cc, "JR cc, d" }, | |
{ test_LD_rp_nn, "LD rp, nn" }, | |
{ test_ADD_HL_rp, "ADD HL, rp" }, | |
{ test_LD_BCptr_A, "LD (BC), A" }, | |
{ test_LD_nnptr_HL, "LD (nn), HL" }, | |
{ test_LD_nnptr_A, "LD (nn), A" }, | |
{ test_LD_HL_nnptr, "LD HL, (nn)" }, | |
{ test_LD_A_nnptr, "LD A, (nn)" }, | |
{ test_INC_rp, "INC rp" }, | |
{ test_INC_r, "INC r" }, | |
{ test_DEC_rp, "DEC rp" }, | |
{ test_DEC_r, "DEC r" }, | |
{ test_LD_r_n, "LD r, n" }, | |
{ test_RLCA, "RLCA" }, | |
{ test_RRCA, "RRCA" }, | |
{ test_RLA, "RLA" }, | |
{ test_RRA, "RRA" }, | |
{ test_CPL, "CPL" }, | |
{ test_DAA, "DAA" }, | |
{ test_LD_r_r, "LD r, r" }, | |
{ test_POP_rp2, "POP rp2" }, | |
{ test_RET_cc, "RET cc" }, | |
{ test_RET, "RET" }, | |
{ test_EXX, "EXX" }, | |
{ test_JP_HL, "JP (HL)" }, | |
{ test_LD_SP_HL, "LD SP, HL" }, | |
{ test_JP_cc_nn, "JP cc, nn" }, | |
{ test_JP_nn, "JP nn" }, | |
{ test_OUT_n_A, "OUT (n), A" }, | |
{ test_IN_A_n, "IN A, (n)" }, | |
{ test_EX_SP_HL, "EX (SP), HL" }, | |
{ test_EX_DE_HL, "EX DE, HL" }, | |
{ test_CALL_cc_nn, "CALL cc, nn" }, | |
{ test_PUSH_rp2, "PUSH rp2" }, | |
{ test_CALL_nn, "CALL nn" }, | |
{ test_alu_n, "alu[y] n" }, | |
{ test_JP_IX__JP_IY, "JP IX / JP IY" }, | |
{ test_ADD_IX_rp, "ADD IX, rp" }, | |
{ test_prefix_reset, "prefix reset" }, | |
{ test_index_offsets, "index offsets" }, | |
{ test_ixh_ixl, "IXH/IXL" }, | |
{ test_IM_set, "interrupt mode set" }, | |
{ test_RLC, "RLC r" }, | |
{ test_RRC, "RRC r" }, | |
{ test_RL, "RL r" }, | |
{ test_RR, "RR r" }, | |
{ test_SLA, "SLA r" }, | |
{ test_SRA, "SRA r" }, | |
{ test_SLL, "SLL r" }, | |
{ test_SRL, "SRL r" }, | |
{ test_BIT, "BIT y, r" }, | |
{ test_RES, "RES y, r" }, | |
{ test_SET, "SET y, r" }, | |
{ test_EI_DI, "EI/DI" }, | |
{ test_NEG, "NEG" }, | |
{ test_IN_C, "IN (C)" }, | |
{ test_IN_r_C, "IN r, (C)" }, | |
{ test_OUT_C_0, "OUT (C), 0" }, | |
{ test_OUT_C_r, "OUT (C), r" }, | |
{ test_SBC_HL_rp, "SBC HL, rp" }, | |
{ test_ADC_HL_rp, "ADC HL, rp" }, | |
{ test_LD_nn_rp, "LD (nn), rp" }, | |
{ test_LD_rp_nn_ind, "LD rp, (nn)" }, | |
{ test_LD_A_I, "LD A, I" }, | |
{ test_RRD_RLD, "RRD/RLD" }, | |
{ test_LDI, "LDI" }, | |
{ test_LDIR, "LDIR" }, | |
{ test_LDD, "LDD" }, | |
{ test_LDDR, "LDDR" }, | |
{ test_CPI, "CPI" }, | |
{ test_CPD, "CPD" }, | |
{ test_CPIR, "CPIR" }, | |
{ test_CPDR, "CPDR" }, | |
{ test_INI, "INI" }, | |
{ test_IND, "IND" }, | |
{ test_INIR, "INIR" }, | |
{ test_INDR, "INDR" }, | |
}; | |
#endif |
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